公开(公告)号：US20130228860A1

公开(公告)日：2013-09-05

申请号：US13865941

申请日：2013-04-18

申请人： Hong Chang ,  Yi Su ,  Wenjun Li ,  Limin Weng ,  Gary Chen ,  Jongoh Kim ,  John Chen

发明人： Hong Chang ,  Yi Su ,  Wenjun Li ,  Limin Weng ,  Gary Chen ,  Jongoh Kim ,  John Chen

IPC分类号： H01L27/088 ,  H01L29/78 ,  H01L21/283

CPC分类号： H01L29/7811 ,  H01L21/26586 ,  H01L21/283 ,  H01L27/088 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7827

摘要： A method for fabricating a semiconductor device includes forming a plurality of trenches using a first mask. The trenches include source pickup trenches located in outside a termination area and between two adjacent active areas. First and second conductive regions separated by an intermediate dielectric region are formed using a second mask. A first electrical contact to the first conductive region and a second electrical contact to the second conductive region are formed using a third mask and forming a source metal region. Contacts to a gate metal region are formed using a fourth mask. A semiconductor device includes a source pickup contact located outside a termination region and outside an active region of the device.

公开(公告)号：US20110220990A1

公开(公告)日：2011-09-15

申请号：US12722384

申请日：2010-03-11

申请人： Hong Chang ,  Yi Su ,  Wenjun Li ,  Limin Weng ,  Gary Chen ,  Jongoh Kim ,  John Chen

发明人： Hong Chang ,  Yi Su ,  Wenjun Li ,  Limin Weng ,  Gary Chen ,  Jongoh Kim ,  John Chen

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/28

CPC分类号： H01L29/7811 ,  H01L21/26586 ,  H01L21/283 ,  H01L27/088 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7827

摘要： A method for fabricating a semiconductor device includes forming a plurality of trenches using a first mask. The trenches include source pickup trenches located in outside a termination area and between two adjacent active areas. First and second conductive regions separated by an intermediate dielectric region are formed using a second mask. A first electrical contact to the first conductive region and a second electrical contact to the second conductive region are formed using a third mask and forming a source metal region. Contacts to a gate metal region are formed using a fourth mask. A semiconductor device includes a source pickup contact located outside a termination region and outside an active region of the device.

摘要翻译： 一种制造半导体器件的方法包括使用第一掩模形成多个沟槽。 沟槽包括位于终端区域外部和两个相邻有效区域之间的源拾取沟槽。 使用第二掩模形成由中间介电区分隔的第一和第二导电区域。 使用第三掩模形成到第一导电区域的第一电接触和到第二导电区域的第二电接触，并形成源极金属区域。 使用第四掩模形成与栅极金属区域的接触。 半导体器件包括位于端子区域外部并位于器件的有源区域外部的源极拾取触点。

公开(公告)号：US08994101B2

公开(公告)日：2015-03-31

申请号：US13865941

申请日：2013-04-18

申请人： Hong Chang ,  Yi Su ,  Wenjun Li ,  Limin Weng ,  Jongoh Kim ,  John Chen

发明人： Hong Chang ,  Yi Su ,  Wenjun Li ,  Limin Weng ,  Gary Chen ,  Jongoh Kim ,  John Chen

IPC分类号： H01L29/772 ,  H01L29/78 ,  H01L27/088 ,  H01L21/283 ,  H01L29/40 ,  H01L29/417 ,  H01L29/66 ,  H01L29/732 ,  H01L29/423 ,  H01L21/265 ,  H01L29/45 ,  H01L29/49 ,  H01L29/10

CPC分类号： H01L29/7811 ,  H01L21/26586 ,  H01L21/283 ,  H01L27/088 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7827

摘要： A method for fabricating a semiconductor device includes forming a plurality of trenches using a first mask. The trenches include source pickup trenches located in outside a termination area and between two adjacent active areas. First and second conductive regions separated by an intermediate dielectric region are formed using a second mask. A first electrical contact to the first conductive region and a second electrical contact to the second conductive region are formed using a third mask and forming a source metal region. Contacts to a gate metal region are formed using a fourth mask. A semiconductor device includes a source pickup contact located outside a termination region and outside an active region of the device.

摘要翻译： 一种制造半导体器件的方法包括使用第一掩模形成多个沟槽。 沟槽包括位于终端区域外部和两个相邻有效区域之间的源拾取沟槽。 使用第二掩模形成由中间介电区分隔的第一和第二导电区域。 使用第三掩模形成到第一导电区域的第一电接触和到第二导电区域的第二电接触，并形成源极金属区域。 使用第四掩模形成与栅极金属区域的接触。 半导体器件包括位于端子区域外部并位于器件的有源区域外部的源极拾取触点。

公开(公告)号：US08431457B2

公开(公告)日：2013-04-30

申请号：US12722384

申请日：2010-03-11

申请人： Hong Chang ,  Yi Su ,  Wenjun Li ,  Limin Weng ,  Gary Chen ,  Jongoh Kim ,  John Chen

发明人： Hong Chang ,  Yi Su ,  Wenjun Li ,  Limin Weng ,  Gary Chen ,  Jongoh Kim ,  John Chen

IPC分类号： H01L21/027 ,  H01L29/78

CPC分类号： H01L29/7811 ,  H01L21/26586 ,  H01L21/283 ,  H01L27/088 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7827

摘要： A method for fabricating a semiconductor device includes forming a plurality of trenches using a first mask. The trenches include source pickup trenches located in outside a termination area and between two adjacent active areas. First and second conductive regions separated by an intermediate dielectric region are formed using a second mask. A first electrical contact to the first conductive region and a second electrical contact to the second conductive region are formed using a third mask and forming a source metal region. Contacts to a gate metal region are formed using a fourth mask. A semiconductor device includes a source pickup contact located outside a termination region and outside an active region of the device.

摘要翻译： 一种制造半导体器件的方法包括使用第一掩模形成多个沟槽。 沟槽包括位于终端区域外部和两个相邻有效区域之间的源拾取沟槽。 使用第二掩模形成由中间介电区分隔的第一和第二导电区域。 使用第三掩模形成到第一导电区域的第一电接触和到第二导电区域的第二电接触，并形成源极金属区域。 使用第四掩模形成与栅极金属区域的接触。 半导体器件包括位于端子区域外部并位于器件的有源区域外部的源极拾取触点。

公开(公告)号：US08580676B2

公开(公告)日：2013-11-12

申请号：US13361486

申请日：2012-01-30

申请人： Hong Chang ,  John Chen ,  Limin Weng ,  Wenjun Li

发明人： Hong Chang ,  John Chen ,  Limin Weng ,  Wenjun Li

IPC分类号： H01L21/4763

CPC分类号： H01L29/7813 ,  H01L29/41766 ,  H01L29/47 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782 ,  H01L2924/0002 ,  Y10S257/905 ,  H01L2924/00

摘要： A semiconductor device formed on a semiconductor substrate may include a component formed in a contact trench located in an active cell region. The component may comprise a barrier metal deposited on a bottom and portions of sidewalls of the contact trench and a tungsten plug deposited in a remaining portion of the contact trench. The barrier metal may comprise first and second metal layers. The first metal layer may be proximate to the sidewall and the bottom of the contact trench. The first metal layer may include a nitride. The second metal layer may be between the first metal layer and the tungsten plug and between the tungsten plug and the sidewall. The second metal layer covers portions of the sidewalls of not covered by the first metal layer.

摘要翻译： 形成在半导体衬底上的半导体器件可以包括形成在位于活性单元区域中的接触沟槽中的部件。 该部件可以包括沉积在接触沟槽的底部和侧壁的一部分上的阻挡金属和沉积在接触沟槽的剩余部分中的钨丝塞。 阻挡金属可以包括第一和第二金属层。 第一金属层可以靠近接触沟槽的侧壁和底部。 第一金属层可以包括氮化物。 第二金属层可以在第一金属层和钨插塞之间以及钨插塞和侧壁之间。 第二金属层覆盖未被第一金属层覆盖的侧壁的部分。

公开(公告)号：US20120129328A1

公开(公告)日：2012-05-24

申请号：US13361486

申请日：2012-01-30

申请人： Hong Chang ,  John Chen ,  Limin Weng ,  Wenjun Li

发明人： Hong Chang ,  John Chen ,  Limin Weng ,  Wenjun Li

IPC分类号： H01L21/329 ,  H01L21/768

CPC分类号： H01L29/7813 ,  H01L29/41766 ,  H01L29/47 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782 ,  H01L2924/0002 ,  Y10S257/905 ,  H01L2924/00

摘要： A semiconductor device formed on a semiconductor substrate may include a component formed in a contact trench located in an active cell region. The component may comprise a barrier metal deposited on a bottom and portions of sidewalls of the contact trench and a tungsten plug deposited in a remaining portion of the contact trench. The barrier metal may comprise first and second metal layers. The first metal layer may be proximate to the sidewall and the bottom of the contact trench. The first metal layer may include a nitride. The second metal layer may be between the first metal layer and the tungsten plug and between the tungsten plug and the sidewall. The second metal layer covers portions of the sidewalls of not covered by the first metal layer.

摘要翻译： 形成在半导体衬底上的半导体器件可以包括形成在位于活性单元区域中的接触沟槽中的部件。 该部件可以包括沉积在接触沟槽的底部和侧壁的一部分上的阻挡金属和沉积在接触沟槽的剩余部分中的钨丝塞。 阻挡金属可以包括第一和第二金属层。 第一金属层可以靠近接触沟槽的侧壁和底部。 第一金属层可以包括氮化物。 第二金属层可以在第一金属层和钨插塞之间以及钨插塞和侧壁之间。 第二金属层覆盖未被第一金属层覆盖的侧壁的部分。

公开(公告)号：US08138605B2

公开(公告)日：2012-03-20

申请号：US12606005

申请日：2009-10-26

申请人： Hong Chang ,  John Chen ,  Limin Weng ,  Wenjun Li

发明人： Hong Chang ,  John Chen ,  Limin Weng ,  Wenjun Li

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L27/148 ,  H01L29/768 ,  H01L27/095

CPC分类号： H01L29/7813 ,  H01L29/41766 ,  H01L29/47 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782 ,  H01L2924/0002 ,  Y10S257/905 ,  H01L2924/00

摘要： A semiconductor device formed on a semiconductor substrate may include a component formed in a contact trench located in an active cell region. The component may comprise a barrier metal deposited on a bottom and portions of sidewalls of the contact trench and a tungsten plug deposited in a remaining portion of the contact trench. The barrier metal may comprise first and second metal layers. The first metal layer may be proximate to the sidewall and the bottom of the contact trench. The first metal layer may include a nitride. The second metal layer may be between the first metal layer and the tungsten plug and between the tungsten plug and the sidewall. The second metal layer covers portions of the sidewalls of not covered by the first metal layer.

摘要翻译： 形成在半导体衬底上的半导体器件可以包括形成在位于活性单元区域中的接触沟槽中的部件。 该部件可以包括沉积在接触沟槽的底部和侧壁的一部分上的阻挡金属和沉积在接触沟槽的剩余部分中的钨丝塞。 阻挡金属可以包括第一和第二金属层。 第一金属层可以靠近接触沟槽的侧壁和底部。 第一金属层可以包括氮化物。 第二金属层可以在第一金属层和钨插塞之间以及钨插塞和侧壁之间。 第二金属层覆盖未被第一金属层覆盖的侧壁的部分。

公开(公告)号：US20110095361A1

公开(公告)日：2011-04-28

申请号：US12606005

申请日：2009-10-26

申请人： Hong Chang ,  John Chen ,  Limin Weng ,  Wenjun Li

发明人： Hong Chang ,  John Chen ,  Limin Weng ,  Wenjun Li

IPC分类号： H01L27/06 ,  H01L21/329 ,  H01L29/872

CPC分类号： H01L29/7813 ,  H01L29/41766 ,  H01L29/47 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782 ,  H01L2924/0002 ,  Y10S257/905 ,  H01L2924/00

摘要： A semiconductor device formed on a semiconductor substrate may include a component formed in a contact trench located in an active cell region. The component may comprise a barrier metal deposited on a bottom and portions of sidewalls of the contact trench and a tungsten plug deposited in a remaining portion of the contact trench. The barrier metal may comprise first and second metal layers. The first metal layer may be proximate to the sidewall and the bottom of the contact trench. The first metal layer may include a nitride. The second metal layer may be between the first metal layer and the tungsten plug and between the tungsten plug and the sidewall. The second metal layer covers portions of the sidewalls of not covered by the first metal layer.

摘要翻译： 形成在半导体衬底上的半导体器件可以包括形成在位于活性单元区域中的接触沟槽中的部件。 该部件可以包括沉积在接触沟槽的底部和侧壁的一部分上的阻挡金属和沉积在接触沟槽的剩余部分中的钨丝塞。 阻挡金属可以包括第一和第二金属层。 第一金属层可以靠近接触沟槽的侧壁和底部。 第一金属层可以包括氮化物。 第二金属层可以在第一金属层和钨插塞之间以及钨插塞和侧壁之间。 第二金属层覆盖未被第一金属层覆盖的侧壁的部分。

公开(公告)号：US20080310065A1

公开(公告)日：2008-12-18

申请号：US12080104

申请日：2008-04-01

申请人： Moses Ho ,  Madhur Bobde ,  Mike Chang ,  Limin Weng

发明人： Moses Ho ,  Madhur Bobde ,  Mike Chang ,  Limin Weng

IPC分类号： H02H9/04

CPC分类号： H01L27/0676 ,  H01L23/552 ,  H01L23/60 ,  H01L2924/0002 ,  H01L2924/00

摘要： A transient voltage suppressing (TVS) circuit with uni-directional blocking and symmetric bi-directional blocking capabilities integrated with an electromagnetic interference (EMI) filter supported on a semiconductor substrate of a first conductivity type. The TVS circuit integrated with the EMI filter further includes a ground terminal disposed on the surface for the symmetric bi-directional blocking structure and at the bottom of the semiconductor substrate for the uni-directional blocking structure and an input and an output terminal disposed on a top surface with at least a Zener diode and a plurality of capacitors disposed in the semiconductor substrate to couple the ground terminal to the input and output terminals with a direct capacitive coupling without an intermediate floating body region.

摘要翻译： 具有与第一导电类型的半导体衬底上支持的电磁干扰（EMI）滤波器集成的具有单向阻塞和对称双向阻塞能力的瞬态电压抑制（TVS）电路。 与EMI滤波器集成的TVS电路还包括设置在用于对称双向阻塞结构的表面上的接地端子和用于单向阻塞结构的半导体衬底的底部以及设置在单向阻断结构上的输入和输出端子 具有至少齐纳二极管的顶表面和设置在半导体衬底中的多个电容器，以将接地端子连接到具有直接电容耦合而不具有中间浮体区域的输入和输出端子。

公开(公告)号：US20170141097A1

公开(公告)日：2017-05-18

申请号：US14565392

申请日：2014-12-09

申请人： Madhur Bobde ,  Wenjiang Zeng ,  Limin Weng

发明人： Madhur Bobde ,  Wenjiang Zeng ,  Limin Weng

IPC分类号： H01L27/02 ,  H01L21/283 ,  H01L21/822

CPC分类号： H01L27/0248 ,  H01L21/283 ,  H01L21/822 ,  H01L27/0262 ,  H01L27/0814 ,  H01L29/0649 ,  H01L29/1016 ,  H01L29/43 ,  H01L29/456 ,  H01L29/66371 ,  H01L29/7412

摘要： A transient voltage suppressing (TVS) device formed in an epitaxial layer of a first conductivity type supported on a semiconductor substrate. The TVS device further comprises a plurality of contact trenches opened and extended to a lower part of the epitaxial layer filled with a doped polysilicon layer of a second conductivity type wherein the trenches are further surrounded by a heavy dopant region of the second conductivity type. The TVS device further includes a metal contact layer disposed on a top surface of the epitaxial layer electrically connected to a Vcc electrode wherein the metal contact layer further directly contacting the doped polysilicon layer and the heavy dopant region of the second conductivity type.