公开(公告)号：US20080258147A1

公开(公告)日：2008-10-23

申请号：US12143035

申请日：2008-06-20

申请人： Hongyong ZHANG ,  Toru TAKAYAMA ,  Yasuhiko TAKEMURA ,  Akiharu MIYANAGA ,  Hisashi OHTANI

发明人： Hongyong ZHANG ,  Toru TAKAYAMA ,  Yasuhiko TAKEMURA ,  Akiharu MIYANAGA ,  Hisashi OHTANI

IPC分类号： H01L29/04

CPC分类号： H01L29/045 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757

摘要： In thin film transistors (TFTs) having an active layer of crystalline silicon adapted for mass production, a catalytic element is introduced into doped regions of an amorphous silicon film by ion implantation or other means. This film is crystallized at a temperature below the strain point of the glass substrate. Further, a gate insulating film and a gate electrode are formed. Impurities are introduced by a self-aligning process. Then, the laminate is annealed below the strain point of the substrate to activate the dopant impurities. On the other hand, Neckel or other element is also used as a catalytic element for promoting crystallization of an amorphous silicon film. First, this catalytic element is applied in contact with the surface of the amorphous silicon film. The film is heated at 450 to 650° C. to create crystal nuclei. The film is further heated at a higher temperature to grow the crystal grains. In this way, a crystalline silicon film having improved crystallinity is formed.

摘要翻译： 在具有适于批量生产的结晶硅有源层的薄膜晶体管（TFT）中，通过离子注入或其它方式将催化元素引入到非晶硅膜的掺杂区域中。 该膜在低于玻璃基板的应变点的温度下结晶。 此外，形成栅极绝缘膜和栅电极。 杂质通过自对准过程引入。 然后，层压体在基板的应变点以下退火以活化掺杂剂杂质。 另一方面，Neckel或其它元素也用作促进非晶硅膜结晶的催化元素。 首先，将该催化元件与非晶硅膜的表面接触。 将膜在450至650℃加热以产生晶核。 将膜进一步在较高温度下加热以生长晶粒。 以这种方式，形成具有改善的结晶度的晶体硅膜。

公开(公告)号：US20120034766A1

公开(公告)日：2012-02-09

申请号：US13209861

申请日：2011-08-15

申请人： Hisashi OHTANI ,  Akiharu MIYANAGA ,  Takeshi FUKUNAGA ,  Hongyong ZHANG

发明人： Hisashi OHTANI ,  Akiharu MIYANAGA ,  Takeshi FUKUNAGA ,  Hongyong ZHANG

IPC分类号： H01L21/20

CPC分类号： H01L21/02672 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02686 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/045 ,  H01L29/66757 ,  H01L29/66772 ,  H01L29/78654 ,  H01L29/78675 ,  H01L29/78678 ,  Y10S148/016

摘要： A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.

摘要翻译： 一种用于制造高度稳定和可靠的半导体的方法，包括：用含有能够加速非晶硅膜结晶的催化剂元素的溶液涂覆非晶硅膜的表面，然后对非晶硅膜进行热处理，使其结晶 电影。

公开(公告)号：US20120068266A1

公开(公告)日：2012-03-22

申请号：US13282515

申请日：2011-10-27

申请人： Hongyong ZHANG ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

发明人： Hongyong ZHANG ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

IPC分类号： H01L27/12

CPC分类号： H01L21/02672 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1251 ,  H01L27/1277 ,  H01L27/1281 ,  H01L29/66757

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor having low leak current and high mobility are obtained in the same time in a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜上或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下进行退火， 。 在具有薄膜晶体管的动态电路中同时获得具有低漏电流和高迁移率的晶体管，在半导体层上选择性地形成覆盖膜，半导体层将成为晶体管的有源层，并且之后将其热结晶 。

公开(公告)号：US20100081247A1

公开(公告)日：2010-04-01

申请号：US12579642

申请日：2009-10-15

申请人： Hongyong ZHANG ,  Hideki UOCHI ,  Toru TAKAYAMA ,  Takeshi FUKUNAGA ,  Yasuhiko TAKEMURA

发明人： Hongyong ZHANG ,  Hideki UOCHI ,  Toru TAKAYAMA ,  Takeshi FUKUNAGA ,  Yasuhiko TAKEMURA

IPC分类号： H01L21/268

CPC分类号： H01L21/02672 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1251 ,  H01L27/1277 ,  H01L27/1281 ,  H01L29/66757

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film an a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜上或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下进行退火， 。 通过选择性地形成覆盖膜来形成具有薄膜晶体管的动态电路，同时获得漏电流低的晶体管和迁移率高的晶体管，即将成为有源层的半导体层 晶体管，然后通过其热结晶。

公开(公告)号：US20100068860A1

公开(公告)日：2010-03-18

申请号：US12621537

申请日：2009-11-19

申请人： Hongyong ZHANG ,  Yasuhiko TAKEMURA ,  Toshimitsu KONUMA ,  Hideto OHNUMA ,  Naoaki YAMAGUCHI ,  Hideomi SUZAWA ,  Hideki UOCHI

发明人： Hongyong ZHANG ,  Yasuhiko TAKEMURA ,  Toshimitsu KONUMA ,  Hideto OHNUMA ,  Naoaki YAMAGUCHI ,  Hideomi SUZAWA ,  Hideki UOCHI

IPC分类号： H01L21/336

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.

摘要翻译： 提供了一种方法，通过该方法可以容易地形成轻掺杂漏极（LDD）区域，并且在具有覆盖有氧化物覆盖层的栅电极的薄膜晶体管中的源/漏区域中以良好的产率形成。 通过以栅极电极作为掩模，以自对准的方式将杂质引入岛状硅膜中形成轻掺杂漏极（LDD）区域。 首先，通过使用旋转 - 倾斜离子注入在岛状硅膜中形成低浓度杂质区，以相对于衬底从倾斜方向进行离子掺杂。 此时也在栅电极下方形成低浓度杂质区。 之后，将高浓度的杂质通常引入衬底，从而形成高浓度杂质区域。 在上述过程中，低浓度杂质区域保留在栅电极下方并构成轻掺杂漏区。

公开(公告)号：US20110068339A1

公开(公告)日：2011-03-24

申请号：US12958739

申请日：2010-12-02

申请人： Toshimitsu KONUMA ,  Akira SUGAWARA ,  Yukiko UEHARA ,  Hongyong ZHANG ,  Atsunori SUZUKI ,  Hideto OHNUMA ,  Naoaki YAMAGUCHI ,  Hideomi SUZAWA ,  Hideki UOCHI ,  Yasuhiko TAKEMURA

发明人： Toshimitsu KONUMA ,  Akira SUGAWARA ,  Yukiko UEHARA ,  Hongyong ZHANG ,  Atsunori SUZUKI ,  Hideto OHNUMA ,  Naoaki YAMAGUCHI ,  Hideomi SUZAWA ,  Hideki UOCHI ,  Yasuhiko TAKEMURA

IPC分类号： H01L29/772 ,  H01L27/12

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US20100041187A1

公开(公告)日：2010-02-18

申请号：US12604879

申请日：2009-10-23

申请人： Yasuhiko TAKEMURA ,  Hongyong ZHANG ,  Satoshi TERAMOTO

发明人： Yasuhiko TAKEMURA ,  Hongyong ZHANG ,  Satoshi TERAMOTO

IPC分类号： H01L21/336

CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78696 ,  Y10S257/90

摘要： A thin film transistor device reduced substantially in resistance between the source and the drain by incorporating a silicide film, which is fabricated by a process comprising forming a gate insulator film and a gate contact on a silicon substrate, anodically oxidizing the gate contact, covering an exposed surface of the silicon semiconductor with a metal and irradiating an intense light such as a laser beam to the metal film either from the upper side or from an insulator substrate side to allow the metal coating to react with silicon to obtain a silicide film. The metal silicide layer may be obtained otherwise by tightly adhering a metal coating to the exposed source and drain regions using an insulator formed into an approximately triangular shape, preferably 1 μm or less in width, and allowing the metal to react with silicon.

摘要翻译： 薄膜晶体管器件通过并入硅化物膜而在源极和漏极之间的电阻基本上减小，该硅化物膜通过包括在硅衬底上形成栅极绝缘膜和栅极接触的方法制造，阳极氧化栅极接触，覆盖 用金属暴露出硅半导体的表面，并从激光束的上侧或从绝缘体基板侧向金属膜照射激光等强光，使金属被膜与硅反应，得到硅化物膜。 金属硅化物层可以通过使用形成为大致三角形形状的绝缘体（优选为1μm以下）的宽度紧密地将金属涂层紧密地粘接到暴露的源极和漏极区域，并且允许金属与硅反应的方式获得。

公开(公告)号：US20090072238A1

公开(公告)日：2009-03-19

申请号：US12277547

申请日：2008-11-25

申请人： Shunpei YAMAZAKI ,  Yasuhiko TAKEMURA ,  Hongyong ZHANG

发明人： Shunpei YAMAZAKI ,  Yasuhiko TAKEMURA ,  Hongyong ZHANG

IPC分类号： H01L33/00

CPC分类号： H01L27/127 ,  G02F1/13454 ,  G02F2001/136245 ,  H01L21/76897 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78651 ,  H01L29/78666 ,  H01L29/78675

摘要： An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.

摘要翻译： 制造LDD结构以具有期望的高度与栅电极的宽度的纵横比。 首先将栅电极沉积在半导体衬底上，随后以栅电极作为掩模进行离子注入，以形成一对杂质区。 然后对栅电极进行阳极氧化，形成包围电极的氧化膜。 以氧化物膜为掩模，通过离子注入形成高度掺杂的区域，以便在高掺杂区域和位于它们之间的沟道区域之间限定轻掺杂区域。

公开(公告)号：US20090152631A1

公开(公告)日：2009-06-18

申请号：US12369578

申请日：2009-02-11

申请人： Yasuhiko TAKEMURA ,  Hongyong ZHANG ,  Satoshi TERAMOTO

发明人： Yasuhiko TAKEMURA ,  Hongyong ZHANG ,  Satoshi TERAMOTO

IPC分类号： H01L27/12

CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78696 ,  Y10S257/90

摘要： A thin film transistor device reduced substantially in resistance between the source and the drain by incorporating a silicide film, which is fabricated by a process comprising forming a gate insulator film and a gate contact on a silicon substrate, anodically oxidizing the gate contact, covering an exposed surface of the silicon semiconductor with a metal, and irradiating an intense light such as a laser beam to the metal film either from the upper side or from an insulator substrate side to allow the metal coating to react with silicon to obtain a silicide film. The metal silicide layer may be obtained otherwise by tightly adhering a metal coating to the exposed source and drain regions using an insulator formed into an approximately triangular shape, preferably 1 μm or less in width, and allowing the metal to react with silicon.

摘要翻译： 薄膜晶体管器件通过并入硅化物膜而在源极和漏极之间的电阻基本上减小，该硅化物膜通过包括在硅衬底上形成栅极绝缘膜和栅极接触的方法制造，阳极氧化栅极接触，覆盖 用金属暴露硅半导体的表面，并从激光束的上侧或从绝缘体基板侧向金属膜照射激光等强光，使金属被膜与硅反应，得到硅化物膜。 金属硅化物层可以通过使用形成为大致三角形形状的绝缘体（优选为1μm以下）的宽度紧密地将金属涂层紧密地粘附到暴露的源极和漏极区域，并且允许金属与硅反应来获得。

公开(公告)号：US20070153169A1

公开(公告)日：2007-07-05

申请号：US11684980

申请日：2007-03-12

申请人： Hongyong ZHANG

发明人： Hongyong ZHANG

IPC分类号： G02F1/1333

CPC分类号： G02F1/136213 ,  G02F1/133512 ,  H01L27/1255

摘要： A metal electrode also serving as a black matrix is so formed as to cover the periphery of an ITO pixel electrode. A region where the pixel electrode and the metal electrode coextend also serves as an auxiliary capacitor. Since the auxiliary capacitor can be formed by using a thin insulating film, it can have a large capacitance. By virtue of the structure in which the black matrix also serves as the auxiliary capacitor, it is not necessary to provide an electrode dedicated to the auxiliary capacitor, thereby preventing reduction in aperture ratio. Further, the black matrix can completely shield a source line and a gate line from light.

摘要翻译： 也用作黑色矩阵的金属电极形成为覆盖ITO像素电极的周边。 像素电极和金属电极共同延伸的区域也用作辅助电容器。 由于可以通过使用薄的绝缘膜形成辅助电容器，所以可以具有大的电容。 由于黑矩阵也用作辅助电容器的结构，不需要提供专用于辅助电容器的电极，从而防止开口率的降低。 此外，黑矩阵可以完全屏蔽源极线和栅极线。