Data loading system
    1.
    发明授权

    公开(公告)号:US10942753B2

    公开(公告)日:2021-03-09

    申请号:US16277258

    申请日:2019-02-15

    Inventor: Yansong Li

    Abstract: A data loading system includes a processing circuit, a nonvolatile memory, and a programmable logic device. The processing circuit and the programmable logic device are separately coupled to different data interfaces of the nonvolatile memory. The nonvolatile memory stores start code of the processing circuit and configuration data of the programmable logic device, and the processing circuit and the programmable logic device are configured to respectively obtain the start code and the configuration data from the nonvolatile memory at the same time under the action of a first synchronization clock. Hence, the system increases a speed and reliability of data loading and increases a start speed and reliability of a board.

    Nonvolatile memory and electronic device
    2.
    发明授权
    Nonvolatile memory and electronic device 有权
    非易失性存储器和电子设备

    公开(公告)号:US09424442B2

    公开(公告)日:2016-08-23

    申请号:US14559177

    申请日:2014-12-03

    Inventor: Yansong Li

    CPC classification number: G06F21/79 G06F7/584

    Abstract: The embodiments of the present invention disclose a nonvolatile memory and an electronic device, where each time the nonvolatile memory is powered on, an exchanger is used to implement a random exchange of at least one address subsignal and its inverted signal in a bank decoder and/or a row decoder in a bank and/or a column decoder in a bank, which causes that data stored before the nonvolatile memory is powered off is interrupted when the nonvolatile memory is powered off and then powered on and that data stored in the nonvolatile memory cannot be read sequentially from original storage addresses to achieve an encrypting effect and increase security of the data stored in the nonvolatile memory.

    Abstract translation: 本发明的实施例公开了一种非易失性存储器和电子设备,其中每当非易失性存储器通电时,交换器被用于在存储体解码器中执行至少一个地址二次信号及其反相信号的随机交换,和/ 或存储体中的行解码器和/或列解码器中的行解码器,其导致当非易失性存储器断电然后通电并且存储在非易失性存储器中的数据时中断非易失性存储器断电之前存储的数据 不能从原始存储地址顺序读取以实现加密效果并增加存储在非易失性存储器中的数据的安全性。

    REDUNDANT ARRAY OF INDEPENDENT DISKS RAID CONTROLLER AND SYSTEM
    3.
    发明申请
    REDUNDANT ARRAY OF INDEPENDENT DISKS RAID CONTROLLER AND SYSTEM 有权
    冗余磁盘阵列RAID控制器和系统的冗余阵列

    公开(公告)号:US20130191592A1

    公开(公告)日:2013-07-25

    申请号:US13715534

    申请日:2012-12-14

    Inventor: Yansong Li

    Abstract: A redundant array of independent disks (RAID) controller includes a host interface, a processing core and a storage interface. The processing core is connected to a host and a hard disk. The RAID controller includes a halt control pin connected to the processing core and a control signal line in the host. The processing core receives a first level sent through the control signal line by the host when the hard disk is in a standby state, and halt an execution of a program in the processing core according to the first level; receives a second level sent through the control signal line by the host when the host receives a service request, and resume the execution of the program according to the second level; and receive the service request sent by the host and send the received service request to the hard disk to awaken the hard disk.

    Abstract translation: 独立磁盘(RAID)控制器的冗余阵列包括主机接口,处理核心和存储接口。 处理核心连接到主机和硬盘。 RAID控制器包括连接到处理核心的停止控制引脚和主机中的控制信号线。 当硬盘处于待机状态时,处理核心通过主机接收通过控制信号线发送的第一电平,并根据第一电平停止执行处理核心中的程序; 当主机接收到服务请求时,接收由主机通过控制信号线发送的第二级,并根据第二级继续执行程序; 并接收主机发送的服务请求,并将接收到的服务请求发送到硬盘以唤醒硬盘。

    Data Loading System
    4.
    发明申请
    Data Loading System 审中-公开

    公开(公告)号:US20190179644A1

    公开(公告)日:2019-06-13

    申请号:US16277258

    申请日:2019-02-15

    Inventor: Yansong Li

    Abstract: A data loading system includes a processing circuit, a nonvolatile memory, and a programmable logic device. The processing circuit and the programmable logic device are separately coupled to different data interfaces of the nonvolatile memory. The nonvolatile memory stores start code of the processing circuit and configuration data of the programmable logic device, and the processing circuit and the programmable logic device are configured to respectively obtain the start code and the configuration data from the nonvolatile memory at the same time under the action of a first synchronization clock. Hence, the system increases a speed and reliability of data loading and increases a start speed and reliability of a board.

    PCI express device and link energy management method and device
    5.
    发明授权
    PCI express device and link energy management method and device 有权
    PCI Express设备和链路能量管理方法及装置

    公开(公告)号:US09423864B2

    公开(公告)日:2016-08-23

    申请号:US14083826

    申请日:2013-11-19

    Inventor: Yansong Li

    Abstract: Embodiments of the present invention disclose a PCI express device, and a link energy management method and device. The method includes: obtaining, by a first device, adjustment information for performing adjustment processing on a current rate and/or bit width of a PCI express link; stopping, by the first device, data sending, and clearing a master enable bit of a configuration space command register of a second device at an opposite end of the link, so that the second device stops data sending after current data sending is finished; performing, by the first device, adjustment processing on the rate and/or bit width of the link according to the adjustment information; resuming, by the first device, the data sending, and resetting the master enable bit, so that the first device and the second device send and receive data again at a rate and/or bit width that is obtained after the adjustment processing.

    Abstract translation: 本发明的实施例公开了一种PCI快速装置和链路能量管理方法和装置。 该方法包括:由第一设备获取用于对PCI Express链路的当前速率和/或比特宽度进行调整处理的调整信息; 由第一设备停止数据发送和清除链路相对端的第二设备的配置空间命令寄存器的主使能位,使得第二设备在当前数据发送完成之后停止数据发送; 通过第一设备对根据调整信息的链路的速率和/或比特宽度进行调整处理; 由第一设备恢复数据发送和复位主使能位,使得第一设备和第二设备以调整处理之后获得的速率和/或位宽再次发送和接收数据。

    METHOD FOR BACKING UP DATA IN A CASE OF POWER FAILURE OF STORAGE SYSTEM, AND STORAGE SYSTEM CONTROLLER
    6.
    发明申请
    METHOD FOR BACKING UP DATA IN A CASE OF POWER FAILURE OF STORAGE SYSTEM, AND STORAGE SYSTEM CONTROLLER 有权
    在存储系统电源故障案例中备份数据的方法和存储系统控制器

    公开(公告)号:US20150081958A1

    公开(公告)日:2015-03-19

    申请号:US14529477

    申请日:2014-10-31

    Inventor: Yansong Li

    CPC classification number: G06F1/30 G06F11/1438 G06F11/1461

    Abstract: The present invention discloses a method for backing up data in a case of a power failure of a storage system including: when a power failure is detected, acquiring current refresh progress of a buffer in a storage system, an address, in the buffer, of data that is in the buffer and needs to be backed up to a non-volatile memory in the storage system, and a first time required for backing up the data; calculating, according to the current refresh progress of the buffer and the address of the data in the buffer, a second time for which the data can at least keep being not lost since a last refresh; and stopping refreshing the buffer, and backing up the data to the non-volatile memory, if the second time is greater than the first time.

    Abstract translation: 本发明公开了一种在存储系统的电源故障的情况下备份数据的方法,包括:当检测到电源故障时,获取存储系统中的缓冲器的当前刷新进度,缓冲器中的地址, 数据位于缓冲区中,需要备份到存储系统中的非易失性存储器中,并且首次备份数据; 根据缓冲区的当前刷新进度和缓冲器中的数据的地址来计算,自上次刷新以来,数据可以至少保持不丢失的第二次; 并停止刷新缓冲区,并将数据备份到非易失性存储器,如果第二次大于第一次。

    Method and Apparatus for Adjusting Device Power Consumption
    7.
    发明申请
    Method and Apparatus for Adjusting Device Power Consumption 有权
    调整设备功耗的方法和装置

    公开(公告)号:US20140115357A1

    公开(公告)日:2014-04-24

    申请号:US14088880

    申请日:2013-11-25

    CPC classification number: G06F1/3234 G06F1/3206

    Abstract: The present invention discloses a method for adjusting device power consumption including: grouping multiple devices into at least one device group, setting a group power consumption ceiling threshold (PCCT) for the device group, and setting a device PCCT for each device in the group; obtaining current total power consumption of the group, and when the current total power consumption of the group exceeds the group PCCT, determining whether current power consumption of each device in the group exceeds the device PCCT of the device; when the current power consumption of each device exceeds the device PCCT of the device, reducing power consumption of each device to the device PCCT of the device; and when current power consumption of a device exceeds a device PCCT of the device, setting a new PCCT for the device, and reducing power consumption of the device to/or less than the new PCCT.

    Abstract translation: 本发明公开了一种用于调整设备功耗的方法,包括:将多个设备分组成至少一个设备组,为设备组设置组功耗上限阈值(PCCT),并为组中的每个设备设置设备PCCT; 获取组的当前总功耗,当组的当前总功耗超过组PCCT时,确定组中每个设备的当前功耗是否超过设备的设备PCCT; 当每个设备的当前功耗超过设备的设备PCCT时,将设备的设备PCCT的每个设备的功耗降低; 并且当器件的当前功耗超过器件的器件PCCT时,为器件设置新的PCCT,并将器件的功耗降低到或小于新的PCCT。

    METHOD AND APPARATUS FOR SETTING WORKING MODE OF MULTI-PROCESSOR SYSTEM
    8.
    发明申请
    METHOD AND APPARATUS FOR SETTING WORKING MODE OF MULTI-PROCESSOR SYSTEM 有权
    用于设置多处理器系统工作模式的方法和装置

    公开(公告)号:US20150039799A1

    公开(公告)日:2015-02-05

    申请号:US14519644

    申请日:2014-10-21

    Abstract: A method for setting a working mode of a multi-processor system includes: detecting, after a current board is inserted into a slot of the backplane, whether an associated board exists on the backplane; detecting, if the associated board exists, whether the associated board is in an independent working state; powering on the current board according to a slave working mode if the associated board is not in an independent working state, so as to work coordinately with the associated board; detecting, within a predetermined detection time if the associated board does not exist, whether a board is inserted into another slot of the backplane except the slot of the master board; and powering on the current board according to a master working mode if it is detected that the board is inserted, so as to work coordinately with the board in the other slot.

    Abstract translation: 一种用于设置多处理器系统的工作模式的方法,包括:在当前板插入到背板的槽中之后,检测背板上是否存在相关的板; 如果相关的板存在,检测相关板是否处于独立工作状态; 如果相关的董事会不处于独立工作状态,则按照从属工作模式开启当前的董事会,以便与相关的董事会协调工作; 在相关板不存在的预定检测时间内检测板是否被插入除了主板的槽之外的背板的另一个槽中; 如果检测到板插入,则根据主工作模式对当前板进行上电,以便与另一个插槽中的板协调工作。

    Method and apparatus for detecting interface connection between devices

    公开(公告)号:US09811496B2

    公开(公告)日:2017-11-07

    申请号:US14512795

    申请日:2014-10-13

    CPC classification number: G06F13/42 H04L69/24

    Abstract: A method for detecting an interface connection between devices is disclosed, including setting a recommended working parameter of a first interface as a first working parameter; obtaining, by using an auto negotiation operation, a second working parameter of a second interface; determining whether the second working parameter is equal to the first working parameter, and if the second working parameter is not equal to the first working parameter, sending an alarm to indicate that a connection is unmatched; if the second working parameter is equal to the first working parameter, setting the recommended working parameter of the first interface as a third working parameter, sending, by using the auto negotiation operation, the third working parameter to the second interface, and receiving the third working parameter sent by a second device through the second interface, so that the first interface communicates with the second interface by using the third working parameter.

    Write operation method and device for phase change memory
    10.
    发明授权
    Write operation method and device for phase change memory 有权
    相变存储器的写操作方法和装置

    公开(公告)号:US09305647B2

    公开(公告)日:2016-04-05

    申请号:US14532196

    申请日:2014-11-04

    Inventor: Yansong Li

    Abstract: A write operation method for a phase change memory (PCM) is disclosed. The method includes when a PCM performs a write operation, generating a corresponding voltage pulse signal according to to-be-written data, and applying the voltage pulse signal to a phase change material included in a phase change storage unit corresponding to the to-be-written data and applying the voltage pulse signal to a voltage divider resistor serially connected to the phase change material; comparing voltage values at both ends of a sampling resistor with a threshold voltage to generate an indicator value; determining, according to the indicator value, whether data that is stored in the phase change storage unit and is corresponding to the indicator value is the same as the to-be-written data; and skipping writing if the same; or writing if different, thus reducing the delay time of writing data into the phase change storage unit.

    Abstract translation: 公开了一种用于相变存储器(PCM)的写入操作方法。 该方法包括当PCM执行写入操作时,根据写入的数据产生相应的电压脉冲信号,并将电压脉冲信号施加到相应于待更改的相变存储单元中的相变材料 写入数据并将电压脉冲信号施加到串联连接到相变材料的分压电阻器; 将采样电阻两端的电压值与阈值电压进行比较,生成指标值; 根据指标值确定存储在相变存储单元中并且与指示符值相对应的数据是否与待写入数据相同; 并跳过写作如果相同; 或如果不同则进行写入,从而减少将数据写入相变存储单元的延迟时间。

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