公开(公告)号：US08671564B2

公开(公告)日：2014-03-18

申请号：US12554762

申请日：2009-09-04

申请人： Hueng Jae Oh ,  Tae Joon Chung ,  Dong Gyu Lee ,  Seon Jae Mun ,  Jin Won Choi

发明人： Hueng Jae Oh ,  Tae Joon Chung ,  Dong Gyu Lee ,  Seon Jae Mun ,  Jin Won Choi

IPC分类号： H01K3/10

CPC分类号： H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12042 ,  H05K3/243 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/1025 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00

摘要： Disclosed is a substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided.

摘要翻译： 公开了一种用于倒装芯片接合的基板，其中在焊盘和金属柱之间形成基底焊料层，从而提高耐冲击性和安装可靠性。 还提供了一种制造用于倒装芯片接合的基板的方法。

公开(公告)号：US08486760B2

公开(公告)日：2013-07-16

申请号：US12923621

申请日：2010-09-29

申请人： Tae Joon Chung ,  Jin Won Choi ,  Dong Gyu Lee ,  Hueng Jae Oh ,  Seon Jae Mun

发明人： Tae Joon Chung ,  Jin Won Choi ,  Dong Gyu Lee ,  Hueng Jae Oh ,  Seon Jae Mun

IPC分类号： H01L23/522

CPC分类号： H05K3/4007 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2203/043 ,  H05K2203/054 ,  H01L2924/00014 ,  H01L2224/13099

摘要： There is provided a method of manufacturing a substrate for flip chip, and a substrate for flip chip manufactured using the same. The method includes providing a base substrate including at least one conductive pad, forming a solder resist layer on the base substrate, the solder resist layer including a first opening exposing the conductive pad, forming a dry film on the solder resist layer, the dry film including a second opening connected with the first opening, forming a metal post in the first opening and a part of the second opening, filling the second opening above the metal post with solder paste, forming a solder cap by performing a reflow process on the filled solder paste, planarizing a surface of the solder cap, and removing the dry film. Accordingly, fine pitches and improve reliability can be achieved.

摘要翻译： 提供了制造用于倒装芯片的基板的方法和使用其制造的用于倒装芯片的基板。 该方法包括提供包括至少一个导电焊盘的基底衬底，在基底衬底上形成阻焊层，阻焊层包括暴露导电焊盘的第一开口，在阻焊层上形成干膜，干膜 包括与所述第一开口连接的第二开口，在所述第一开口中形成金属柱和所述第二开口的一部分，用焊膏填充所述金属柱上方的所述第二开口，通过对填充的所述第二开口进行回流处理来形成焊料盖 焊膏，使焊盘的表面平坦化，并除去干膜。 因此，可以实现精细的间距和提高可靠性。

公开(公告)号：US20100314161A1

公开(公告)日：2010-12-16

申请号：US12554762

申请日：2009-09-04

申请人： Hueng Jae OH ,  Tae Joon Chung ,  Dong Gyu Lee ,  Seon Jae Mun ,  Jin Won Choi

发明人： Hueng Jae OH ,  Tae Joon Chung ,  Dong Gyu Lee ,  Seon Jae Mun ,  Jin Won Choi

IPC分类号： H05K1/09 ,  B05D5/12

CPC分类号： H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12042 ,  H05K3/243 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/1025 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00

摘要： Disclosed is a substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided.

摘要翻译： 公开了一种用于倒装芯片接合的基板，其中在焊盘和金属柱之间形成基底焊料层，从而提高耐冲击性和安装可靠性。 还提供了一种制造用于倒装芯片接合的基板的方法。

公开(公告)号：US20110079926A1

公开(公告)日：2011-04-07

申请号：US12923621

申请日：2010-09-29

申请人： Tae Joon Chung ,  Jin Won Choi ,  Dong Gyu Lee ,  Hueng Jae Oh ,  Seon Jae Mun

发明人： Tae Joon Chung ,  Jin Won Choi ,  Dong Gyu Lee ,  Hueng Jae Oh ,  Seon Jae Mun

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H05K3/4007 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2203/043 ,  H05K2203/054 ,  H01L2924/00014 ,  H01L2224/13099

摘要： There is provided a method of manufacturing a substrate for flip chip, and a substrate for flip chip manufactured using the same. The method includes providing a base substrate including at least one conductive pad, forming a solder resist layer on the base substrate, the solder resist layer including a first opening exposing the conductive pad, forming a dry film on the solder resist layer, the dry film including a second opening connected with the first opening, forming a metal post in the first opening and a part of the second opening, filling the second opening above the metal post with solder paste, forming a solder cap by performing a reflow process on the filled solder paste, planarizing a surface of the solder cap, and removing the dry film. Accordingly, fine pitches and improve reliability can be achieved.

摘要翻译： 提供了制造用于倒装芯片的基板的方法和使用其制造的用于倒装芯片的基板。 该方法包括提供包括至少一个导电焊盘的基底衬底，在基底衬底上形成阻焊层，阻焊层包括暴露导电焊盘的第一开口，在阻焊层上形成干膜，干膜 包括与所述第一开口连接的第二开口，在所述第一开口中形成金属柱和所述第二开口的一部分，用焊膏填充所述金属柱上方的所述第二开口，通过对所述第一开口进行回流处理来形成焊料盖 焊膏，使焊盘的表面平坦化，并除去干膜。 因此，可以实现精细的间距和提高可靠性。

公开(公告)号：US20100132998A1

公开(公告)日：2010-06-03

申请号：US12379760

申请日：2009-02-27

申请人： Dong Gyu Lee ,  Jin Won Choi ,  Young Gwan Ko ,  Seon Jae Mun ,  Tae Joon Chung

发明人： Dong Gyu Lee ,  Jin Won Choi ,  Young Gwan Ko ,  Seon Jae Mun ,  Tae Joon Chung

IPC分类号： H05K1/11 ,  B05D5/12

CPC分类号： H05K3/3484 ,  H01L23/49816 ,  H01L23/49894 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/13022 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H05K3/243 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/0568 ,  H05K2203/0571 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2224/05552

摘要： The invention relates to a substrate having a metal post and a method of manufacturing the same, in which a round solder bump part formed on a metal post melts and flows down along a lateral surface of the metal post by being subjected twice to a reflow process, thus forming a solder bump film for preventing oxidation and corrosion of the metal post.

摘要翻译： 本发明涉及一种具有金属柱的基板及其制造方法，其中形成在金属柱上的圆形焊料凸块部件通过经受两次回流工艺而沿着金属柱的侧表面熔化并向下流动 ，从而形成用于防止金属柱的氧化和腐蚀的焊料凸块膜。

公开(公告)号：US20110186991A1

公开(公告)日：2011-08-04

申请号：US12926314

申请日：2010-11-09

申请人： Dong Gyu Lee ,  Dae Young Lee ,  Tae Joon Chung ,  Seon Jae Mun ,  Jin Won Choi

发明人： Dong Gyu Lee ,  Dae Young Lee ,  Tae Joon Chung ,  Seon Jae Mun ,  Jin Won Choi

IPC分类号： H01L23/485 ,  H01L21/441

CPC分类号： H01L21/4853 ,  H01L21/441 ,  H01L23/485 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13082

摘要： There is provided a package substrate capable of controlling the degree of warpage thereof by improving the composition and formation of a post terminal and a method of fabricating the same. The package substrate includes a substrate having at least one conductive pad; an insulating layer provided on the substrate and having an opening to expose the conductive pad; a separation barrier layer provided on the conductive pad inside the opening and formed to be higher than the upper surface of the insulating layer along the side walls thereof; a post terminal provided on the separation barrier layer; and a solder bump provided on the post terminal.

摘要翻译： 提供一种能够通过改善后端子的组成和形成来控制其翘曲程度的封装基板及其制造方法。 封装衬底包括具有至少一个导电焊盘的衬底; 绝缘层，设置在所述基板上并具有用于暴露所述导电焊盘的开口; 隔离层，设置在所述开口内的所述导电垫上，并形成为比所述绝缘层的所述侧壁的上表面高; 设置在分离阻挡层上的柱状端子; 以及设置在柱端子上的焊料凸块。

公开(公告)号：US20110133332A1

公开(公告)日：2011-06-09

申请号：US12926279

申请日：2010-11-05

申请人： Seon Jae Mun ,  Dae Young Lee ,  Tae Joon Chung ,  Dong Gyu Lee ,  Jin Won Choi

发明人： Seon Jae Mun ,  Dae Young Lee ,  Tae Joon Chung ,  Dong Gyu Lee ,  Jin Won Choi

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L23/49811 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a package substrate allowing for enhanced reliability by improving the structure of a solder bump and a method of fabricating the same. The package substrate includes: a substrate having at least one conductive pad; an insulating layer provided on the substrate and having an opening to expose the conductive pad; a post terminal provided on the conductive pad inside the opening; and a solder bump provided on the post terminal and having an angle between a bottom surface and a side surface thereof ranging from 80° to 120°.

摘要翻译： 提供了一种通过改善焊料凸块的结构来提高可靠性的封装衬底及其制造方法。 封装衬底包括：具有至少一个导电焊盘的衬底; 绝缘层，设置在所述基板上并具有用于暴露所述导电焊盘的开口; 位于所述开口内的所述导电垫上的支柱端子; 以及设置在立柱端子上并且在其底表面和侧表面之间具有从80°至120°的角度的焊料凸块。

公开(公告)号：US08456003B2

公开(公告)日：2013-06-04

申请号：US12926314

申请日：2010-11-09

申请人： Dong Gyu Lee ,  Dae Young Lee ,  Tae Joon Chung ,  Seon Jae Mun ,  Jin Won Choi

发明人： Dong Gyu Lee ,  Dae Young Lee ,  Tae Joon Chung ,  Seon Jae Mun ,  Jin Won Choi

IPC分类号： H01L2225/06513 ,  H01L2224/9201 ,  H01L2225/06517

CPC分类号： H01L21/4853 ,  H01L21/441 ,  H01L23/485 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13082

摘要： There is provided a package substrate capable of controlling the degree of warpage thereof by improving the composition and formation of a post terminal and a method of fabricating the same. The package substrate includes a substrate having at least one conductive pad; an insulating layer provided on the substrate and having an opening to expose the conductive pad; a separation barrier layer provided on the conductive pad inside the opening and formed to be higher than the upper surface of the insulating layer along the side walls thereof; a post terminal provided on the separation barrier layer; and a solder bump provided on the post terminal.

摘要翻译： 提供一种能够通过改善后端子的组成和形成来控制其翘曲程度的封装基板及其制造方法。 封装衬底包括具有至少一个导电焊盘的衬底; 绝缘层，设置在所述基板上并具有用于暴露所述导电焊盘的开口; 隔离层，设置在所述开口内的所述导电垫上，并形成为比所述绝缘层的所述侧壁的上表面高; 设置在分离阻挡层上的柱状端子; 以及设置在柱端子上的焊料凸块。