公开(公告)号：US6163957A

公开(公告)日：2000-12-26

申请号：US192003

申请日：1998-11-13

申请人： Hunt Hang Jiang ,  Thomas Massingill ,  Mark Thomas McCormack ,  Michael Guang-Tzong Lee

发明人： Hunt Hang Jiang ,  Thomas Massingill ,  Mark Thomas McCormack ,  Michael Guang-Tzong Lee

IPC分类号： H01R12/04 ,  H01L21/48 ,  H01L23/538 ,  H05K1/14 ,  H05K3/00 ,  H05K3/12 ,  H05K3/28 ,  H05K3/36 ,  H05K3/40 ,  H05K3/46 ,  H01K3/10

CPC分类号： H05K3/4617 ,  H01L21/4857 ,  H01L23/5385 ,  H01L2924/0002 ,  H05K3/0035 ,  H05K3/1216 ,  H05K3/28 ,  H05K3/4069 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0394 ,  H05K2203/0191 ,  H05K2203/1453 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49165 ,  Y10T29/49167 ,  Y10T428/31678 ,  Y10T428/31681 ,  H01L2924/00

摘要： Multilayer circuit lamination methods and circuit layer structures are disclosed which enable one to manufacture high-density multichip module boards and the like at lower cost, with higher yield, with higher signal densities, and with fewer processing steps.

摘要翻译： 公开了多层电路层叠方法和电路层结构，其能够以更低的成本，更高的产量，更高的信号密度和更少的处理步骤来制造高密度多芯片模块板等。

公开(公告)号：US06428942B1

公开(公告)日：2002-08-06

申请号：US09429854

申请日：1999-10-28

申请人： Hunt Hang Jiang ,  Yasuhito Takahashi ,  Michael Guang-Tzong Lee ,  Wen-chou Vincent Wang ,  Mark McCormack

发明人： Hunt Hang Jiang ,  Yasuhito Takahashi ,  Michael Guang-Tzong Lee ,  Wen-chou Vincent Wang ,  Mark McCormack

IPC分类号： G03F700

CPC分类号： H01L24/96 ,  H01L21/486 ,  H01L2221/68359 ,  H01L2224/16237 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/3011 ,  H05K3/0035 ,  H05K3/108 ,  H05K3/243 ,  H05K3/4602 ,  H05K3/4647 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1383 ,  H01L2924/00

摘要： Methods for forming multilayer circuit structures are disclosed. In some embodiments, conductive layers, dielectric layers and conductive posts can be formed on both sides of a circuitized core structure. The conductive posts are disposed in the dielectric layers and can be stacked to form a generally vertical conduction pathway which passes at least partially through a multilayer circuit structure. The formed multilayer circuit structures can occupy less space than corresponding multilayer circuit structures with stacked via structures.

摘要翻译： 公开了形成多层电路结构的方法。 在一些实施例中，可以在电路化芯结构的两侧上形成导电层，电介质层和导电柱。 导电柱设置在电介质层中并且可以被堆叠以形成通常至少部分穿过多层电路结构的大致垂直的传导路径。 形成的多层电路结构可以占据比具有堆叠通孔结构的相应多层电路结构更小的空间。

公开(公告)号：US06187652B1

公开(公告)日：2001-02-13

申请号：US09152365

申请日：1998-09-14

申请人： William T. Chou ,  Solomon I. Beilin ,  Michael Guang-Tzong Lee ,  Michael G. Peters ,  Wen-Chou Vincent Wang

发明人： William T. Chou ,  Solomon I. Beilin ,  Michael Guang-Tzong Lee ,  Michael G. Peters ,  Wen-Chou Vincent Wang

IPC分类号： H01L2130

CPC分类号： H05K3/4623

摘要： A method of fabricating a multi-layer interconnected substrate structure. The inventive method includes forming a multi-layer structure from multiple, pre-fabricated power and/or signal substrates which are laminated together. A drill is then used to form a via through the surface of a ring-type pad down to a desired depth in the multi-layer structure. The via hole is cleaned and then filled with a conductive material. The via so formed between two or more substrates is self-aligned by using the ring pad(s). This contributes to an increased signal routing density compared to conventional methods.

摘要翻译： 一种制造多层互连衬底结构的方法。 本发明的方法包括从层压在一起的多个预制电源和/或信号基板形成多层结构。 然后使用钻头在多层结构中通过环型垫的表面形成通孔，直到所需的深度。 通孔被清洁，然后用导电材料填充。 通过使用环形垫，在两个或更多个基板之间形成的通孔是自对准的。 与常规方法相比，这有助于提高信号路由密度。

公开(公告)号：US6050832A

公开(公告)日：2000-04-18

申请号：US130871

申请日：1998-08-07

申请人： Michael Guang-Tzong Lee ,  Solomon I. Beilin ,  Wen-chou Vincent Wang

发明人： Michael Guang-Tzong Lee ,  Solomon I. Beilin ,  Wen-chou Vincent Wang

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/498 ,  H05K3/32 ,  H01R4/58 ,  H01R1/00 ,  H01R9/09

CPC分类号： H01L23/49833 ,  H01L23/49838 ,  H05K3/326 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311

摘要： An interposer structure permits a differential transverse displacement of contact pads on opposite sides of the interposer to reduce thermal stresses when the interposer is bonded to contact pads of a chip and a substrate with different thermal coefficients of expansion. The effective elasticity of the interposer between top and bottom contact pads of the interposer is facilitated by perforations which define flap-like regions. A flexible trace couples top contact pads to bottom contact pads through a via while permitting substantial transverse relative displacement of the top and bottom contact pads in flap-like regions.

摘要翻译： 插入器结构允许在插入器的相对侧上的接触焊盘的差异横向位移，以在插入器与不同的热膨胀系数的芯片和衬底的接触焊盘接合时降低热应力。 插入器的顶部和底部接触垫之间的插入件的有效弹性由定义瓣状区域的穿孔促进。 柔性迹线通过通孔将顶部接触焊盘连接到底部接触焊盘，同时允许顶部和底部接触焊盘在翼状区域中的相当大的横向相对位移。