摘要:
Wafer level packages and methods of fabricating the same are provided. In one embodiment, one of the methods comprises forming semiconductor chips having a connection pad on a wafer, patterning a bottom surface of the wafer to form a trench under the connection pad, patterning a bottom surface of the trench to form a via hole exposing the bottom surface of the connection pad, and forming a connecting device connected to the connection pad through the via hole. The invention provides a wafer level package having reduced thickness, lower fabrication costs, and increased reliability compared to conventional packages.
摘要:
Provided is a stack-type semiconductor package including a base chip having a circuit formed on one of its surfaces, at least one stack chip having a circuit stacked on the base chip, an adhesive interposed between the base chip and the stack chip, and signal transmission members formed along a lateral surface of the stack chip. The fabrication process of this stack-type semiconductor package may be simplified and the number of process operations may be lessened, thereby reducing the production time and cost. Also, a state of electrical contact of a terminal with a signal transmission member may be solidified, thereby improving the reliability of the stack-type semiconductor package. Furthermore, new post-type signal transmission members are adopted instead of wires or electrodes so that the structural stability and productivity of the stack-type semiconductor package may be markedly enhanced.
摘要:
A semiconductor device having a through electrode and a method of fabricating the same are disclosed. In one embodiment, a semiconductor device includes a first insulating layer formed on a semiconductor substrate. A wiring layer having a first aperture to expose a portion of the first insulating layer is formed on the first insulating layer. A second insulating layer is formed on an upper portion of the wiring layer and in the first aperture. A conductive pad having a second aperture to expose a portion of the second insulating layer is formed on the second insulating layer. A through hole with a width narrower than widths of the first and second apertures is formed through the first and second insulating layers and an upper portion of the semiconductor substrate. A through electrode is formed in the through hole.
摘要:
A semiconductor chip comprises a substrate including a front surface and a rear surface, the substrate having a first via hole formed in the front surface and a second via hole formed in the rear surface, a first conductive plug formed on the substrate, the first conductive plug including a first portion formed in the first via hole and a second portion protruding from the front surface of the substrate, and a second conductive plug formed on the first conductive plug, the second conductive plug having a smaller cross-sectional area than the first conductive plug.