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    Method for Processing a Laser Device
    1.
    发明申请
    Method for Processing a Laser Device 有权

    公开(公告)号：US20210384700A1

    公开(公告)日：2021-12-09

    申请号：US17340351

    申请日：2021-06-07

    Applicant: IMEC VZW

    Inventor： Charles Caer ,  Philippe Soussan ,  Deniz Sabuncuoglu Tezcan ,  Gauri Karve ,  Yunlong Li

    IPC: H01S5/026 ,  H01S5/30 ,  H01S5/042

    Abstract: The disclosure relates to a method for processing a laser device, for example a III-V on silicon laser, including: providing a carrier substrate; forming a grating structure on the carrier substrate, wherein the grating structure delimits a cavity on a surface of the carrier substrate; placing a die in the cavity and bonding the die to the carrier substrate, wherein the die comprises an active region including a III-V semiconductor material; transferring the die from the carrier substrate to a silicon substrate by bonding an exposed side of the die to the silicon substrate and subsequently debonding the carrier substrate from the die; and forming a photonic structure, for example a silicon waveguide, coupled to the die.

    METHOD OF PRODUCING HYBRID SEMICONDUCTOR WAFER
    2.
    发明公开
    METHOD OF PRODUCING HYBRID SEMICONDUCTOR WAFER 审中-公开

    公开(公告)号：US20230154914A1

    公开(公告)日：2023-05-18

    申请号：US18055763

    申请日：2022-11-15

    Applicant: IMEC VZW

    Inventor： Gauri Karve ,  Yunlong Li ,  Luc Haspeslagh ,  Philippe Soussan ,  Deniz Sabuncuoglu Tezcan

    IPC: H01L25/00 ,  H01L21/56

    CPC classification number: H01L25/50 ,  H01L21/561 ,  H01L21/568

    Abstract: According to a preferred embodiment of the method of the invention, an assembly is produced comprising a temporary wafer and one or more tiles that are removably attached to the temporary wafer, preferably through a temporary adhesive layer. The tiles comprise a carrier portion and an active material portion. The active material portion is attached to the temporary carrier. The assembly further comprises a single continuous layer of the first material surrounding each of the one or more tiles. Then the back side of the carrier portions of the tiles and of the continuous layer of the first material are simultaneously planarized, and the planarized back sides of the tiles and of the continuous layer of the first material are bonded to a permanent carrier wafer, after which the temporary carrier wafer is removed. The method results in a hybrid wafer comprising a planar top layer formed of the material of the continuous layer with one or more islands embedded therein, the top layer of the islands being formed by the top layer of the active material portion of the one or more tiles.

    INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING INTEGRATED CIRCUIT
    3.
    发明申请
    INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING INTEGRATED CIRCUIT 有权
    集成电路和制造集成电路的方法

    公开(公告)号：US20170005132A1

    公开(公告)日：2017-01-05

    申请号：US15191412

    申请日：2016-06-23

    Applicant: IMEC VZW

    Inventor： Bart Vereecke ,  Deniz Sabuncuoglu Tezcan ,  Philippe Soussan

    IPC: H01L27/146

    CPC classification number: H01L27/14685 ,  G01J3/0259 ,  G01J3/50 ,  G01J3/513 ,  G01J2003/1226 ,  H01L27/1461 ,  H01L27/14623 ,  H01L27/14625 ,  H01L27/14629 ,  H01L27/14643

    Abstract: An integrated circuit for an imaging device including an array of photo-sensitive areas is disclosed. In one aspect the integrated circuit includes a first multi-layer structure and a second multi-layer structure arranged over a first and a second photo-sensitive area, respectively. The second multi-layer structures each have a bottom and a top reflective structure and a spacer layer arranged therebetween. The spacer layer has a thickness such that the multi-layer structure selectively transmits a narrow range of wavelengths of electro-magnetic radiation. The bottom and top reflective structures include a stack of alternating layers of a first and a second material. Thickness and/or material of the alternating layers of the first multi-layer structure differ from thickness and/or material of the alternating layers of the second multi-layer structure.

    Abstract translation: 公开了一种用于包括光敏区域阵列的成像装置的集成电路。 在一个方面，集成电路包括分别布置在第一和第二光敏区域上的第一多层结构和第二多层结构。 第二多层结构各自具有底部和顶部反射结构以及间隔层。 间隔层具有使得多层结构选择性地传输电磁辐射的窄波长范围的厚度。 底部和顶部反射结构包括第一和第二材料的交替层叠。 第一多层结构的交替层的厚度和/或材料不同于第二多层结构的交替层的厚度和/或材料。

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