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公开(公告)号：US20210384700A1
公开(公告)日：2021-12-09
申请号：US17340351
申请日：2021-06-07
Applicant: IMEC VZW
Inventor： Charles Caer , Philippe Soussan , Deniz Sabuncuoglu Tezcan , Gauri Karve , Yunlong Li
Abstract: The disclosure relates to a method for processing a laser device, for example a III-V on silicon laser, including: providing a carrier substrate; forming a grating structure on the carrier substrate, wherein the grating structure delimits a cavity on a surface of the carrier substrate; placing a die in the cavity and bonding the die to the carrier substrate, wherein the die comprises an active region including a III-V semiconductor material; transferring the die from the carrier substrate to a silicon substrate by bonding an exposed side of the die to the silicon substrate and subsequently debonding the carrier substrate from the die; and forming a photonic structure, for example a silicon waveguide, coupled to the die.
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公开(公告)号：US12017909B2
公开(公告)日：2024-06-25
申请号：US16895523
申请日：2020-06-08
Applicant: IMEC VZW
Inventor： Deniz Sabuncuoglu Tezcan , Antonia Malainou
IPC: B81C1/00
CPC classification number: B81C1/00238 , B81C1/00269 , B81C1/00325 , B81B2207/015 , B81C1/00301
Abstract: A Microelectromechanical Systems (MEMS) device combining a MEMS layer and a Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuit (IC), and its fabrication method is provided. The fabrication method includes: processing the MEMS layer on a first semiconductor substrate, the MEMS layer including one or more movable structures and one or more anchor structures; processing one or more first contacts on the first semiconductor substrate, each first contact being processed into one of the anchor structures and being configured to bias that anchor structure; processing the CMOS IC on a second semiconductor substrate; processing one or more second contacts on the second semiconductor substrate, each second contact being connected to the CMOS IC; and bonding the first semiconductor substrate to the second semiconductor substrate such that each first contact directly contacts one of the second contacts. The method can allow fabricating the MEMS device without vapor HF etching. The method can further enable zero level packaging, fusion bonding, a C-SOI approach, and high-vacuum sealing. An integrated zero level hermetic packaging MEMS device can be realized based on fusion bonding of moisture resistant materials. Further, Cu/dielectric bonding and electrical connections to individual parts of the MEMS device are allowed, in order to apply isolated voltages.
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Patent Agency Ranking
公开(公告)号：US09929206B2
公开(公告)日：2018-03-27
申请号：US15191412
申请日：2016-06-23
Applicant: IMEC VZW
Inventor： Bart Vereecke , Deniz Sabuncuoglu Tezcan , Philippe Soussan , Nicolaas Tack
CPC classification number: H01L27/14685 , G01J3/0259 , G01J3/50 , G01J3/513 , G01J2003/1226 , H01L27/1461 , H01L27/14623 , H01L27/14625 , H01L27/14629 , H01L27/14643
Abstract: An integrated circuit for an imaging device including an array of photo-sensitive areas is disclosed. In one aspect the integrated circuit includes a first multi-layer structure and a second multi-layer structure arranged over a first and a second photo-sensitive area, respectively. The second multi-layer structures each have a bottom and a top reflective structure and a spacer layer arranged therebetween. The spacer layer has a thickness such that the multi-layer structure selectively transmits a narrow range of wavelengths of electro-magnetic radiation. The bottom and top reflective structures include a stack of alternating layers of a first and a second material. Thickness and/or material of the alternating layers of the first multi-layer structure differ from thickness and/or material of the alternating layers of the second multi-layer structure.
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公开(公告)号：US20230197761A1
公开(公告)日：2023-06-22
申请号：US18068775
申请日：2022-12-20
Applicant: IMEC VZW
Inventor： Yunlong Li , Deniz Sabuncuoglu Tezcan , Pawel Malinowski , Gauri Karve
IPC: H01L27/146
CPC classification number: H01L27/14687 , H01L27/14689 , H01L27/14692 , H10K39/32
Abstract: An example includes a method for producing a multipixel detector, the method including: providing a bottom layer including a first and a second bottom electrode, depositing an electrically insulating layer on the bottom layer, forming a first opening through the electrically insulating layer, depositing a first photon absorbing material in the first opening, forming a second opening through the electrically insulating layer, depositing a second photon absorbing material in the second opening, planarizing the deposited electrically insulating layer, the first photon absorbing material, and the second photon absorbing material to form a flat surface, and forming a common top electrode on top of the flat surface.
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公开(公告)号：US20230154914A1
公开(公告)日：2023-05-18
申请号：US18055763
申请日：2022-11-15
Applicant: IMEC VZW
Inventor： Gauri Karve , Yunlong Li , Luc Haspeslagh , Philippe Soussan , Deniz Sabuncuoglu Tezcan
CPC classification number: H01L25/50 , H01L21/561 , H01L21/568
Abstract: According to a preferred embodiment of the method of the invention, an assembly is produced comprising a temporary wafer and one or more tiles that are removably attached to the temporary wafer, preferably through a temporary adhesive layer. The tiles comprise a carrier portion and an active material portion. The active material portion is attached to the temporary carrier. The assembly further comprises a single continuous layer of the first material surrounding each of the one or more tiles. Then the back side of the carrier portions of the tiles and of the continuous layer of the first material are simultaneously planarized, and the planarized back sides of the tiles and of the continuous layer of the first material are bonded to a permanent carrier wafer, after which the temporary carrier wafer is removed. The method results in a hybrid wafer comprising a planar top layer formed of the material of the continuous layer with one or more islands embedded therein, the top layer of the islands being formed by the top layer of the active material portion of the one or more tiles.
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公开(公告)号：US20220413380A1
公开(公告)日：2022-12-29
申请号：US17846366
申请日：2022-06-22
Applicant: IMEC VZW
Inventor： Sandeep Seema Saseendran , Deniz Sabuncuoglu Tezcan , Abhilash Paneri , Cian Cummins
IPC: G03F1/70 , H01L21/311 , H01L21/3105 , H01L21/321 , H01L21/033
Abstract: A method is provided for producing different patterns on a single substrate. The method includes executing at least twice a sequence of the following steps: depositing a hardmask on the layer of interest and patterning the hardmask with a predefined pattern to create an accessible portion on the layer of interest; spinning a glass/carbon layer on the hardmask and on the accessible portion of the layer of interest; spin coating a block copolymer on the glass/carbon layer; transferring a predefined block copolymer pattern onto the layer of interest thereby obtaining a transferred pattern, removing the hard mask; filling the transferred pattern followed by chemical mechanical polishing or etching back, wherein different block copolymer patterns are used.
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公开(公告)号：US20170005132A1
公开(公告)日：2017-01-05
申请号：US15191412
申请日：2016-06-23
Applicant: IMEC VZW
Inventor： Bart Vereecke , Deniz Sabuncuoglu Tezcan , Philippe Soussan
IPC: H01L27/146
CPC classification number: H01L27/14685 , G01J3/0259 , G01J3/50 , G01J3/513 , G01J2003/1226 , H01L27/1461 , H01L27/14623 , H01L27/14625 , H01L27/14629 , H01L27/14643
Abstract: An integrated circuit for an imaging device including an array of photo-sensitive areas is disclosed. In one aspect the integrated circuit includes a first multi-layer structure and a second multi-layer structure arranged over a first and a second photo-sensitive area, respectively. The second multi-layer structures each have a bottom and a top reflective structure and a spacer layer arranged therebetween. The spacer layer has a thickness such that the multi-layer structure selectively transmits a narrow range of wavelengths of electro-magnetic radiation. The bottom and top reflective structures include a stack of alternating layers of a first and a second material. Thickness and/or material of the alternating layers of the first multi-layer structure differ from thickness and/or material of the alternating layers of the second multi-layer structure.
Abstract translation: 公开了一种用于包括光敏区域阵列的成像装置的集成电路。 在一个方面，集成电路包括分别布置在第一和第二光敏区域上的第一多层结构和第二多层结构。 第二多层结构各自具有底部和顶部反射结构以及间隔层。 间隔层具有使得多层结构选择性地传输电磁辐射的窄波长范围的厚度。 底部和顶部反射结构包括第一和第二材料的交替层叠。 第一多层结构的交替层的厚度和/或材料不同于第二多层结构的交替层的厚度和/或材料。
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