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公开(公告)号：US20190051194A1
公开(公告)日：2019-02-14
申请号：US15941363
申请日：2018-03-30
Applicant: Intel Corporation
Inventor： Leobardo Campos Macias , Carl S. Marshall , David Arditti Ilitzky , David Gomez Gutierrez , Jose Parra Vilchis , Julio Zamora Esquivel , Rafael De La Guardia Gonzalez , Rodrigo Aldana Lopez
Abstract: Methods and apparatus for drone collision avoidance. Processing circuitry of a drone extracts information from an encoded image captured by a detection device with a field view overlapping the encoded image. Based on the extracted information a determination is made whether a collision will occur on the flight trajectory of the drone with an external source. The flight trajectory of the drone is then altered to avoid a collision.
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公开(公告)号：US20190051193A1
公开(公告)日：2019-02-14
申请号：US15828134
申请日：2017-11-30
Applicant: Intel Corporation
Inventor： David Gomez Gutierrez , Leobardo Campos Macias , Rodrigo Aldana Lopez , Rafael De La Guardia Gonzalez , Julio Zamora Esquivel , Jose Parra Vilchis , David Arditti Ilitzky
Abstract: Methods and apparatus are described for drone collision avoidance that includes extracting first feature information from an image. The image is captured from a first camera oriented in a direction. Second feature information is received from an external source. The second feature information is extracted from a second image of the environment captured by a second camera oriented in the direction. The first feature information and the second feature information are matched. A second local frame of reference of the second feature information is transformed to a first local frame of reference of the first feature information to determine a location of the external source. If a collision with the external source will occur is determined based on the location of the external source and a current flight trajectory.
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公开(公告)号：US20180267591A1
公开(公告)日：2018-09-20
申请号：US15462257
申请日：2017-03-17
Applicant: INTEL CORPORATION
Inventor： Dileep Kurian , Tanay Karnik , David Arditti Ilitzky , Ankit Gupta , Sriram Kabisthalam Muthukumar , Vaibhav Vaidya , Suhwan Kim , Christopher Schaef , Ilya Klochkov
IPC: G06F1/32
CPC classification number: G06F1/3212 , G06F1/3287 , G06F1/329 , Y02D70/00 , Y02D70/26
Abstract: The present disclosure provides for the management of power of a NZE IoT device. Managing power can include receiving the one or more asynchronous events from the asynchronous event system, determining if any of the one or more asynchronous events meet a respective charge qualification, generating the power-on command for the power-managed compute system if any of the one or more asynchronous events meet the respective charge qualification, and waiting for a power source to reach a threshold associated with the respective charge qualification if any of the one or more asynchronous events do not meet the respective charge qualification.
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公开(公告)号：US09806921B2
公开(公告)日：2017-10-31
申请号：US14998117
申请日：2015-12-24
Applicant: Intel Corporation
Inventor： David Arditti Ilitzky , Paulino Mendoza , Thomas Tetzlaff
CPC classification number: H04L25/065 , H04B1/1638 , H04L1/0053 , H04L1/201 , H04L27/00
Abstract: A mobile communication device is provided that includes a receiver configured to receive a signal. The communication device further includes a calculation circuit configured to determine a cumulant value of an order higher than two of the received signal, to determine a function value of the determined cumulant value and to compare the determined function value with a predefined value. The communication device further includes a decoder configured to decode the received signal. The communication device further includes a target signal detector configured to activate the decoder based on the comparison of the function value with the predefined value.
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公开(公告)号：US09276704B1
公开(公告)日：2016-03-01
申请号：US14570566
申请日：2014-12-15
Applicant: Intel Corporation
CPC classification number: H04L1/0054 , H04B1/10 , H04L25/03006 , H04L27/001 , H04L27/2003 , H04L27/227 , H04W84/18
Abstract: A wireless device, and corresponding method, having a receiver configured to receive a signal having in-phase and quadrature components; a non-linear filter demodulator configured to translate noncoherently the in-phase and quadrature components into a phase domain signal; a coherence acquisition unit configured to estimate and correct at least one coherence parameter based on the in-phase and quadrature components and the phase domain signal; and a detector configured to detect information in the phase domain signal.
Abstract translation: 一种无线设备和相应的方法，具有接收器，其被配置为接收具有同相和正交分量的信号; 非线性滤波器解调器，被配置为将非同相和正交分量非相干地转换成相位域信号; 相干获取单元，被配置为基于同相和正交分量和相位域信号来估计和校正至少一个相干参数; 以及检测器，被配置为检测相位域信号中的信息。
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Patent Agency Ranking
公开(公告)号：US11474202B2
公开(公告)日：2022-10-18
申请号：US16614741
申请日：2017-07-19
Applicant: Intel Corporation
Inventor： Ignacio Alvarez , David Arditti Ilitzky , Patrick Andrew Mead , Javier Felip Leon , David Gonzalez Aguirre
Abstract: Apparatuses, methods and storage medium associated with compensating for a sensor deficiency in a heterogeneous sensor array are disclosed herein. In embodiments, an apparatus may include a compute device to aggregate perception data from individual perception pipelines, each of which is associated with respective one of different types of sensors of a heterogeneous sensor set, to identify a characteristic associated with a space to be monitored by the heterogeneous sensor set; detect a sensor deficiency associated with a first sensor of the sensors; and in response to a detection of the sensor deficiency, derive next perception data for more than one of the individual perception pipelines from sensor data originating from at least one second sensor of the sensors. Other embodiments may be disclosed or claimed.
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公开(公告)号：US11237620B2
公开(公告)日：2022-02-01
申请号：US16866416
申请日：2020-05-04
Applicant: Intel Corporation
Inventor： Dileep J. Kurian , Pranjali S. Deshmukh , Sriram Kabisthalam Muthukumar , Ankit Gupta , Tanay Karnik , David Arditti Ilitzky , Saurabh Bhandari
IPC: G06F1/32 , G06F1/3287 , G06F1/3296 , G06F1/324
Abstract: An apparatus is provided which comprises: a first Power Management Unit (PMU); and a second PMU, wherein the first PMU is to manage transition of the apparatus from a low power state to a first active state, wherein the second PMU is to manage transition of the apparatus from the first active state to a second active state, and wherein the second PMU is to be powered down while the apparatus is to be in the low power state.
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公开(公告)号：US10379592B2
公开(公告)日：2019-08-13
申请号：US15462257
申请日：2017-03-17
Applicant: INTEL CORPORATION
Inventor： Dileep Kurian , Tanay Karnik , David Arditti Ilitzky , Ankit Gupta , Sriram Kabisthalam Muthukumar , Vaibhav Vaidya , Suhwan Kim , Christopher Schaef , Ilya Klochkov
IPC: G06F9/00 , G06F1/3212 , G06F1/3287 , G06F1/329
Abstract: The present disclosure provides for the management of power of a NZE IoT device. Managing power can include receiving the one or more asynchronous events from the asynchronous event system, determining if any of the one or more asynchronous events meet a respective charge qualification, generating the power-on command for the power-managed compute system if any of the one or more asynchronous events meet the respective charge qualification, and waiting for a power source to reach a threshold associated with the respective charge qualification if any of the one or more asynchronous events do not meet the respective charge qualification.
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公开(公告)号：US11916800B2
公开(公告)日：2024-02-27
申请号：US16912553
申请日：2020-06-25
Applicant: Intel Corporation
Inventor： David Arditti Ilitzky , John Greth , Robert Southworth , Karl S. Papadantonakis , Bongjin Jung , Arvind Srinivasan
IPC: H04L47/283 , H04L43/087 , H04L43/16 , H04L49/00 , H04L47/125 , H04L49/25 , H04L49/90 , H04L47/62
CPC classification number: H04L47/283 , H04L43/087 , H04L43/16 , H04L47/125 , H04L47/6205 , H04L49/25 , H04L49/3063 , H04L49/9042
Abstract: Examples describe an egress port manager that uses an adaptive jitter selector to apply a jitter threshold level for a buffer, wherein the jitter threshold level is to indicate when egress of a packet segment from the buffer is allowed, wherein a packet segment comprises a packet header and wherein the jitter threshold level is adaptive based on a switch fabric load. In some examples, the jitter threshold level is to indicate a number of segments for the buffer's head of line (HOL) packet that are to be in the buffer or indicate a timer that starts at a time of issuance of a first read request for a first segment of the packet in the buffer. In some examples, the jitter threshold level is not more than a maximum transmission unit (MTU) size associated with the buffer. In some examples, a fetch scheduler is used to adapt an amount of interface overspeed to reduce packet fetching latency while attempting to prevent fabric saturation based on a switch fabric load level, wherein the fetch scheduler is to control the jitter threshold level for the buffer by forcing a jitter threshold level based on switch fabric load level and latency profile of the switch fabric.
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公开(公告)号：US11722438B2
公开(公告)日：2023-08-08
申请号：US16546993
申请日：2019-08-21
Applicant: Intel Corporation
Inventor： John Greth , Arvind Srinivasan , Robert Southworth , David Arditti Ilitzky , Bongjin Jung , Gaspar Mora Porta
CPC classification number: H04L49/3045 , H04L41/0896 , H04L49/257 , H04L49/9042 , H04L63/101 , H04L69/22
Abstract: Examples describe a manner of scheduling packet segment fetches at a rate that is based on one or more of: a packet drop indication, packet drop rate, incast level, operation of queues in SAF or VCT mode, or fabric congestion level. Headers of packets can be fetched faster than payload or body portions of packets and processed prior to queueing of all body portions. In the event a header is identified as droppable, fetching of the associated body portions can be halted and any body portion that is queued can be discarded. Fetch overspeed can be applied for packet headers or body portions associated with packet headers that are approved for egress.
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