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公开(公告)号:US20200075561A1
公开(公告)日:2020-03-05
申请号:US16298421
申请日:2019-03-11
申请人: JI HWANG KIM , JONGBO SHIM , WON IL LEE , JANGWOO LEE , YOUNG KUN JEE
发明人: JI HWANG KIM , JONGBO SHIM , WON IL LEE , JANGWOO LEE , YOUNG KUN JEE
IPC分类号: H01L25/10 , H01L23/498 , H01L23/31 , H01L23/00 , H01L23/538
摘要: A semiconductor package includes a first substrate, a first semiconductor chip mounted on the first substrate, an interposer substrate and a chip package stacked on the first semiconductor chip, and a first molding layer encapsulating the first semiconductor chip and the chip package. The chip package includes a second semiconductor chip on the interposer substrate. The interposer substrate has a base layer consisting of silicon, a conductive pattern on a top surface of the base layer, and a through-electrode extending through the base layer and connected to the conductive pattern.
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2.
公开(公告)号:US20160133613A1
公开(公告)日:2016-05-12
申请号:US14841736
申请日:2015-09-01
申请人: SUNKYOUNG SEO , CHAJEA JO , JI HWANG KIM , Taeje CHO
发明人: SUNKYOUNG SEO , CHAJEA JO , JI HWANG KIM , Taeje CHO
IPC分类号: H01L25/10 , H01L23/367 , H01L23/31
CPC分类号: H01L25/105 , H01L23/13 , H01L23/3128 , H01L23/36 , H01L23/3677 , H01L23/481 , H01L23/49816 , H01L24/05 , H01L24/13 , H01L24/14 , H01L24/17 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/18 , H01L2224/0401 , H01L2224/04042 , H01L2224/0557 , H01L2224/13025 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/14181 , H01L2224/14519 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2225/1094 , H01L2924/00014 , H01L2924/1431 , H01L2924/1434 , H01L2924/15159 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/00012 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00
摘要: A semiconductor package is provided. The semiconductor package include a lower semiconductor package including a lower package substrate and a lower semiconductor chip mounted thereon, and an upper semiconductor package provided on the lower semiconductor package to include an upper package substrate and an upper semiconductor chip mounted thereon. The upper package substrate include an upper heat-dissipation pattern, the lower semiconductor chip include a first via connected to the upper heat-dissipation pattern through the lower semiconductor chip, and the first via may provide a pathway for dissipating heat generated in the lower semiconductor chip.
摘要翻译: 提供半导体封装。 半导体封装包括下半导体封装,其包括下封装衬底和安装在其上的下半导体芯片,以及设置在下半导体封装上的上半导体封装,以包括安装在其上的上封装衬底和上半导体芯片。 上封装衬底包括上部散热图案,下半导体芯片包括通过下半导体芯片连接到上部散热图案的第一通孔,并且第一通孔可以提供用于耗散在下半导体中产生的热的路径 芯片。
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