公开(公告)号：US06518077B2

公开(公告)日：2003-02-11

申请号：US10050077

申请日：2002-01-15

申请人： Jagdish Narayan ,  Ajay Kumar Sharma ,  John F. Muth

发明人： Jagdish Narayan ,  Ajay Kumar Sharma ,  John F. Muth

IPC分类号： H01L2100

CPC分类号： H01L33/28 ,  H01L29/221 ,  H01L31/1828 ,  H01L33/26 ,  Y02E10/543

摘要： An electronic device has an alloy layer containing magnesium oxide and at least one of zinc oxide and cadmium oxide and having a cubic structure on a substrate. The alloy layer may be directly on the substrate or, alternatively, one or more buffer layers may be between the alloy layer and the substrate. The alloy layer may be domain-matched epitaxially grown directly on the substrate, or may be lattice-matched epitaxially grown directly on the buffer layer. The cubic layer may also be used to form single and multiple quantum wells. Accordingly, electronic devices having wider bandgap, increased binding energy of excitons, and/or reduced density of growth and/or misfit dislocations in the active layers as compared with conventional III-nitride electronic devices may be provided.

摘要翻译： 电子器件具有包含氧化镁和氧化锌和氧化镉中的至少一种并且在衬底上具有立方结构的合金层。 合金层可以直接在衬底上，或者，一个或多个缓冲层可以在合金层和衬底之间。 合金层可以直接在衬底上外延生长，或者可以直接在缓冲层上外延生长的晶格匹配。 立方体层也可用于形成单个和多个量子阱。 因此，与传统的III族氮化物电子器件相比，可以提供具有更宽的带隙，增加的激子的结合能和/或有源层中生长和/或失配位错密度的电子器件。

公开(公告)号：US06423983B1

公开(公告)日：2002-07-23

申请号：US09687519

申请日：2000-10-13

申请人： Jagdish Narayan ,  Ajay Kumar Sharma ,  John F. Muth

发明人： Jagdish Narayan ,  Ajay Kumar Sharma ,  John F. Muth

IPC分类号： H01L3300

CPC分类号： H01L33/28 ,  H01L29/221 ,  H01L31/1828 ,  H01L33/26 ,  Y02E10/543

摘要： An electronic device has an alloy layer containing magnesium oxide and at least one of zinc oxide and cadmium oxide and having a cubic structure on a substrate. The alloy layer may be directly on the substrate or, alternatively, one or more buffer layers may be between the alloy layer and the substrate. The alloy layer may be domain-matched epitaxially grown directly on the substrate, or may be lattice-matched epitaxially grown directly on the buffer layer. The cubic layer may also be used to form single and multiple quantum wells. Accordingly, electronic devices having wider bandgap, increased binding energy of excitons, and/or reduced density of growth and/or misfit dislocations in the active layers as compared with conventional III-nitride electronic devices may be provided.

摘要翻译： 电子器件具有包含氧化镁和氧化锌和氧化镉中的至少一种并且在衬底上具有立方结构的合金层。 合金层可以直接在衬底上，或者，一个或多个缓冲层可以在合金层和衬底之间。 合金层可以直接在衬底上外延生长，或者可以直接在缓冲层上外延生长的晶格匹配。 立方体层也可用于形成单个和多个量子阱。 因此，与传统的III族氮化物电子器件相比，可以提供具有更宽的带隙，增加的激子的结合能和/或有源层中生长和/或失配位错密度的电子器件。

公开(公告)号：US20050124161A1

公开(公告)日：2005-06-09

申请号：US10970773

申请日：2004-10-21

申请人： Thomas Rawdanowicz ,  Jagdish Narayan

发明人： Thomas Rawdanowicz ,  Jagdish Narayan

IPC分类号： C30B23/02 ,  C30B25/18 ,  C30B29/40 ,  H01L21/338 ,  H01L21/302 ,  H01L21/461

CPC分类号： C30B25/18 ,  C30B23/02 ,  C30B29/40 ,  H01L21/8258

摘要： Epitaxial gallium nitride is grown on a silicon substrate while reducing or suppressing the formation of a buffer layer. The gallium nitride may be grown directly on the silicon substrate, for example using domain epitaxy. Alternatively, less than one complete monolayer of silicon nitride may be formed between the silicon and the gallium nitride. Subsequent to formation of the gallium nitride, an interfacial layer of silicon nitride may be formed between the silicon and the gallium nitride.

摘要翻译： 在减少或抑制缓冲层的形成的同时，在硅衬底上生长外延氮化镓。 可以直接在硅衬底上生长氮化镓，例如使用畴外延。 或者，可以在硅和氮化镓之间形成少于一个完整的氮化硅单层。 在形成氮化镓之后，可以在硅和氮化镓之间形成氮化硅的界面层。

公开(公告)号：US5406123A

公开(公告)日：1995-04-11

申请号：US897033

申请日：1992-06-11

申请人： Jagdish Narayan

发明人： Jagdish Narayan

IPC分类号： H01L21/285 ,  H01L29/45 ,  H01L29/12 ,  H01L29/161 ,  H01L29/40

CPC分类号： H01L21/28575 ,  H01L29/452 ,  H01L29/456 ,  Y10S257/913

摘要： Epitaxial growth of films on single crystal substrates having a lattice mismatch of at least 10% through domain matching is achieved by maintaining na.sub.1 within 5% of ma.sub.2, wherein a.sub.1 is the lattice constant of the substrate, a.sub.2 is the lattice constant of the epitaxial layer and n and m are integers. The epitaxial layer can be TiN and the substrate can be Si or GaAs. For instance, epitaxial TiN films having low resistivity can be provided on (100) silicon and (100) GaAs substrates using a pulsed laser deposition method. The TiN films were characterized using X-ray diffraction (XRD), Rutherford back scattering (RBS), four-point-probe ac resistivity, high resolution transmission electron microscopy (TEM) and scanning electron microscopy (SEM) techniques. Epitaxial relationship was found to be TiN aligned with Si. TiN films showed 10-20% channeling yield. In the plane, four unit cells of TiN match with three unit cells of silicon with less than 4.0% misfit. This domain matching epitaxy provides a new mechanism of epitaxial growth in systems with large lattice misfits. Four-point probe measurements show characteristic metallic behavior of these TiN films as a function of temperature with a typical resistivity of about 15 .mu..OMEGA.-cm at room temperature.

摘要翻译： 通过将n1保持在ma2的5％以内，其中a1是衬底的晶格常数，a2是外延层的晶格常数，实现通过畴匹配具有至少10％的晶格失配的单晶衬底上的膜的外延生长 n和m是整数。 外延层可以是TiN，衬底可以是Si或GaAs。 例如，可以使用脉冲激光沉积法在（100）硅和（100）GaAs衬底上提供具有低电阻率的外延TiN膜。 使用X射线衍射（XRD），卢瑟福背散射（RBS），四点探针交流电阻率，高分辨率透射电子显微镜（TEM）和扫描电子显微镜（SEM）技术对TiN膜进行了表征。 发现外延关系为＆lt; 100＆gt; TiN与<100> Si对准。 TiN膜显示10-20％的通道产率。 在平面上，TiN的四个单位电池与三个单位的硅单元相匹配，其中小于4.0％的失配。 该域匹配外延提供了具有大晶格失配的系统中外延生长的新机制。 四点探针测量显示这些TiN膜的特征金属性质作为温度的函数，在室温下的典型电阻率为约15μmOMEGA-cm。

公开(公告)号：US4863877A

公开(公告)日：1989-09-05

申请号：US120035

申请日：1987-11-13

申请人： John C. C. Fan ,  Jhang W. Lee ,  Jagdish Narayan

发明人： John C. C. Fan ,  Jhang W. Lee ,  Jagdish Narayan

IPC分类号： H01L21/20 ,  H01L33/00

CPC分类号： H01L33/0095 ,  H01L21/02381 ,  H01L21/02463 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02694 ,  H01L33/0066 ,  Y10S148/065 ,  Y10S148/072 ,  Y10S148/084 ,  Y10S148/149 ,  Y10S438/933

摘要： A method for reducing the defect and dislocation density in III-V material layers deposited on dissimilar substrates is disclosed. The method involves ion implantation of dopant materials to create amorphous regions within the layers followed by an annealing step during which the amorphous regions are recrystallized to form substantially monocrystalline regions. The wafers produced by the process are particularly well suited for optoelectronic devices.

摘要翻译： 公开了一种减少沉积在不同基板上的III-V材料层中的缺陷和位错密度的方法。 该方法涉及掺杂剂材料的离子注入以在层内产生无定形区域，随后是退火步骤，在该步骤期间非晶区域被重结晶以形成基本单晶区域。 由该方法生产的晶片特别适用于光电器件。

公开(公告)号：US4261764A

公开(公告)日：1981-04-14

申请号：US80725

申请日：1979-10-01

申请人： Jagdish Narayan

发明人： Jagdish Narayan

IPC分类号： H01L21/28 ,  H01C17/18 ,  H01C17/28 ,  H01L21/263 ,  B23K9/00 ,  H01L7/18

CPC分类号： H01C17/18 ,  H01C17/28 ,  Y10S148/093 ,  Y10S148/094

摘要： This invention is a new method for the formation of high-quality ohmic contacts on wide-band-gap semiconducting oxides. As exemplified by the formation of an ohmic contact on n-type BaTiO.sub.3 containing a p-n junction, the invention entails depositing a film of a metallic electroding material on the BaTiO.sub.3 surface and irradiating the film with a Q-switched laser pulse effecting complete melting of the film and localized melting of the surface layer of oxide immediately underlying the film. The resulting solidified metallic contact is ohmic, has unusually low contact resistance, and is thermally stable, even at elevated temperatures. The contact does not require cleaning before attachment of any suitable electrical lead.This method is safe, rapid, reproducible, and relatively inexpensive.

摘要翻译： 本发明是在宽带隙半导体氧化物上形成高质量欧姆接触的新方法。 如在含有pn结的n型BaTiO 3上形成欧姆接触所示例的，本发明要求在BaTiO3表面上沉积金属电镀材料的膜，并用Q开关激光脉冲照射该膜，完全熔化 薄膜和局部熔化立即在薄膜下面的氧化物表面层。 所得到的固化金属接触是欧姆的，具有非常低的接触电阻，并且即使在升高的温度下也是热稳定的。 在连接任何合适的电线之前，触点不需要清洁。 这种方法是安全，快速，可重复，而且相对便宜的。

公开(公告)号：US4147563A

公开(公告)日：1979-04-03

申请号：US932154

申请日：1978-08-09

申请人： Jagdish Narayan ,  Rosa T. Young

发明人： Jagdish Narayan ,  Rosa T. Young

IPC分类号： H01L31/04 ,  H01L21/22 ,  H01L21/225 ,  H01L21/268 ,  H01L31/18 ,  H01L21/26

CPC分类号： H01L21/268 ,  H01L21/2254 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S148/09 ,  Y10S148/092 ,  Y10S148/153

摘要： This invention is an improved method for preparing p-n junction devices, such as diodes and solar cells. High-quality junctions are prepared by effecting laser-diffusion of a selected dopant into silicon by means of laser pulses having a wavelength of from about 0.3 to 1.1 .mu.m, an energy area density of from about 1.0 to 2.0 J/cm.sup.2, and a duration of from about 20 to 60 nanoseconds. Initially, the dopant is deposited on the silicon as a superficial layer, preferably one having a thickness in the range of from about 50 to 100 A. Depending on the application, the values for the above-mentioned pulse parameters are selected to produce melting of the silicon to depths in the range from about 1000 A to 1 .mu.m. The invention has been used to produce solar cells having a one-sun conversion efficiency of 10.6%, these cells having no antireflective coating or back-surface fields.

摘要翻译： 本发明是用于制备诸如二极管和太阳能电池的p-n结器件的改进方法。 通过利用波长为约0.3〜1.1μm，能量面积密度为约1.0〜2.0J / cm 2的激光脉冲，将所选择的掺杂剂激光扩散到硅中，制备高质量结。 持续时间为约20至60纳秒。 最初，掺杂剂作为表面层沉积在硅上，优选为厚度为约50至100A的厚度。根据应用，选择上述脉冲参数的值以产生熔融 硅深度在约1000A至1μm的范围内。 本发明已经用于生产具有10.6％的一次太阳转换效率的太阳能电池，这些电池没有抗反射涂层或背表面场。

公开(公告)号：US20070280848A1

公开(公告)日：2007-12-06

申请号：US10593809

申请日：2005-03-24

申请人： Jagdish Narayan ,  Prabhat Kumar ,  Richard Wu

发明人： Jagdish Narayan ,  Prabhat Kumar ,  Richard Wu

IPC分类号： B05D5/12 ,  C22C27/02

CPC分类号： C23C16/06 ,  C23C14/16 ,  C23C14/548

摘要： Thin tantalum films having novel microstructures are provided. The films have microstructures such as nanocrystalline, single crystal and amorphous. These films provide excellent diffusion barrier properties and are useful in microelectronic devices. Methods of forming the films using pulsed laser deposition (PLD) and molecular beam epitaxy (MBE) deposition methods are also provided, as are microelectronic devices incorporating these films.

摘要翻译： 提供具有新颖微结构的薄钽薄膜。 该膜具有微结构，如纳米晶体，单晶和无定形。 这些膜提供优异的扩散阻挡性能并且在微电子器件中是有用的。 还提供了使用脉冲激光沉积（PLD）和分子束外延（MBE）沉积方法形成膜的方法，以及包含这些膜的微电子器件也是如此。

公开(公告)号：US5021119A

公开(公告)日：1991-06-04

申请号：US600246

申请日：1990-10-18

申请人： John C.C. Fan ,  Paul M. Zavracky ,  Jagdish Narayan ,  Lisa P. Allen ,  Duy-Phach Vu

发明人： John C.C. Fan ,  Paul M. Zavracky ,  Jagdish Narayan ,  Lisa P. Allen ,  Duy-Phach Vu

IPC分类号： H01L21/20

CPC分类号： H01L21/2022

摘要： A method for reducing defects after zone melting and recrystallization of semiconductor films formed on an insulator over a semiconductor substrate by selectively removing portion of a first layer over the semiconductor film, amorphizing the exposed film portion and laterally regrowing the amorphized region.

摘要翻译： 通过选择性地去除半导体膜上的第一层的部分，使暴露的膜部分非晶化并横向再生无定形区域来减少在半导体衬底上的绝缘体上形成的半导体膜的区域熔融和再结晶之后的缺陷的方法。

公开(公告)号：US4181538A

公开(公告)日：1980-01-01

申请号：US945925

申请日：1978-09-26

申请人： Jagdish Narayan ,  Clark W. White ,  Rosa T. Young

发明人： Jagdish Narayan ,  Clark W. White ,  Rosa T. Young

IPC分类号： H01L21/263 ,  H01L21/268 ,  H01L21/26

CPC分类号： H01L21/268 ,  H01L21/2636 ,  Y10S148/003 ,  Y10S148/09 ,  Y10S148/092 ,  Y10S148/093 ,  Y10S148/097

摘要： This invention is a method for improving the electrical properties of silicon semiconductor material. The method comprises irradiating a selected surface layer of the semiconductor material with high-power laser pulses characterized by a special combination of wavelength, energy level, and duration. The combination effects melting of the layer without degrading electrical properties, such as minority-carrier diffusion length. The method is applicable to improving the electrical properties of n- and p-type silicon which is to be doped to form an electrical junction therein. Another important application of the method is the virtually complete removal of doping-induced defects from ion-implanted or diffusion-doped silicon substrates.

摘要翻译： 本发明是改善硅半导体材料的电性能的方法。 该方法包括用以波长，能级和持续时间的特殊组合为特征的大功率激光脉冲照射半导体材料的选定表面层。 这种组合会使层的熔化而不降低电性能，如少数载流子扩散长度。 该方法适用于改善待掺杂以在其中形成电连接的n型和p型硅的电性能。 该方法的另一个重要应用是从离子注入或扩散掺杂的硅衬底中实际上完全去除掺杂诱导的缺陷。