Patent search ap:"Duy-Phach Vu" Page 1

1.

发明授权
Bonded layer semiconductor device 失效
Title translation: 粘结层半导体器件

公开(公告)号：US06486929B1

公开(公告)日：2002-11-26

申请号：US09082925

申请日：1998-05-21

Applicant: Duy-Phach Vu , Brenda D. Dingle , Jason E. Dingle , Ngwe Cheong

Inventor： Duy-Phach Vu , Brenda D. Dingle , Jason E. Dingle , Ngwe Cheong

IPC: G02F11343

CPC classification number: H01L27/1266 , A61B3/113 , G02B5/30 , G02B27/0093 , G02B27/017 , G02B27/0172 , G02B2027/0132 , G02B2027/0138 , G02B2027/0187 , G02B2027/0198 , G02F1/13336 , G02F1/133526 , G02F1/13454 , G02F1/13473 , G02F1/136209 , G02F1/136277 , G02F2001/13613 , G02F2202/105 , G09G3/30 , G09G3/32 , G09G3/36 , G09G3/3607 , G09G3/3614 , G09G3/3648 , G09G2300/023 , G09G2300/0809 , G09G2300/0842 , G09G2320/0233 , G09G2320/041 , G09G2320/043 , G09G2340/0464 , G09G2370/042 , H01L21/8221 , H01L24/96 , H01L25/0756 , H01L25/10 , H01L25/50 , H01L27/0688 , H01L27/1214 , H01L27/156 , H01L29/786 , H01L29/78603 , H01L29/78648 , H01L2221/68359 , H01L2221/68363 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/01049 , H01L2924/01065 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01082 , H01L2924/12042 , H01L2924/19041 , H01L2924/30105 , H01L2924/3025 , H01L2924/3511 , H01S5/0217 , H01S5/423 , H04N5/70 , H04N5/7441 , H04N5/7491 , H04N9/3141 , H05B33/12 , H01L2924/00

Abstract: The invention relates to the formation of arrays of thin film transistors (TFT's) on silicon substrates and the dicing and tiling of such substrates for transfer to a common module body. TFT's activate display electrodes formed adjacent the transistors after the tiles have been transferred.

Abstract translation: 本发明涉及在硅衬底上形成薄膜晶体管（TFT）的阵列以及用于转移到公共模块体的这种衬底的切割和平铺。在移动瓦片之后，TFT的激活显示电极与晶体管相邻形成。

2.

发明授权
High density electronic circuit modules 失效

公开(公告)号：US6143582A

公开(公告)日：2000-11-07

申请号：US249012

申请日：1999-02-12

Applicant: Duy-Phach Vu , Brenda Dingle , Ngwe Cheong

Inventor： Duy-Phach Vu , Brenda Dingle , Ngwe Cheong

IPC: A61B3/113 , G02B5/30 , G02B27/00 , G02B27/01 , G02F1/1333 , G02F1/1335 , G02F1/1347 , G02F1/136 , G02F1/1362 , G09G3/30 , G09G3/32 , G09G3/36 , H01L21/77 , H01L21/822 , H01L21/84 , H01L25/075 , H01L27/06 , H01L27/12 , H01L27/15 , H01L29/786 , H01L33/00 , H01S5/02 , H01S5/42 , H04N5/70 , H04N5/74 , H05B33/12 , H10L21/00

CPC classification number: G02F1/13454 , A61B3/113 , G02B27/0093 , G02B27/017 , G02B27/0172 , G02F1/133526 , G02F1/136209 , G02F1/136277 , G09G3/30 , G09G3/36 , H01L21/8221 , H01L24/96 , H01L25/0756 , H01L27/0688 , H01L27/1214 , H01L27/156 , H01L29/786 , H01L29/78603 , H01L29/78648 , H04N5/7441 , H04N9/3141 , H05B33/12 , G02B2027/0132 , G02B2027/0138 , G02B2027/0187 , G02B2027/0198 , G02B5/30 , G02F1/13336 , G02F1/13473 , G02F2001/13613 , G02F2202/105 , G09G2300/023 , G09G2300/0842 , G09G2320/0233 , G09G2320/041 , G09G2320/043 , G09G2340/0464 , G09G2370/042 , G09G3/32 , G09G3/3607 , G09G3/3648 , H01L2221/68359 , H01L2221/68363 , H01L2221/68368 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/01065 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01082 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/19041 , H01L2924/30105 , H01L2924/3025 , H01L2924/3511 , H01S5/0217 , H01S5/423 , H04N5/70 , H04N5/7491

Abstract: The invention relates to device processing, packaging and interconnects that will yield integrated electronic circuitry of higher density and complexity than can be obtained by using conventional multi-chip modules. Processes include the formation of complex multi-function circuitry on common module substrates using circuit tiles of silicon thin-films which are transferred, interconnected and packaged. Circuit modules using integrated transfer/interconnect processes compatible with extremely high density and complexity provide large-area active-matrix displays with on-board drivers and logic in a complete glass-based modules. Other applications are contemplated, such as, displays, microprocessor and memory devices, and communication circuits with optical input and output.

3.

发明授权
Three dimensional processor using transferred thin film circuits 失效

公开(公告)号：US5976953A

公开(公告)日：1999-11-02

申请号：US986998

申请日：1997-12-08

Applicant: Paul M. Zavracky , Matthew Zavracky , Duy-Phach Vu , Brenda Dingle

Inventor： Paul M. Zavracky , Matthew Zavracky , Duy-Phach Vu , Brenda Dingle

IPC: H01L21/822 , H01L21/98 , H01L23/498 , H01L25/065 , H01L25/18 , H01L27/00 , H01L27/04 , H01L27/10

CPC classification number: H01L25/50 , H01L23/49833 , H01L24/24 , H01L24/82 , H01L25/0657 , H01L25/18 , H01L2224/16145 , H01L2224/24225 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01061 , H01L2924/01072 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/10253 , H01L2924/10329 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , Y10S148/164

Abstract: A multi-layered structure is fabricated in which a microprocessor is configured in different layers and interconnected vertically through insulating layers which separate each circuit layer of the structure. Each circuit layer can be fabricated in a separate wafer or thin film material and then transferred onto the layered structure and interconnected.

4.

发明授权
Reduction of parasitic effects in floating body MOSFETs 失效
Title translation: 降低浮体MOSFET的寄生效应

公开(公告)号：US5420055A

公开(公告)日：1995-05-30

申请号：US153781

申请日：1993-11-16

Applicant: Duy-Phach Vu , Ngwe K. Cheong

Inventor： Duy-Phach Vu , Ngwe K. Cheong

IPC: G02B27/00 , G02F1/1335 , G02F1/1347 , G02F1/136 , G02F1/1362 , G09G3/30 , G09G3/36 , H01L21/84 , H01L27/15 , H04N5/70 , H04N5/74 , H04N9/31 , H01L21/265

CPC classification number: H04N9/3141 , G02B27/0093 , G09G3/30 , G09G3/36 , H01L21/84 , H04N5/7441 , G09G2300/023 , G09G2300/0809 , G09G2300/0842 , G09G2320/0233 , G09G2320/041 , G09G2320/043 , G09G2340/0464 , G09G2370/042 , G09G3/3607 , G09G3/3614 , G09G3/3648 , H04N5/70 , H04N5/7491

Abstract: A semiconductor fabrication method improves the voltage characteristic of floating-body MOSFETs by creating recombination centers near the source-body junction of the device. A MOSFET is fabricated through the passivation oxidation stage, and a photolithography step is used to expose the source region. Implantation is then performed using one of two types of material. A first type creates electron traps of predetermined energy in the vicinity of the source-body junction. A second type creates defects in the crystalline structure of the semiconductor material. Both implantation types create recombination centers in the material. This allows the discharge through the source-body junction of charges built up in the body region.

Abstract translation: 半导体制造方法通过在器件的源体结点附近产生复合中心来改善浮体MOSFET的电压特性。通过钝化氧化阶段制造MOSFET，并且使用光刻步骤来曝光源极区域。然后使用两种类型的材料之一进行植入。第一类型在源 - 体结附近产生预定能量的电子阱。第二种类型在半导体材料的晶体结构中产生缺陷。这两种植入类型都在材料中产生重组中心。这允许通过在体区域中积聚的电荷的源 - 体结合进行放电。

5.

发明授权
Junction field-effect transistors formed on insulator substrates 失效
Title translation: 形成在绝缘体基板上的结型场效应晶体管

公开(公告)号：US4914491A

公开(公告)日：1990-04-03

申请号：US374621

申请日：1989-06-29

Applicant: Duy-Phach Vu

Inventor： Duy-Phach Vu

IPC: H01L21/337 , H01L29/808

CPC classification number: H01L29/66901 , H01L29/8086

Abstract: A junction field effect transistor formed on insulator substrates particularly oxide substrates and having a polysilicon vertical control gate region formed of a cross member and two end members orthogonal thereto. The vertical control gate is formed over an n-channel in a Si island, the n-channel is located beneath the cross member, with p.sup.+ junction gate regions laterally disposed on either side of the n-channel and n.sup.+ drain and gate regions laterally orthogonal thereto in Si island.

Abstract translation: 形成在绝缘体衬底上的结型场效应晶体管，特别是氧化物衬底，并且具有由横向构件和与其正交的两个端部构件形成的多晶硅垂直控制栅极区域。垂直控制栅极形成在Si岛上的n沟道上，n沟道位于横向构件下方，p +结栅极区域横向设置在n沟道的两侧，n +漏极和栅极区域横向正交在Si岛。

6.

发明授权
Methods for fabricating thin film III-V compound solar cell 有权
Title translation: 制造薄膜III-V复合太阳能电池的方法

公开(公告)号：US07994419B2

公开(公告)日：2011-08-09

申请号：US12167583

申请日：2008-07-03

Applicant: Noren Pan , Glen Hillier , Duy Phach Vu , Rao Tatavarti , Christopher Youtsey , David McCallum , Genevieve Martin

Inventor： Noren Pan , Glen Hillier , Duy Phach Vu , Rao Tatavarti , Christopher Youtsey , David McCallum , Genevieve Martin

IPC: H01L31/0256

CPC classification number: H01L31/1852 , H01L31/06875 , Y02E10/544

Abstract: The present invention utilizes epitaxial lift-off in which a sacrificial layer is included in the epitaxial growth between the substrate and a thin film III-V compound solar cell. To provide support for the thin film III-V compound solar cell in absence of the substrate, a backing layer is applied to a surface of the thin film III-V compound solar cell before it is separated from the substrate. To separate the thin film III-V compound solar cell from the substrate, the sacrificial layer is removed as part of the epitaxial lift-off. Once the substrate is separated from the thin film III-V compound solar cell, the substrate may then be reused in the formation of another thin film III-V compound solar cell.

Abstract translation: 本发明利用外延剥离，其中在衬底和薄膜III-V复合太阳能电池之间的外延生长中包括牺牲层。为了在没有基板的情况下为薄膜III-V复合太阳能电池提供支撑，在薄膜III-V复合太阳能电池从基板分离之前，将背衬层施加到薄膜III-V复合太阳能电池的表面。为了将薄膜III-V复合太阳能电池与衬底分离，牺牲层作为外延剥离的一部分被去除。一旦基板与薄膜III-V复合太阳能电池分离，则可以将基板重新用于形成另一薄膜III-V复合太阳能电池。

7.

发明申请
Portable microdisplay system 审中-公开
Title translation: 便携式微显示系统

公开(公告)号：US20070018919A1

公开(公告)日：2007-01-25

申请号：US11475567

申请日：2006-06-26

Applicant: Matthew Zavracky , Frederick Herrmann , Wen-Foo Chern , Alan Richard , Ronald Gale , Jason Lo , David Ellertson , Kuojinng Tsai , John Fan , Bor-Yeu Tsaur , Stephen Pombo , Rodney Bumgardner , Duy-Phach Vu

Inventor： Matthew Zavracky , Frederick Herrmann , Wen-Foo Chern , Alan Richard , Ronald Gale , Jason Lo , David Ellertson , Kuojinng Tsai , John Fan , Bor-Yeu Tsaur , Stephen Pombo , Rodney Bumgardner , Duy-Phach Vu

IPC: G09G3/36

CPC classification number: G09G5/008 , G09G3/3406 , G09G3/3413 , G09G3/3614 , G09G3/3648 , G09G3/3655 , G09G3/3659 , G09G3/3677 , G09G3/3688 , G09G5/399 , G09G2300/0876 , G09G2310/0235 , G09G2310/0237 , G09G2310/024 , G09G2310/0251 , G09G2310/0281 , G09G2310/0291 , G09G2310/0297 , G09G2310/08 , G09G2320/02 , G09G2320/0247 , G09G2320/0276 , G09G2320/041 , G09G2320/0606 , G09G2320/0626 , G09G2320/0633 , G09G2320/0666 , G09G2340/0414 , G09G2340/0421 , G09G2360/144

Abstract: An active matrix color crystal display has an active matrix circuit, a counterelectrode panel and an interposed layer of liquid crystal. The active matrix display is located in a portable microdisplay system. The image is written to the the display therein causing the liquid crystal to move to a specific image position. A light source is flashed to illuminate the display. The pixel electrodes are set to a specific value to cause the liquid crystal to move towards a desired position. The process of writing, flashing, and setting the electrode intensity value to reorient the liquid crystal to produce an image is repeated. Portable system can include a digital camera, cellular telephone, camcorder, heads up display, instant print camera, pager,

Abstract translation: 有源矩阵彩色晶体显示器具有有源矩阵电路，反电极面板和插入的液晶层。有源矩阵显示器位于便携式微显示系统中。图像被写入其中的显示器，使液晶移动到特定图像位置。闪光灯照亮显示屏。将像素电极设定为特定值以使液晶朝向期望位置移动。重复写入，闪烁和设置电极强度值以重新定向液晶以产生图像的过程。便携式系统可以包括数码相机，蜂窝电话，摄像机，头戴式显示器，即时打印相机，寻呼机，