公开(公告)号：US20150012671A1

公开(公告)日：2015-01-08

申请号：US14300495

申请日：2014-06-10

Applicant: Jeong-Woo PARK ,  Sangyoon OH

Inventor： Jeong-Woo PARK ,  Sangyoon OH

IPC: G06F1/32 ,  G06F3/06

CPC classification number: G06F1/3268 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/0659 ,  G06F3/0688 ,  G06F13/00 ,  G11C16/00 ,  Y02D10/154 ,  Y02D50/20

Abstract: A storage system includes a host and a storage device. The storage device includes a device controller and a device interface. The device controller is configured to generate interface idle time information in response to a command received from a host, the interface idle time information being determined based on an estimated time to execute at least one operation at the memory storage device. The device interface is configured to output the interface idle time information to the host.

Abstract translation: 存储系统包括主机和存储设备。 存储设备包括设备控制器和设备接口。 设备控制器被配置为响应于从主机接收到的命令来生成接口空闲时间信息，基于估计时间来确定接口空闲时间信息以在存储器存储设备上执行至少一个操作。 设备接口配置为向主机输出接口空闲时间信息。

公开(公告)号：US20100013094A1

公开(公告)日：2010-01-21

申请号：US12503274

申请日：2009-07-15

Applicant: Chajea JO ,  Uihyoung LEE ,  Jae-hyun PHEE ,  Jeong-Woo PARK ,  Ha-Young YIM

Inventor： Chajea JO ,  Uihyoung LEE ,  Jae-hyun PHEE ,  Jeong-Woo PARK ,  Ha-Young YIM

IPC: H01L23/498

CPC classification number: H01L21/563 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/06051 ,  H01L2224/06102 ,  H01L2224/1146 ,  H01L2224/11472 ,  H01L2224/11505 ,  H01L2224/11902 ,  H01L2224/11912 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/14104 ,  H01L2224/1411 ,  H01L2224/14131 ,  H01L2224/17107 ,  H01L2224/73204 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package include a substrate including a plurality of pads and a plurality of bumps evenly disposed on an entire region of the substrate regardless of an arrangement of the plurality of pads. According to the present invention, a simplification of a process can be accomplished, a cost of a process can be reduced, reliability can be improved and an under-filling can become easy.

Abstract translation: 半导体封装以及半导体封装的制造方法。 半导体封装包括基板，其包括多个焊盘和均匀地设置在基板的整个区域上的多个凸块，而与多个焊盘的布置无关。 根据本发明，可以实现工艺的简化，可以降低工艺成本，可以提高可靠性，并且能够容易地进行填充不足。

公开(公告)号：US20100018633A1

公开(公告)日：2010-01-28

申请号：US12408366

申请日：2009-03-20

Applicant: Myung-Sam KANG ,  Jung-Hyun PARK ,  Jeong-Woo PARK ,  Ji-Eun KIM

Inventor： Myung-Sam KANG ,  Jung-Hyun PARK ,  Jeong-Woo PARK ,  Ji-Eun KIM

IPC: B32B37/00

CPC classification number: B32B38/04 ,  B32B38/10 ,  B32B2038/0092 ,  B32B2038/047 ,  B32B2309/105 ,  B32B2310/0843 ,  B32B2457/08 ,  H05K3/0035 ,  H05K3/108 ,  H05K3/421 ,  H05K3/428 ,  H05K3/4652 ,  H05K2201/0376 ,  H05K2203/0384 ,  H05K2203/0554 ,  Y10T156/1056 ,  Y10T156/1057 ,  Y10T156/1064 ,  Y10T156/1082

Abstract: Disclosed is a method of manufacturing a printed circuit board. The method of manufacturing a printed circuit board having a via for connecting one layer to another layer can include forming a circuit pattern on one surface of a carrier; processing a hole corresponding to the via on one surface of the carrier; compressing the surface of the carrier into one surface of an insulation body; removing the carrier; processing a via hole on the insulation body, corresponding to a position of the hole; and forming a conductive material in the via hole, to thereby easily process a hole for forming a via and have high design freedom

Abstract translation: 公开了印刷电路板的制造方法。 制造具有用于将一层连接到另一层的通路的印刷电路板的制造方法可以包括在载体的一个表面上形成电路图案; 在载体的一个表面上处理与通孔对应的孔; 将载体的表面压缩到绝缘体的一个表面中; 移除载体; 处理绝缘体上的通孔，对应于孔的位置; 并且在通孔中形成导电材料，从而容易地加工用于形成通孔的孔，并且具有高的设计自由度