公开(公告)号：US09640413B2

公开(公告)日：2017-05-02

申请号：US14901878

申请日：2013-12-02

申请人： Jiangsu Changjiang Electronics Technology Co., Ltd

发明人： Steve Xin Liang ,  Chih-Chung Liang ,  Yu-Bin Lin ,  Yaqin Wang ,  Youhai Zhang

IPC分类号： H01L21/00 ,  H01L21/48 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L21/4832 ,  H01L21/48 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4871 ,  H01L21/4885 ,  H01L21/4889 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49531 ,  H01L23/49548 ,  H01L23/49565 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/49111 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/85399

摘要： Provided is an etching-before-packaging horizontal chip three-dimensional system level metal circuit board structure comprising a metal substrate frame; the metal substrate frame is provided with base islands and pins therein; the front faces of the base islands are provided with chips; the front faces of the chips are connected to the front faces of the pins via metal wires; conductive posts are disposed on the front faces or back faces of the pins; the peripheral areas of the base islands, the areas between the base islands and the pins, the areas between the pins, the areas above the base islands and the pins, the areas below the base islands and the pins, and the exteriors of the chips, the metal wires and the conductive posts are all encapsulated with molding compound.

公开(公告)号：US20160148861A1

公开(公告)日：2016-05-26

申请号：US14901526

申请日：2013-12-19

申请人： JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD

发明人： Chih-Chung Liang ,  Steve Xin Liang ,  Yu-bin Lin ,  Kai Zhang ,  Chunyan Zhang

IPC分类号： H01L23/495 ,  H01L23/00 ,  H01L21/78 ,  H01L21/304 ,  H01L21/306 ,  H01L23/29 ,  H01L21/027 ,  H01L21/56

CPC分类号： H01L23/49575 ,  H01L21/0274 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/48 ,  H01L21/4821 ,  H01L21/4825 ,  H01L21/4832 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49517 ,  H01L23/49558 ,  H01L23/49811 ,  H01L23/5383 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/3223 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A first-packaged and later-etched three-dimensional flip-chip system-in-package structure and a processing method thereof are provided. The package structure includes: a pad (1), a pin (2); a conductive pillar (3) disposed on an upper surface of the pin (2); a first die (4) flipped on an upper surface of the pad (1); a first molding material or epoxy resin (9) for encapsulating with a peripheral region of the conductive pillar (3) and the first die (4); an anti-oxidation layer (11) provided on a surface of the conductive pillar (3) exposed from the first molding material or epoxy resin (9); a second die (8) flipped on a lower surface of the pad (1) and the pin (2); and a second molding material or epoxy resin (10) for encapsulating with the region of the lower surfaces of the pad (1) and the pin (2) and a peripheral region of the second die (8). With the first-packaged and later-etched three-dimensional system-in-package flip-chip package structure and the processing method thereof, the following problem is solved: a function integration level of the whole package is limited because no object can be embedded into a conventional metal lead frame and an organic substrate, and a narrower width and a narrower pitch between lines is necessary for a conventional organic substrate.

摘要翻译： 提供了首次封装和后蚀刻的三维倒装芯片系统级封装结构及其处理方法。 封装结构包括：焊盘（1），引脚（2）; 设置在销（2）的上表面上的导电柱（3）; 在所述垫（1）的上表面上翻转的第一管芯（4）; 用于与导电柱（3）和第一模具（4）的周边区域封装的第一模制材料或环氧树脂（9）; 设置在从第一成型材料或环氧树脂（9）露出的导电柱（3）的表面上的抗氧化层（11）; 在所述垫（1）的下表面和所述销（2）上翻转的第二模具（8）; 以及用于与所述垫（1）和所述销（2）的下表面的区域以及所述第二模具（8）的周边区域封装的第二模制材料或环氧树脂（10）。 利用第一次封装和后蚀刻的三维系统级封装倒装芯片封装结构及其处理方法，解决了以下问题：整个封装的功能集成度受到限制，因为无法嵌入物体 成为常规的金属引线框架和有机基板，并且对于传统的有机基板，需要线之间的窄的宽度和较窄的间距。

公开(公告)号：US20160141233A1

公开(公告)日：2016-05-19

申请号：US14901411

申请日：2014-01-07

申请人： JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD

发明人： Steve Xin Liang ,  Chih-Chung Liang ,  Yu-Bin Lin ,  Yaqin Wang ,  Youhai Zhang

IPC分类号： H01L23/495 ,  H01L21/56 ,  H01L25/00 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L23/29

CPC分类号： H01L23/49575 ,  H01L21/4821 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/568 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16258 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/32013 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48247 ,  H01L2224/43

摘要： The present invention relates to a first-packaged and later-etched normal chip three dimension-on-chip metal circuit board structure and a processing method for manufacturing the same, the structure includes: metal substrate frame (1); a lead (3) provided in the metal substrate frame (1); a conductive pillar (4) provided in a top surface of the lead (3); a chip is mounted normally on a top surface of the metal circuit frame (1) or between the leads (3); a metal wire (6) via which a top surface of the chip (5) is connected to a top surface of the lead (3); a molding material (8) with which a periphery region of the lead (3), the conductive pillar (4), the chip (5) and the metal wire (6) is encapsulated, with the molding material (8) being flushed with a top of the conductive pillar (4).

摘要翻译： 本发明涉及第一封装和后蚀刻的普通芯片三维片上金属电路板结构及其制造方法，其结构包括：金属基板框架（1）; 设置在所述金属基板框架（1）中的引线（3）; 设置在所述引线（3）的顶表面中的导电柱（4）; 芯片通常安装在金属电路框架（1）的顶表面上或引线（3）之间; 金属线（6），芯片（5）的顶表面通过该金属线连接到引线（3）的顶表面; 模制材料（8），其中封装有引线（3），导电柱（4），芯片（5）和金属丝（6）的周边区域，模制材料（8）被用 导电柱（4）的顶部。

公开(公告)号：US09633985B2

公开(公告)日：2017-04-25

申请号：US14901483

申请日：2014-01-08

申请人： Jiangsu Changjiang Electronics Technology Co., Ltd.

发明人： Chih-Chung Liang ,  Yaqin Wang ,  Chunyan Zhang ,  Yu-Bin Lin ,  Youhai Zhang

IPC分类号： H01L21/00 ,  H01L25/00 ,  H01L25/065 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L25/50 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4842 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/3178 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/4952 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A first-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and a processing method for manufacturing the same are provided. The structure includes: a die pad (1); a lead (2); a chip (4) provided on a top surface of the die pad (1) by a conductive or non-conductive adhesive material (3); a metal wire (5) via which a top surface of the chip (4) is connected to a top surface of the lead (2); a conductive pillar (6) provided on the surface of the lead (2); and a molding material (7).

公开(公告)号：US20160372338A1

公开(公告)日：2016-12-22

申请号：US14901878

申请日：2013-12-02

申请人： Jiangsu Changjiang Electronics Technology Co., Ltd

发明人： Steve Xin Liang ,  Chih-Chung Liang ,  Yu-Bin Lin ,  Yaqin Wang ,  Youhai Zhang

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/495

CPC分类号： H01L21/4832 ,  H01L21/48 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4871 ,  H01L21/4885 ,  H01L21/4889 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49531 ,  H01L23/49548 ,  H01L23/49565 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/49111 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/85399

摘要： Provided is an etching-before-packaging horizontal chip three-dimensional system level metal circuit board structure comprising a metal substrate frame; the metal substrate frame is provided with base islands and pins therein; the front faces of the base islands are provided with chips; the front faces of the chips are connected to the front faces of the pins via metal wires; conductive posts are disposed on the front faces or back faces of the pins; the peripheral areas of the base islands, the areas between the base islands and the pins, the areas between the pins, the areas above the base islands and the pins, the areas below the base islands and the pins, and the exteriors of the chips, the metal wires and the conductive posts are all encapsulated with molding compound.

摘要翻译： 提供了一种包括水晶芯片的水平切片三维系统级金属电路板结构，包括金属基板框架; 金属基板框架在其中设置有基岛和销; 基岛的前面设有芯片; 芯片的前表面通过金属线连接到销的前表面; 导电柱设置在销的前表面或后表面上; 基岛的周边区域，基岛和引脚之间的区域，引脚之间的区域，基岛上的区域和引脚，基岛和引脚之下的区域以及芯片的外部 ，金属线和导电柱都用模塑料包封。