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    Low cost digital-to-analog converter with high precision feedback resistor and output amplifier
    1.
    发明授权
    Low cost digital-to-analog converter with high precision feedback resistor and output amplifier 失效
    具有高精度反馈电阻和输出放大器的低成本数模转换器

    公开(公告)号：US4647906A

    公开(公告)日：1987-03-03

    申请号：US750338

    申请日：1985-06-28

    申请人： Jimmy R. Naylor ,  David F. Mietus ,  Robert L. White

    发明人： Jimmy R. Naylor ,  David F. Mietus ,  Robert L. White

    IPC分类号： H03M1/74 ,  H01C7/00 ,  H01C17/22 ,  H01C17/24 ,  H03M1/00 ,  H03M1/66 ,  H03K13/05

    CPC分类号： H01C17/22 ,  H03M1/089 ,  H03M1/785

    摘要： An integrated circuit digital-to-analog converter includes a nichrome feedback resistor having .+-.1% accuracy in its output amplifier, a plurality of bit current determining resistors that have .+-.30% manufacturing accuracy, a bias voltage circuit that produces a temperature-compensated bias voltage including an integrated potentiometer that is laser trimmed to compensate for the inaccuracy of the bit current determining resistors. The bit current determining resistors thereby produce constant, precise temperature-independent bit currents. The integrated potentiometer is accurately laser trimmed without changing the series resistance of the potentiometer. This prevents current density changes that change the temperature sensitivity of temperature-compensating elements in the bias voltage circuit.

    摘要翻译： 集成电路数模转换器包括在其输出放大器中具有+/- 1％精度的镍铬反馈电阻器，具有+/- 30％制造精度的多个位电流确定电阻器，产生 温度补偿偏置电压包括一个集成电位器，该电位器被激光修整以补偿位电流确定电阻器的不准确性。 因此，位电流确定电阻器产生恒定的，精确的与温度无关的位电流。 集成电位器在不改变电位器的串联电阻的情况下精确地进行激光修整。 这可以防止改变偏压电路中的温度补偿元件的温度敏感度的电流密度变化。

    Digital-to-analog converter having open-loop voltage reference for regulating bit switch currents
    2.
    发明授权
    Digital-to-analog converter having open-loop voltage reference for regulating bit switch currents 失效
    具有用于调节位开关电流的开环参考电压的数模转换器

    公开(公告)号：US4381497A

    公开(公告)日：1983-04-26

    申请号：US250858

    申请日：1981-04-03

    申请人： William J. Lillis ,  Jimmy R. Naylor ,  Anthony D. Wang ,  Robert L. White

    发明人： William J. Lillis ,  Jimmy R. Naylor ,  Anthony D. Wang ,  Robert L. White

    IPC分类号： H03M1/74 ,  G05F3/18 ,  H03M1/00 ,  H03M1/66 ,  H03K13/05

    CPC分类号： G05F3/18 ,  H03M1/06 ,  H03M1/74

    摘要： An open-loop voltage reference circuit, adapted to regulate a plurality of bit switch currents within a digital-to-analog converter, includes a zener diode reference leg for developing a reference voltage. The reference leg also includes a base-emitter junction voltage multiplier for creating a compensating voltage having a temperature tracking coefficient that is equal and opposite to that of the zener diode junction voltage. The reference voltage developed by the reference leg is used to bias a temperature independent current within a slave leg, and a current mirror circuit mirrors the current within the slave leg for supplying a constant current to the reference leg. The magnitude of the reference voltage is reduced through a divider leg, and an emitter follower leg provides a low impedance bias voltage for driving the plurality of bit switch current sources. The open-loop voltage reference circuit is further adapted to compensate for second order errors caused by temperature induced variations in current gain and Early effect variations related to changes in the power supply voltage. A Gain Adjust feature is also provided for adjusting the bit switch currents without adversely affecting the regulation thereof.

    摘要翻译： 适于调节数模转换器内的多个位开关电流的开环参考电路包括用于开发参考电压的齐纳二极管参考支路。 参考支路还包括基极 - 发射极结电压倍增器，用于产生具有与齐纳二极管结电压相同和相反的温度跟踪系数的补偿电压。 由参考支路产生的参考电压用于偏置从动支路内的独立于温度的电流，并且电流镜电路反映从动支路内的电流，以向参考支路提供恒定电流。 参考电压的幅度通过分路器脚减小，并且射极跟随器腿提供用于驱动多个位开关电流源的低阻抗偏置电压。 开环电压参考电路还适于补偿由温度引起的电流增益变化和与电源电压变化相关的早期效应变化引起的二阶误差。 还提供增益调整功能，用于调整位开关电流，而不会对其调节产生不利影响。

    Magnetic sifter
    3.
    发明授权
    Magnetic sifter 有权
    磁选机

    公开(公告)号：US07615382B2

    公开(公告)日：2009-11-10

    申请号：US11595818

    申请日：2006-11-09

    申请人： Shan X. Wang ,  Nader Pourmand ,  Robert L. White

    发明人： Shan X. Wang ,  Nader Pourmand ,  Robert L. White

    IPC分类号： G01N33/553 ,  B03C1/30

    CPC分类号： B03C1/0335 ,  B03C2201/18 ,  B03C2201/22

    摘要： The present invention provides a magnetic sifter that is small in scale, enables three-dimensional flow in a direction normal to the substrate, allows relatively higher capture rates and higher flow rates, and provides a relatively easy method of releasing captured biomolecules. The magnetic sifter includes at least one substrate. Each substrate contains a plurality of slits, each of which extends through the substrate. The sifter also includes a plurality of magnets attached to the bottom surface of the substrate. These magnets are located proximal to the openings of the slits. An electromagnetic source controls the magnitude and direction of magnetic field gradient generated by the magnets. Either one device may be used, or multiple devices may be used in series. In addition, the magnetic sifter may be used in connection with a detection chamber.

    摘要翻译： 本发明提供一种规模小的磁选筛机，使得能够沿垂直于基底的方向进行三维流动，允许相对较高的捕获率和较高的流速，并且提供了一种相对容易的释放捕获的生物分子的方法。 磁选机包括至少一个衬底。 每个基板包含多个狭缝，每个狭缝延伸穿过基板。 筛子还包括附着到基底的底表面的多个磁体。 这些磁体位于缝隙的开口附近。 电磁源控制由磁体产生的磁场梯度的大小和方向。 可以使用一个设备，或者可以串联使用多个设备。 此外，磁选机可以与检测室结合使用。

    Radiation detection apparatus
    4.
    发明授权
    Radiation detection apparatus 失效
    辐射检测装置

    公开(公告)号：US06885007B2

    公开(公告)日：2005-04-26

    申请号：US10210764

    申请日：2002-08-01

    申请人： David M. Donaghue ,  Robert L. White ,  Leonard W. Zimmermann

    发明人： David M. Donaghue ,  Robert L. White ,  Leonard W. Zimmermann

    IPC分类号： A61N5/10 ,  G01J1/42 ,  G01T1/00 ,  G01T1/16 ,  G01T1/17 ,  G01T1/185 ,  G01T1/24

    CPC分类号： G01T1/244 ,  A61N5/1048

    摘要： A radiation detection system has a linear array of radiation detectors, which are preferably ionization chambers. The detectors are connected, preferably permanently, to a multi-channel signal processor through a flexible multi-conductor shielded cable. The multi-channel signal processor is connected to a controller, such as a personal computer, through a multi-conductor cable and a communication interface device. Multiple detector arrays and multi-channel electrometers may be connected to a single personal computer and used simultaneously.

    摘要翻译： 放射线检测系统具有辐射检测器的线性阵列，其优选为电离室。 检测器优选地通过柔性多导体屏蔽电缆连接到多通道信号处理器。 多声道信号处理器通过多芯电缆和通信接口装置连接到诸如个人计算机的控制器。 多个检测器阵列和多通道静电计可以连接到单个个人计算机并同时使用。

    CMOS digital-to-analog converter circuitry
    7.
    发明授权
    CMOS digital-to-analog converter circuitry 失效
    CMOS数模转换器电路

    公开(公告)号：US4800365A

    公开(公告)日：1989-01-24

    申请号：US62774

    申请日：1987-06-15

    申请人： Robert L. White ,  Frederick J. Highton ,  Kazuo Ito ,  Gary L. Miller

    发明人： Robert L. White ,  Frederick J. Highton ,  Kazuo Ito ,  Gary L. Miller

    IPC分类号： H03M1/78 ,  H03M1/00 ,  H03M1/06

    CPC分类号： H03M1/1014 ,  H03M1/785

    摘要： A CMOS digital-to-analog converter includes a modified R-2R resistive ladder network connected to 16 pairs of bit switches responsive to the various digital inputs to produce an internal analog voltage representative of the digital input. Each pair of bit switches includes an N-channel MOSFET and a P-channel MOSFET. The on resistance of the P-channel MOSFET is adjusted to precisely match that of the N-channel MOSFET by driving the gate of each P-channel MOSFET with the output of a CMOS inverter referenced between V.sub.CC and a reference voltage that is adjusted to cause the on resistances of a P-channel "monitor" MOSFET and an N-channel "monitor" MOSFET to be equal. A reference voltage is generated by a circuit that generates a temperature-invariant source current from a V.sub.BE difference between first and second transistors, causes part of it to flow through first, second, and third resistors, the third resistor having a voltage across it established by the V.sub.BE voltage of a transistor and having a predetermined negative temperature coefficient, the second and third resistors being composed of nichrome, the first resistor being lightly doped P-type material the resistance of which has a positive temperature coefficient.

    摘要翻译： CMOS数模转换器包括一个经修改的R-2R电阻梯形网络，连接到16对位开关，响应各种数字输入产生代表数字输入的内部模拟电压。 每对位开关包括N沟道MOSFET和P沟道MOSFET。 P沟道MOSFET的导通电阻通过驱动每个P沟道MOSFET的栅极而被调整为与N沟道MOSFET的导通电阻相匹配，其中CMOS反相器的输出在VCC和参考电压之间参考，该参考电压被调整为导致 P沟道“监控”MOSFET和N沟道“监控”MOSFET的导通电阻相等。 参考电压由电路产生，该电路从第一和第二晶体管之间的VBE差产生温度不变源电流，使其一部分流过第一，第二和第三电阻器，第三电阻器具有跨过其的电压建立 通过晶体管的VBE电压并具有预定的负温度系数，第二和第三电阻器由镍铬合金构成，第一电阻器是轻掺杂的P型材料，其电阻具有正温度系数。

    Method and delay circuit with accurately controlled duty cycle
    10.
    发明申请
    Method and delay circuit with accurately controlled duty cycle 有权
    方法和延迟电路具有精确控制的占空比

    公开(公告)号：US20070296477A1

    公开(公告)日：2007-12-27

    申请号：US11473637

    申请日：2006-06-23

    申请人： Robert L. White

    发明人： Robert L. White

    IPC分类号： H03K3/017

    CPC分类号： H03K5/1565 ,  H03K5/133 ,  H03L7/0812

    摘要： A delay locked loop includes a storage element coupled to a data bus and produces a data synchronization signal. A phase detector receives a data clock signal and the data synchronization signal and produces a delay control signal. A first delay circuit produces a signal which is delayed relative to the data clock signal according to the delay control signal. A second delay circuit receiving the delayed signal produces a control signal coupled to a control input of the storage element by delaying the delayed signal an amount which causes the control signal to have a predetermined duty cycle.

    摘要翻译： 延迟锁定环包括耦合到数据总线的存储元件并产生数据同步信号。 相位检测器接收数据时钟信号和数据同步信号并产生延迟控制信号。 第一延迟电路根据延迟控制信号产生相对于数据时钟信号延迟的信号。 接收延迟信号的第二延迟电路通过将延迟信号延迟使控制信号具有预定占空比的量而产生耦合到存储元件的控制输入的控制信号。