N-channel MOS transistors having source/drain regions with germanium
    1.
    发明授权
    N-channel MOS transistors having source/drain regions with germanium 失效
    具有锗源极/漏极区域的N沟道MOS晶体管

    公开(公告)号:US4928156A

    公开(公告)日:1990-05-22

    申请号:US319000

    申请日:1989-03-06

    摘要: Metal-oxide-semiconductor (MOS) transistors with n-type source/drain regions also having germanium-doped regions in or near the source/drains. The presence of germanium near or at the location of phosphorus in graded source drains (GSDs), lightly doped drains (LDDs) and double diffused drains (DDDs) gives a better profile of the drain region with a reduced junction depth than that obtainable with phosphorus or particularly phosphorus and arsenic together. Good grading of the drain junction to avoid hot carrier instability or hot carrier injection problems is obtained along with shallow source junctions, which minimizes lateral dopant diffusion and decreases the distance between n.sup.- and n.sup.+ regions in GSDs and LDDs.

    摘要翻译: 具有n型源极/漏极区域的金属氧化物半导体(MOS)晶体管在源/漏极中或附近也具有锗掺杂区域。 分级源极漏极(GSD),轻掺杂漏极(LDD)和双扩散漏极(DDD)中磷附近或位置处的锗的存在提供了漏极区的更好的轮廓,其结点深度低于磷获得的结点深度 或特别是磷和砷一起。 获得漏极结的良好分级,以避免热载流子不稳定或热载流子注入问题,同时连接浅源极结,这可以最大限度地减小横向掺杂剂扩散,并减小GSD和LDD中n +和n +区之间的距离。

    Process of controlling surface doping
    2.
    发明授权
    Process of controlling surface doping 失效
    控制表面掺杂的过程

    公开(公告)号:US4743563A

    公开(公告)日:1988-05-10

    申请号:US53917

    申请日:1987-05-26

    摘要: A process is disclosed for controlling the surface doping of two regions of a semiconductor device and more specifically for using such control to achieve the necessary field doping in a CMOS device structure. In accordance with one embodiment of the invention a silicon substrate is provided which has first and second regions of opposite conductivity type. A uniform doping such as by ion implantation is provided into each of the conductivity regions. The two regions or portions thereof are then simultaneously differently oxidized to cause a differential segregation of the dopant into the thermally grown oxide. The differential oxide growth can be achieved by selectively implanting halogen ions into the wafer surface prior to the thermal oxidation.

    摘要翻译: 公开了一种用于控制半导体器件的两个区域的表面掺杂的方法,更具体地说是用于在CMOS器件结构中实现必要的场掺杂的这种控制。 根据本发明的一个实施例,提供了具有相反导电类型的第一和第二区域的硅衬底。 在每个导电区域中提供诸如通过离子注入的均匀掺杂。 然后,两个区域或其部分被同时不同地氧化,以引起掺杂剂与热生长的氧化物的差异偏析。 可以通过在热氧化之前将卤素离子选择性地注入晶片表面来实现差异氧化物生长。

    Field implant process for CMOS using germanium
    3.
    发明授权
    Field implant process for CMOS using germanium 失效
    使用锗的CMOS实地注入工艺

    公开(公告)号:US4728619A

    公开(公告)日:1988-03-01

    申请号:US63934

    申请日:1987-06-19

    摘要: A complementary metal-oxide-semiconductor (CMOS) isolation structure where the field isolation structure between the adjacent areas of different conductivity types has a channel stop doped with boron or phosphorus affected by germanium. The dual use of germanium and a second dopant selected from the group of phosphorus and boron provides a more precisely placed channel stop, since the germanium retards the diffusion of the boron and phosphorus and surprisingly provides improved width effect for the devices in the well where the channel stop is employed. Alternatively, the germanium may be placed in such a manner as to avoid retarding absorption of boron or phosphorus into the field oxide and retard its diffusion over the well of a different conductivity type where it is not desired.

    摘要翻译: 互补金属氧化物半导体(CMOS)隔离结构,其中不同导电类型的相邻区域之间的场隔离结构具有掺杂有受锗影响的硼或磷的沟道阻挡层。 锗和选自磷和硼的二次掺杂物的双重用途提供了更精确地放置的通道阻挡,因为锗阻碍了硼和磷的扩散,并且令人惊讶地为其中的器件提供了改进的宽度效应,其中 通道停止。 或者,可以以这样的方式放置锗,以避免将硼或磷吸收到场氧化物中,并阻止其在不希望的不同导电类型的阱上的扩散。

    N-channel MOS transistors having source/drain regions with germanium
    4.
    发明授权
    N-channel MOS transistors having source/drain regions with germanium 失效
    具有锗源极/漏极区域的N沟道MOS晶体管

    公开(公告)号:US4837173A

    公开(公告)日:1989-06-06

    申请号:US72932

    申请日:1987-07-13

    摘要: Metal-oxide-semiconductor (MOS) transistors with n-type source/drain regions also having germanium-doped regions in or near the source/drains. The presence of germanium near or at the location of phosphorus in graded source drains (GSDs), lightly doped drains (LDDs) and double diffused drains (DDDs) gives a better profile of the drain region with a reduced junction depth than that obtainable with phosphorus or particularly phosphorus and arsenic together. Good grading of the drain junction to avoid hot carrier instability or hot carrier injection problems is obtained along with shallow source junctions, which minimizes lateral dopant diffusion and decreases the distance between n- and n+ regions in GSDs and LDDs.

    摘要翻译: 具有n型源极/漏极区域的金属氧化物半导体(MOS)晶体管在源/漏极中或附近也具有锗掺杂区域。 分级源极漏极(GSD),轻掺杂漏极(LDD)和双扩散漏极(DDD)中磷附近或位置处的锗的存在提供了漏极区的更好的轮廓,其结点深度低于磷获得的结点深度 或特别是磷和砷一起。 获得漏极结的良好分级,以避免热载流子不稳定或热载流子注入问题,同时连接浅源极结,这可以最大限度地减小横向掺杂剂扩散,并减小GSD和LDD中n +和n +区之间的距离。

    Suppression of hillock growth through multiple thermal cycles by argon
implantation
    5.
    发明授权
    Suppression of hillock growth through multiple thermal cycles by argon implantation 失效
    通过氩植入,通过多个热循环抑制小丘生长

    公开(公告)号:US4704367A

    公开(公告)日:1987-11-03

    申请号:US853840

    申请日:1986-04-21

    IPC分类号: H01L21/3215 H01L21/265

    摘要: A technique for suppressing hillock growth in metal films on integrated circuits through multiple thermal cycles by argon implantation. Although it was known that ion implantation of many species such as arsenic suppressed the growth of hillocks in metal films through one thermal cycle, it was discovered that only one of the proposed ions, argon, would suppress hillock formation for multiple subsequent thermal cycles. For the other species, hillock formation would reoccur after multiple cycles. This characteristic is important for double layer metal (DLM) processes to prevent interlayer shorting.

    摘要翻译: 通过氩气注入通过多个热循环来抑制集成电路上的金属膜的小丘生长的技术。 虽然众所周知,许多物质如砷的离子注入通过一个热循环抑制金属膜中的小丘的生长,但是发现只有一个所提出的离子氩就可以抑制多个后续热循环的小丘形成。 对于其他物种,小丘形成将在多个周期后再次发生。 这种特性对于防止层间短路的双层金属(DLM)工艺很重要。

    Isolation process for semiconductor devices
    6.
    发明授权
    Isolation process for semiconductor devices 失效
    半导体器件的隔离工艺

    公开(公告)号:US4748134A

    公开(公告)日:1988-05-31

    申请号:US53919

    申请日:1987-05-26

    IPC分类号: H01L21/265 H01L21/316

    摘要: An improved process is disclosed for forming the field oxide which provides isolation between adjacent devices in an integrated circuit. In one embodiment of the invention the improvement includes implanting halogen ions, and preferably chlorine ions, into the selected regions of a semiconductor substrate where field oxide is to be formed. The halogen ions are implanted before the field oxide is thermally grown and result in a localized enhancement of the oxide growth rate in the vertical direction compared to the lateral direction. For a given oxidation cycle, the halogen implant results in the growth of a thicker oxide with minimum lateral encroachment.

    摘要翻译: 公开了一种改进的方法,用于形成场集成电路中的相邻器件之间的隔离的场氧化物。 在本发明的一个实施例中,改进包括将卤素离子,优选氯离子注入到要形成场氧化物的半导体衬底的选定区域中。 在场氧化物热生长之前注入卤素离子,并且导致与横向方向相比在垂直方向上的氧化物生长速率的局部增强。 对于给定的氧化循环,卤素注入导致较厚的氧化物的生长,具有最小的横向侵入。

    Method for forming metallic silicide films on silicon substrates by ion
beam deposition
    8.
    发明授权
    Method for forming metallic silicide films on silicon substrates by ion beam deposition 失效
    通过离子束沉积在硅衬底上形成金属硅化物膜的方法

    公开(公告)号:US4908334A

    公开(公告)日:1990-03-13

    申请号:US300863

    申请日:1989-01-24

    IPC分类号: H01L21/285

    CPC分类号: H01L21/28518

    摘要: Metallic silicide films are formed on silicon substrates by contacting the substrates with a low-energy ion beam of metal ions while moderately heating the substrate. The heating of the substrate provides for the diffusion of silicon atoms through the film as it is being formed to the surface of the film for interaction with the metal ions as they contact the diffused silicon. The metallic silicide films provided by the present invention are contaminant free, of uniform stoichiometry, large grain size, and exhibit low resistivity values which are of particular usefulness for integrated circuit production.

    摘要翻译: 金属硅化物膜通过使基板与金属离子的低能量离子束接触而在硅衬底上形成,同时适度加热衬底。 衬底的加热提供了硅原子通过膜的扩散,因为它们被形成在膜的表面上,用于与金属离子接触扩散硅时与金属离子相互作用。 由本发明提供的金属硅化物膜是无污染的,具有均匀的化学计量,较大的晶粒尺寸,并且表现出低电阻率值,这对于集成电路生产是特别有用的。

    Annealing Of Amorphous Layers In Si Formed By Ion-Implantation; A Method To Eliminate Residual Defects
    9.
    发明申请
    Annealing Of Amorphous Layers In Si Formed By Ion-Implantation; A Method To Eliminate Residual Defects 审中-公开
    通过离子注入形成Si的非晶层退火; 消除残留缺陷的方法

    公开(公告)号:US20120009769A1

    公开(公告)日:2012-01-12

    申请号:US13177216

    申请日:2011-07-06

    IPC分类号: H01L21/265

    CPC分类号: H01L21/265 H01L21/3003

    摘要: The invention is directed to ion implantation. Ion implantation is a process whereby energetic ions are used to uniformly irradiate the surface of a material—typically a semiconductor wafer. Either atomic or molecular ions are created in an ion source and then extracted for analysis (e.g. by magnetic separation) to ensure the purity of the ion beam. Post-analysis acceleration and scanning of the beam is done prior to sample irradiation. Each dopant-type acts, in general, to increase the conductivity of the silicon.

    摘要翻译: 本发明涉及离子注入。 离子注入是使用高能离子来均匀地照射材料的表面(通常是半导体晶片)的过程。 在离子源中产生原子或分子离子,然后提取用于分析(例如通过磁分离)以确保离子束的纯度。 在样品照射之前进行光束的后分析加速和扫描。 通常,每种掺杂剂类型的作用是增加硅的导电性。