公开(公告)号：US06284605B1

公开(公告)日：2001-09-04

申请号：US09428403

申请日：1999-10-28

Applicant: Jong-Dae Kim ,  Sang-Gi Kim ,  Jin-Gun Koo ,  Dae-Yong Kim

Inventor： Jong-Dae Kim ,  Sang-Gi Kim ,  Jin-Gun Koo ,  Dae-Yong Kim

IPC: H01L21336

CPC classification number: H01L21/84 ,  H01L21/76264 ,  H01L21/76283 ,  H01L27/1203

Abstract: A method for fabricating a semiconductor power integrated circuit includes the steps of forming a semiconductor structure having at least one active region, wherein an active region includes a well region for forming a source and a drift region for forming a drain region, forming a trench for isolation of the active regions, wherein the trench has a predetermined depth from a surface of the semiconductor structure, forming a first TEOS-oxide layer inside the trench and above the semiconductor structure, wherein the first TEOS-oxide layer has a predetermined thickness from the surface of the semiconductor device, forming a second TEOS-oxide layer on the first TEOS-oxide layer, wherein a thickness of the second TEOS-oxide layer is smaller than that of the first TEOS-oxide layer, and performing a selective etching to the first and second TEOS-oxide layers, to thereby simultaneously form a field oxide layer pattern, a diode insulating layer pattern and a gate oxide layer pattern, to thereby reduce processing steps and obtain a low on-resistance.

Abstract translation: 一种制造半导体功率集成电路的方法包括以下步骤：形成具有至少一个有源区的半导体结构，其中有源区包括用于形成源的阱区和用于形成漏极区的漂移区，形成用于 有源区的隔离，其中沟槽具有来自半导体结构的表面的预定深度，在沟槽内部和半导体结构之上形成第一TEOS氧化物层，其中第一TEOS氧化物层具有来自该半导体结构的预定厚度 在所述第一TEOS氧化物层上形成第二TEOS氧化物层，其中所述第二TEOS氧化物层的厚度小于所述第一TEOS氧化物层的厚度，并且对所述第一TEOS氧化物层进行选择性蚀刻 第一和第二TEOS氧化物层，从而同时形成场氧化物层图案，二极管绝缘层图案和栅极氧化物层图案 y减少加工步骤并获得低导通电阻。

公开(公告)号：US06404011B2

公开(公告)日：2002-06-11

申请号：US09865004

申请日：2001-05-23

Applicant: Jong-Dae Kim ,  Sang-Gi Kim ,  Jin-Gun Koo ,  Dae-Yong Kim

Inventor： Jong-Dae Kim ,  Sang-Gi Kim ,  Jin-Gun Koo ,  Dae-Yong Kim

IPC: H01L2976

CPC classification number: H01L21/84 ,  H01L21/76264 ,  H01L21/76283 ,  H01L27/1203

Abstract: A method for fabricating a semiconductor power integrated circuit includes the steps of forming a semiconductor structure having at least one active region, wherein an active region includes a well region for forming a source and a drift region for forming a drain region, forming a trench for isolation of the active regions, wherein the trench has a predetermined depth from a surface of the semiconductor structure, forming a first TEOS-oxide layer inside the trench and above the semiconductor structure, wherein the first TEOS-oxide layer has a predetermined thickness from the surface of the semiconductor device, forming a second TEOS-oxide layer on the first TEOS-oxide layer, wherein a thickness of the second TEOS-oxide layer is smaller than that of the first TEOS-oxide layer, and performing a selective etching to the first and second TEOS-oxide layers, to thereby simultaneously form a field oxide layer pattern, a diode insulating layer pattern and a gate oxide layer pattern, to thereby reduce processing steps and obtain a low on-resistance.

Abstract translation: 一种制造半导体功率集成电路的方法包括以下步骤：形成具有至少一个有源区的半导体结构，其中有源区包括用于形成源的阱区和用于形成漏极区的漂移区，形成用于 有源区的隔离，其中沟槽具有来自半导体结构的表面的预定深度，在沟槽内部和半导体结构之上形成第一TEOS氧化物层，其中第一TEOS氧化物层具有来自该半导体结构的预定厚度 在所述第一TEOS氧化物层上形成第二TEOS氧化物层，其中所述第二TEOS氧化物层的厚度小于所述第一TEOS氧化物层的厚度，并且对所述第一TEOS氧化物层进行选择性蚀刻 第一和第二TEOS氧化物层，从而同时形成场氧化物层图案，二极管绝缘层图案和栅极氧化物层图案 y减少加工步骤并获得低导通电阻。

公开(公告)号：US08864543B2

公开(公告)日：2014-10-21

申请号：US13926723

申请日：2013-06-25

Applicant: Jin-Han Park ,  Hyung-Sik Kim ,  Joon-Hyung Kim ,  Seung-Ho Myoung ,  Jong-Dae Kim ,  Cheol Lae Roh

Inventor： Jin-Han Park ,  Hyung-Sik Kim ,  Joon-Hyung Kim ,  Seung-Ho Myoung ,  Jong-Dae Kim ,  Cheol Lae Roh

IPC: H01J9/26 ,  H01J9/32 ,  H01L51/52 ,  H01L51/56 ,  B23K26/20

CPC classification number: H01J9/261 ,  B23K26/206 ,  H01L51/5237 ,  H01L51/5246 ,  H01L51/56 ,  H01L2251/566

Abstract: A sealing apparatus and a method of manufacturing a flat display device using the sealing apparatus. The sealing apparatus to attach a first substrate and a second substrate to each other using an attachment member disposed between the first and second substrates, the sealing apparatus comprises a stage on which the first substrate is seated, a halogen lamp irradiating light, and a reflector reflecting light irradiated from the halogen lamp to the attachment member.

Abstract translation: 密封装置及使用密封装置的平板显示装置的制造方法。 所述密封装置使用设置在所述第一和第二基板之间的附接构件将第一基板和第二基板彼此附接，所述密封装置包括第一基板所在的台，卤素灯照射光和反射器 将从卤素灯照射的光反射到附着构件。

公开(公告)号：US08455792B2

公开(公告)日：2013-06-04

申请号：US12662799

申请日：2010-05-04

Applicant: Hyung-Sik Kim ,  Alexander Voronov ,  Jin-Han Park ,  Hyun-Chul Lee ,  Tae-Wook Kang ,  Jong-Dae Kim ,  Gyoo-Wan Han ,  Cheol-Lae Roh

Inventor： Hyung-Sik Kim ,  Alexander Voronov ,  Jin-Han Park ,  Hyun-Chul Lee ,  Tae-Wook Kang ,  Jong-Dae Kim ,  Gyoo-Wan Han ,  Cheol-Lae Roh

IPC: B23K26/00

CPC classification number: B23K26/066 ,  B23K26/082 ,  B23K26/206 ,  H01L51/5246

Abstract: A laser irradiation apparatus for bonding a first substrate and a second substrate of a display device by melting a plurality of bonding members disposed between the first and second substrates to define cells when the display device is manufactured, the display device including light emitting elements disposed on a surface of the first substrate such that the bonding members respectively encompass lateral regions of the light emitting elements, the laser irradiation apparatus including a stage on which the first substrate is mounted, a laser oscillation member configured to irradiate a laser beam that melts the bonding members disposed between the first substrate and the second substrate, and a scanner configured to irradiate the laser beam incident from the laser oscillation member onto the bonding members, the scanner being configured to sequentially irradiate the laser beam on portions of the bonding members.

Abstract translation: 一种激光照射装置，其用于通过熔化设置在第一和第二基板之间的多个接合构件来接合显示装置的第一基板和第二基板，以在制造显示装置时限定单元，该显示装置包括设置在显示装置上的发光元件 所述第一基板的表面使得所述接合部件分别包围所述发光元件的横向区域，所述激光照射装置包括其上安装有所述第一基板的台，激光振荡部件，被配置为照射熔化所述接合的激光束 设置在所述第一基板和所述第二基板之间的部件，以及扫描器，被配置为将从所述激光振荡部件入射的激光束照射到所述接合部件上，所述扫描器被配置为在所述接合部件的部分上顺序地照射所述激光束。

公开(公告)号：US20100035503A1

公开(公告)日：2010-02-11

申请号：US12485380

申请日：2009-06-16

Applicant: Hyung-Sik KIM ,  Jin-Han Park ,  Joon-Hyung Kim ,  Hyun-Chul Lee ,  Sung-Gon Kim ,  Tae-Wook Kang ,  Jong-Dae Kim ,  Gyoo-Wan Han ,  Cheol-Lae Roh

Inventor： Hyung-Sik KIM ,  Jin-Han Park ,  Joon-Hyung Kim ,  Hyun-Chul Lee ,  Sung-Gon Kim ,  Tae-Wook Kang ,  Jong-Dae Kim ,  Gyoo-Wan Han ,  Cheol-Lae Roh

IPC: H01J9/26

CPC classification number: H01L51/56 ,  C03C8/24 ,  C03C27/06 ,  C03C2218/34 ,  H01L51/5246 ,  H01L2251/566

Abstract: To minimize stress variations applied to mother glasses when a glass sealing material is melted via a laser to combine the mother glasses, a method of manufacturing a flat panel display device includes providing a plurality of emission units between a first substrate and a second substrate, wherein the first substrates faces the second substrate and each emission unit forms a unit display device; providing a plurality of walls between the first substrate and the second substrate, wherein each wall respectively surrounds one of the emission units; irradiating a laser beam onto the walls, wherein the laser beam is simultaneously irradiated to wall portions aligned in a row in a first direction; scanning the laser beam in a second direction, wherein the second direction is different from the first direction to irradiate other wall portions of the plurality of walls; and cutting the first and second substrates to obtain individual display devices.

Abstract translation: 为了最小化通过激光熔化玻璃密封材料以组合母眼镜时应用于母眼镜的应力变化，制造平板显示装置的方法包括在第一基板和第二基板之间提供多个发射单元，其中 第一基板面对第二基板，每个发光单元形成单元显示装置; 在所述第一基板和所述第二基板之间提供多个壁，其中每个壁分别围绕所述发射单元中的一个; 将激光束照射到所述壁上，其中所述激光束同时沿着在第一方向上排列成一列的壁部照射; 沿第二方向扫描激光束，其中第二方向与第一方向不同以照射多个壁的其它壁部分; 并切割第一和第二基板以获得单独的显示装置。

公开(公告)号：US07116255B2

公开(公告)日：2006-10-03

申请号：US11153045

申请日：2005-06-14

Applicant: Seung-Chul Lee ,  Kwi-Dong Kim ,  Gyu-Hyun Kim ,  Jong-Ki Kwon ,  Jong-Dae Kim

Inventor： Seung-Chul Lee ,  Kwi-Dong Kim ,  Gyu-Hyun Kim ,  Jong-Ki Kwon ,  Jong-Dae Kim

IPC: H03M1/66

CPC classification number: H03M1/0604 ,  H03M1/1215 ,  H03M1/167 ,  H03M1/804

Abstract: A multiplying digital to analog converter comprising a digital to analog converter having a plurality of capacitors coupled in parallel, applying first signals to the capacitors during a sampling period, and applying second signals to the capacitors during an amplifying period, and an amplifier including a first amplifier electrically coupled to the digital to analog converter; a second amplifier electrically coupled to the first amplifier; and a first switch electrically coupled between an input end and an output end of the second amplifier, being turned off during a sampling period, and being turned off during an amplifying period.

公开(公告)号：US07110271B2

公开(公告)日：2006-09-19

申请号：US11001802

申请日：2004-12-01

Applicant: Sang-Hyun Jang ,  Kyu-Chan Lee ,  Jong-Dae Kim ,  Jae-Hun Jeong

Inventor： Sang-Hyun Jang ,  Kyu-Chan Lee ,  Jong-Dae Kim ,  Jae-Hun Jeong

IPC: H02H7/10 ,  G05F1/40 ,  G05F1/44

CPC classification number: H02M1/36 ,  Y10S323/908

Abstract: An inrush current prevention circuit for a DC-DC converter is provided and in preferred aspects comprises a switching element that transforms an input voltage by being switched on and off and outputs the transformed voltage. A filter filtrates the outputted voltage, transformed via the switching element, and outputs the filtrated voltage as an output voltage. A reference voltage generator generates a reference voltage. An error amplifier compares the reference voltage and output voltage and outputs an error signal. A Pulse Width Modulation (PWM) signal generator generates a PWM signal to switch on and off the switching element according to the error signal. An on-off circuit either transmits or isolates the PWM signal to the switching element. An Electronic Control Unit (ECU) controls the on-off circuit. Preferred systems of the invention can prevent an inrush current immediately following power input or during reactivation of the DC-DC converter.

Abstract translation: 提供了一种用于DC-DC转换器的浪涌电流防止电路，并且在优选的方面包括通过接通和断开来转换输入电压并输出变换的电压的开关元件。 滤波器对通过开关元件进行变换的输出电压进行滤波，并输出滤波电压作为输出电压。 参考电压发生器产生参考电压。 误差放大器比较参考电压和输出电压，并输出误差信号。 脉冲宽度调制（PWM）信号发生器根据误差信号产生PWM信号以接通和断开开关元件。 开关电路将PWM信号传输或隔离到开关元件。 电子控制单元（ECU）控制开关电路。 本发明的优选系统可以防止在电力输入之后或在重新激活DC-DC转换器期间的浪涌电流。

公开(公告)号：US08292684B2

公开(公告)日：2012-10-23

申请号：US12485380

申请日：2009-06-16

Applicant: Hyung-Sik Kim ,  Jin-Han Park ,  Joon-Hyung Kim ,  Hyun-Chul Lee ,  Sung-Gon Kim ,  Tae-Wook Kang ,  Jong-Dae Kim ,  Gyoo-Wan Han ,  Cheol-Lae Roh

Inventor： Hyung-Sik Kim ,  Jin-Han Park ,  Joon-Hyung Kim ,  Hyun-Chul Lee ,  Sung-Gon Kim ,  Tae-Wook Kang ,  Jong-Dae Kim ,  Gyoo-Wan Han ,  Cheol-Lae Roh

IPC: H01J9/24 ,  H01J9/26

CPC classification number: H01L51/56 ,  C03C8/24 ,  C03C27/06 ,  C03C2218/34 ,  H01L51/5246 ,  H01L2251/566

Abstract: To minimize stress variations applied to mother glasses when a glass sealing material is melted via a laser to combine the mother glasses, a method of manufacturing a flat panel display device includes providing a plurality of emission units between a first substrate and a second substrate, wherein the first substrates faces the second substrate and each emission unit forms a unit display device; providing a plurality of walls between the first substrate and the second substrate, wherein each wall respectively surrounds one of the emission units; irradiating a laser beam onto the walls, wherein the laser beam is simultaneously irradiated to wall portions aligned in a row in a first direction; scanning the laser beam in a second direction, wherein the second direction is different from the first direction to irradiate other wall portions of the plurality of walls; and cutting the first and second substrates to obtain individual display devices.

Abstract translation: 为了最小化通过激光熔化玻璃密封材料以组合母眼镜时应用于母眼镜的应力变化，制造平板显示装置的方法包括在第一基板和第二基板之间提供多个发射单元，其中 第一基板面对第二基板，每个发光单元形成单元显示装置; 在所述第一基板和所述第二基板之间提供多个壁，其中每个壁分别围绕所述发射单元中的一个; 将激光束照射到所述壁上，其中所述激光束同时沿着在第一方向上排列成一列的壁部照射; 沿第二方向扫描激光束，其中第二方向与第一方向不同以照射多个壁的其它壁部分; 并切割第一和第二基板以获得单独的显示装置。

公开(公告)号：US07571203B2

公开(公告)日：2009-08-04

申请号：US10972235

申请日：2004-10-21

Applicant: In-San Jeon ,  Hyuk Kim ,  Jae-Seok Kim ,  Kyung-Soo Kim ,  Hee-Bum Jung ,  Jong-Dae Kim

Inventor： In-San Jeon ,  Hyuk Kim ,  Jae-Seok Kim ,  Kyung-Soo Kim ,  Hee-Bum Jung ,  Jong-Dae Kim

IPC: G06F7/32

CPC classification number: H04L1/0656 ,  G06F17/16 ,  H04L25/0242

Abstract: Disclosed is a V-BLAST system for a MIMO communication system.In the V-BLAST system for a MIMO communication system, a pseudo inverse matrix calculator receives a channel transfer function matrix including channel information and produces a cofactor matrix and a determinant for a pseudo inverse matrix. A norm & minimum calculator calculates a minimum index for the cofactor matrix outputted from the pseudo inverse matrix calculator, a weight vector selector selects a row vector having the minimum index and calculates a transposed matrix for the row vector; an adder adds the transposed matrix to a received input symbol, and a subtractor subtracts the determinant to the output. A demapper performs a determined function operation to the output and produces estimated information.

Abstract translation: 公开了一种用于MIMO通信系统的V-BLAST系统。 在用于MIMO通信系统的V-BLAST系统中，伪逆矩阵计算器接收包括信道信息的信道传递函数矩阵，并产生用于伪逆矩阵的辅因子矩阵和行列式。 规范和最小计算器计算从伪逆矩阵计算器输出的辅因子矩阵的最小索引，权重向量选择器选择具有最小索引的行向量并计算行向量的转置矩阵; 加法器将转置的矩阵添加到接收到的输入符号，并且减法器将输出的行列式减去。 解映射器对输出执行确定的功能操作并产生估计信息。

公开(公告)号：US20050149596A1

公开(公告)日：2005-07-07

申请号：US10972235

申请日：2004-10-21

Applicant: In-San Jeon ,  Hyuk Kim ,  Jae-Seok Kim ,  Kyung-Soo Kim ,  Hee-Bum Jung ,  Jong-Dae Kim

Inventor： In-San Jeon ,  Hyuk Kim ,  Jae-Seok Kim ,  Kyung-Soo Kim ,  Hee-Bum Jung ,  Jong-Dae Kim

IPC: H04B7/02 ,  G06F17/10 ,  G06F17/16 ,  H04L1/06 ,  H04L25/02

CPC classification number: H04L1/0656 ,  G06F17/16 ,  H04L25/0242

Abstract: Disclosed is a V-BLAST system for a MIMO communication system. In the V-BLAST system for a MIMO communication system, a pseudo inverse matrix calculator receives a channel transfer function matrix including channel information and produces a cofactor matrix and a determinant for a pseudo inverse matrix. A norm & minimum calculator calculates a minimum index for the cofactor matrix outputted from the pseudo inverse matrix calculator, a weight vector selector selects a row vector having the minimum index and calculates a transposed matrix for the row vector; an adder adds the transposed matrix to a received input symbol, and a subtractor subtracts the determinant to the output. A demapper performs a determined function operation to the output and produces estimated information.

Abstract translation: 公开了一种用于MIMO通信系统的V-BLAST系统。 在用于MIMO通信系统的V-BLAST系统中，伪逆矩阵计算器接收包括信道信息的信道传递函数矩阵，并产生用于伪逆矩阵的辅因子矩阵和行列式。 规范和最小计算器计算从伪逆矩阵计算器输出的辅因子矩阵的最小索引，权重向量选择器选择具有最小索引的行向量并计算行向量的转置矩阵; 加法器将转置的矩阵添加到接收到的输入符号，并且减法器将输出的行列式减去。 解映射器对输出执行确定的功能操作并产生估计信息。