公开(公告)号：US08399293B2

公开(公告)日：2013-03-19

申请号：US13231844

申请日：2011-09-13

申请人： Juergen Leib ,  Hidefumi Yamamoto

发明人： Juergen Leib ,  Hidefumi Yamamoto

IPC分类号： H01L21/00 ,  H01L23/495

CPC分类号： B81C1/0023 ,  H01L2224/13 ,  H01L2924/1461 ,  H03H9/0542 ,  H03H9/1014 ,  H03H9/1057 ,  H03H9/1071 ,  H01L2924/00

摘要： The present invention relates to the field of electronic devices and their associated driver and/or controller integrated circuits and in particular to the mechanical packaging of electronic devices and to the packaging of electronic devices and their associated driver and/or controller integrated circuits.

摘要翻译： 本发明涉及电子设备领域及其相关的驱动器和/或控制器集成电路，特别涉及电子设备的机械封装以及电子设备及其相关联的驱动器和/或控制器集成电路的封装。

公开(公告)号：US20120003791A1

公开(公告)日：2012-01-05

申请号：US13231844

申请日：2011-09-13

申请人： Juergen Leib ,  Hidefumi Yamamoto

发明人： Juergen Leib ,  Hidefumi Yamamoto

IPC分类号： H01L21/52

CPC分类号： B81C1/0023 ,  H01L2224/13 ,  H01L2924/1461 ,  H03H9/0542 ,  H03H9/1014 ,  H03H9/1057 ,  H03H9/1071 ,  H01L2924/00

摘要： The present invention relates to the field of electronic devices and their associated driver and/or controller integrated circuits and in particular to the mechanical packaging of electronic devices and to the packaging of electronic devices and their associated driver and/or controller integrated circuits.

摘要翻译： 本发明涉及电子设备领域及其相关的驱动器和/或控制器集成电路，特别涉及电子设备的机械封装以及电子设备及其相关联的驱动器和/或控制器集成电路的封装。

公开(公告)号：US08017435B2

公开(公告)日：2011-09-13

申请号：US12307174

申请日：2007-06-01

申请人： Juergen Leib ,  Hidefumi Yamamoto

发明人： Juergen Leib ,  Hidefumi Yamamoto

IPC分类号： H01L21/00 ,  H01L23/495

CPC分类号： B81C1/0023 ,  H01L2224/13 ,  H01L2924/1461 ,  H03H9/0542 ,  H03H9/1014 ,  H03H9/1057 ,  H03H9/1071 ,  H01L2924/00

摘要： The present invention relates to the field of electronic devices and their associated driver and/or controller integrated circuits and in particular to the mechanical packaging of electronic devices and to the packaging of electronic devices and their associated driver and/or controller integrated circuits.

摘要翻译： 本发明涉及电子设备领域及其相关的驱动器和/或控制器集成电路，特别涉及电子设备的机械封装以及电子设备及其相关联的驱动器和/或控制器集成电路的封装。

公开(公告)号：US20100059877A1

公开(公告)日：2010-03-11

申请号：US12307174

申请日：2007-06-01

申请人： Juergen Leib ,  Hidefumi Yamamoto

发明人： Juergen Leib ,  Hidefumi Yamamoto

IPC分类号： H01L23/12 ,  H01L21/00

CPC分类号： B81C1/0023 ,  H01L2224/13 ,  H01L2924/1461 ,  H03H9/0542 ,  H03H9/1014 ,  H03H9/1057 ,  H03H9/1071 ,  H01L2924/00

摘要： The present invention relates to the field of electronic devices and their associated driver and/or controller integrated circuits and in particular to the mechanical packaging of electronic devices and to the packaging of electronic devices and their associated driver and/or controller integrated circuits.

摘要翻译： 本发明涉及电子设备领域及其相关的驱动器和/或控制器集成电路，特别涉及电子设备的机械封装以及电子设备及其相关联的驱动器和/或控制器集成电路的封装。

公开(公告)号：US08309384B2

公开(公告)日：2012-11-13

申请号：US12753514

申请日：2010-04-02

申请人： Juergen Leib

发明人： Juergen Leib

IPC分类号： H01L23/045

CPC分类号： H01L24/05 ,  H01L21/50 ,  H01L23/481 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/13111 ,  H01L2924/00015

摘要： A wafer level packaging process for packaging components is provided. The process includes permanently connecting a functional side of a base substrate to a covering substrate at wafer level so that a plurality of functional regions on the functional side are in each case packaged to form a wafer level package, the plurality of functional regions being spaced apart from one another on the functional side; producing contact-connection recesses in the base substrate to uncover contact surfaces on the base substrate from a back surface of the base substrate; dividing the base substrate into body regions and connection regions; thinning the body regions or the connection regions until the wafer level package has different thicknesses in the body regions and the connection regions; and dicing wafer level package into chips along predefined cutting lines between the plurality of functional regions.

摘要翻译： 提供了用于包装部件的晶片级封装工艺。 该方法包括将基底基板的功能侧永久地连接到晶片级的覆盖基板上，使得功能侧上的多个功能区域在每种情况下都被封装以形成晶片级封装，多个功能区域间隔开 在功能方面彼此; 在所述基底基板中产生接触连接凹部，以从所述基底基板的背面露出所述基底基板上的接触表面; 将基底基体分成体区域和连接区域; 使身体区域或连接区域变薄，直到晶片级封装在主体区域和连接区域中具有不同的厚度; 以及沿着所述多个功能区域之间的预定切割线将晶片级封装切割成芯片。

公开(公告)号：US10898136B2

公开(公告)日：2021-01-26

申请号：US15382370

申请日：2016-12-16

申请人： Juergen Leib ,  Michael Gruener

发明人： Juergen Leib ,  Michael Gruener

IPC分类号： A61B5/00 ,  G16H40/63 ,  A61B5/024 ,  B06B1/02 ,  A01K11/00 ,  A01K27/00 ,  A01K29/00 ,  A61B5/0205 ,  A61B5/0476 ,  A61B5/11 ,  A61B5/145 ,  H02N2/18 ,  A61B5/08

摘要： A monitoring device for monitoring the well-being of animals, the monitoring device including a carrier arrangement which can be attached to an animal and which has at least one sensor for sensing a vital function of an animal wearing the carrier arrangement. In the event of a deviation of an actual state from a target state of the animal that leaves a tolerance range, an output signal signaling the deviation is outputted by an output unit.

公开(公告)号：US07700397B2

公开(公告)日：2010-04-20

申请号：US10580284

申请日：2004-11-15

申请人： Juergen Leib

发明人： Juergen Leib

IPC分类号： H01L21/52 ,  H01L21/58

CPC分类号： H01L24/05 ,  H01L21/50 ,  H01L23/481 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/13111 ,  H01L2924/00015

摘要： A wafer level packaging process for packaging components is provided. The process includes permanently connecting a functional side of a base substrate to a covering substrate at wafer level so that a plurality of functional regions on the functional side are in each case packaged to form a wafer level package, the plurality of functional regions being spaced apart from one another on the functional side; producing contact-connection recesses in the base substrate to uncover contact surfaces on the base substrate from a back surface of the base substrate; dividing the base substrate into body regions and connection regions; thinning the body regions or the connection regions until the wafer level package has different thicknesses in the body regions and the connection regions; and dicing wafer level package into chips along predefined cutting lines between the plurality of functional regions.

摘要翻译： 提供了用于包装部件的晶片级封装工艺。 该方法包括将基底基板的功能侧永久地连接到晶片级的覆盖基板上，使得功能侧上的多个功能区域在每种情况下都被封装以形成晶片级封装，多个功能区域间隔开 在功能方面彼此; 在所述基底基板中产生接触连接凹部，以从所述基底基板的背面露出所述基底基板上的接触表面; 将基底基体分成体区域和连接区域; 使身体区域或连接区域变薄，直到晶片级封装在主体区域和连接区域中具有不同的厚度; 以及沿着所述多个功能区域之间的预定切割线将晶片级封装切割成芯片。

公开(公告)号：US07566672B2

公开(公告)日：2009-07-28

申请号：US11487620

申请日：2006-07-17

申请人： Wolfgang Pannhorst ,  Ulf Dahlmann ,  Ulrich Fotheringham ,  Juergen Leib ,  Rainer Liebald

发明人： Wolfgang Pannhorst ,  Ulf Dahlmann ,  Ulrich Fotheringham ,  Juergen Leib ,  Rainer Liebald

IPC分类号： C03C3/097 ,  C03C3/089 ,  C03C17/00 ,  C03C21/00 ,  C03C23/00 ,  C03C25/00

CPC分类号： C03C3/068 ,  C03C3/064 ,  C03C3/097

摘要： The glass is advantageous for microstructuring, especially reactive ion etching with fluorine and fluorine compounds, and has a glass composition based on oxide content and expressed in mol % of: SiO2, 40-70; GeO2, 0-30; B2O3, 5-20; P2O5, 5-20; WO3, 0-10; As2O3, 0-10; Yb2O3, 0-5; and Lu2O3, 0-5. Microstructure components, such as micro arrays, Fresnel lenses, micro wafers, or micro lens wafers, made by a method including reactive ion etching from the glass are also part of the present invention.

摘要翻译： 该玻璃有利于微结构化，特别是氟和氟化合物的反应离子蚀刻，并且具有基于氧化物含量并以摩尔％表示的玻璃组成：SiO 2，40-70; GeO2，0-30; B2O3，5-20; P2O5，5-20; WO3,0-10; As2O3，0-10; Yb2O3,0-5; 和Lu2O3，0-5。 通过包括从玻璃进行反应离子蚀刻的方法制造的微结构组件，例如微阵列，菲涅耳透镜，微晶片或微透镜晶片也是本发明的一部分。

公开(公告)号：US20100283127A1

公开(公告)日：2010-11-11

申请号：US12667185

申请日：2008-06-04

申请人： Juergen Leib

发明人： Juergen Leib

IPC分类号： H01L23/544 ,  H01L21/78

CPC分类号： H01L23/5389 ,  H01L21/50 ,  H01L24/18 ,  H01L24/82 ,  H01L2224/18 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/0106 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/00

摘要： A method for packing semiconductor components is provided, in which a first side of a first wafer is connected to at least one further wafer, wherein at least one of the wafers has a plurality a semiconductor circuits and wherein trenches are made in the second side of the first wafer opposite to the first side and divide the first wafer into a plurality of parts, which are separated from one another by the trenches, but are connected mechanically to one another by means of the at least one further wafer, and wherein the connecting region between the first wafer and the at least one further wafer has been or will be laterally exposed in the trenches. A coating that covers the connecting region is then applied to the regions of the trenches in which the connecting region is exposed.

摘要翻译： 提供一种用于封装半导体部件的方法，其中第一晶片的第一侧连接到至少一个另外的晶片，其中至少一个晶片具有多个半导体电路，并且其中沟槽在第二侧 所述第一晶片与所述第一侧相对并且将所述第一晶片分成多个部分，所述多个部分通过所述沟槽彼此分离，但是通过所述至少一个另外的晶片彼此机械连接，并且其中所述连接 第一晶片和至少一个另外的晶片之间的区域已经或将被横向暴露在沟槽中。 然后将覆盖连接区域的涂层施加到其中暴露连接区域的沟槽的区域。

公开(公告)号：US07476623B2

公开(公告)日：2009-01-13

申请号：US11243443

申请日：2005-10-04

申请人： Bianca Schreder ,  Rainer Liebald ,  Edgar Pawlowski ,  Dirk Sprenger ,  Dietrich Mund ,  Juergen Leib

发明人： Bianca Schreder ,  Rainer Liebald ,  Edgar Pawlowski ,  Dirk Sprenger ,  Dietrich Mund ,  Juergen Leib

IPC分类号： H01L21/302

CPC分类号： C03C15/00

摘要： In the method for microstructuring flat glass substrates a substrate surface of a glass substrate is coated with at least one structured mask layer and subsequently exposed to a chemically reactive ion etching process (RIE) with at least one chemical etching gas. In order to provide the same or a higher quality etching and etching rate even for economical types of glass the chemical etching gas is mixed with at least one noble gas, so that the proportion of sputtering etching in the ion etching process is significantly increased.

摘要翻译： 在用于微结构化平板玻璃基板的方法中，玻璃基板的基板表面涂覆有至少一个结构化掩模层，随后用至少一种化学蚀刻气体暴露于化学反应离子蚀刻工艺（RIE）。 为了提供相同或更高质量的蚀刻和蚀刻速率，即使对于经济类型的玻璃，化学蚀刻气体与至少一种惰性气体混合，使得离子蚀刻工艺中溅射蚀刻的比例显着增加。