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    Nonvolatile memory including intermediate buffer and input/output buffer and memory system including the nonvolatile memory
    4.
    发明授权
    Nonvolatile memory including intermediate buffer and input/output buffer and memory system including the nonvolatile memory 有权

    公开(公告)号：US11543969B2

    公开(公告)日：2023-01-03

    申请号：US17332117

    申请日：2021-05-27

    Applicant: Kioxia Corporation

    Inventor： Yoshihisa Kojima ,  Masanobu Shirakawa ,  Kiyotaka Iwasaki

    IPC: G06F3/06

    Abstract: According to one embodiment, there is provided a nonvolatile memory including a memory cell array, as input/output buffer, one or more intermediate buffers, and a control circuit. The memory cell array includes a plurality of pages. Each of the one or more intermediate buffers is electrically connected between the memory cell array and the input/output buffer. The control circuit is configured to store, in a first intermediate buffer, data read through sensing operation from a first page out of the plurality of pages in accordance with a first command that includes a sensing operation instruction and designation of the first intermediate buffer among the one or more intermediate buffers.

    Memory controller
    5.
    发明授权
    Memory controller 有权

    公开(公告)号：US11264098B2

    公开(公告)日：2022-03-01

    申请号：US16864378

    申请日：2020-05-01

    Applicant: Kioxia Corporation

    Inventor： Shinya Koizumi ,  Kiyotaka Iwasaki

    IPC: H03M13/00 ,  G11C16/08 ,  H03M13/35 ,  G06F11/10 ,  G11C16/04 ,  G11C11/56 ,  G11C29/04 ,  H03M13/15 ,  H03M13/11

    Abstract: According to one embodiment, a memory controller includes an encoder, a randomizing circuit, and an interface. The encoder subjects first data received from an external device to error correction coding. The randomizing circuit randomizes second data output from the encoder. The interface transmits third data output from the randomizing circuit to a nonvolatile semiconductor memory and controls write/read of the nonvolatile semiconductor memory. The interface transmits data of a size larger than or equal to a size of a write unit of the nonvolatile semiconductor memory to the nonvolatile semiconductor memory in a write sequence.

    Memory system
    7.
    发明授权
    Memory system 有权

    公开(公告)号：US11114170B2

    公开(公告)日：2021-09-07

    申请号：US16886546

    申请日：2020-05-28

    Applicant: KIOXIA CORPORATION

    Inventor： Takaya Handa ,  Yoshihisa Kojima ,  Kiyotaka Iwasaki

    IPC: G11C16/26 ,  G11C16/08 ,  G11C16/32 ,  G11C16/24 ,  G11C7/10 ,  G11C7/22

    Abstract: A semiconductor memory device includes a memory cell array, an input/output circuit configured to output read data from the semiconductor memory device, a first data latch configured to latch data read from the memory cell array as the read data, a second data latch to which the read data is transferred from the first data latch and from which the read data is transferred to the input/output circuit, a signaling circuit configured to output a ready signal or a busy signal, and a control circuit configured to control the signaling circuit to output the busy signal while the read data is being latched in the first data latch during a read operation performed on the memory cell array and to output the ready signal while the read data latched in the first data latch is being transferred from the first latch to the second latch.

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