公开(公告)号：US5513028A

公开(公告)日：1996-04-30

申请号：US419762

申请日：1995-04-10

申请人： Koichi Sono ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Katsuhisa Ogawa ,  Katsuhito Sakurai ,  Shigetoshi Sugawa ,  Shigeki Kondo

发明人： Koichi Sono ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Katsuhisa Ogawa ,  Katsuhito Sakurai ,  Shigetoshi Sugawa ,  Shigeki Kondo

IPC分类号： G02F1/1333 ,  G02F1/1335 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368

CPC分类号： G02F1/133514 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/1337 ,  G02F1/13454 ,  G02F1/1368 ,  G02F2001/133388

摘要： A liquid crystal display device has a pixel electrode substrate with a step defined by adjacent display and non-display areas. The display area has substantially the same height as a portion of the close periphery thereof. In the liquid crystal display device, the step is an electrically insulated dummy part which is not used as the display area. The dummy part has the same layer structure as the pixels in the display area.

摘要翻译： 液晶显示装置具有由相邻显示区域和非显示区域限定的步骤的像素电极基板。 显示区域与其周边的一部分具有大致相同的高度。 在液晶显示装置中，该步骤是不用作显示区域的电绝缘虚拟部分。 虚拟部分具有与显示区域中的像素相同的层结构。

公开(公告)号：US5600344A

公开(公告)日：1997-02-04

申请号：US561153

申请日：1995-11-21

申请人： Koichi Sono ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Katsuhisa Ogawa ,  Katsuhito Sakurai

发明人： Koichi Sono ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Katsuhisa Ogawa ,  Katsuhito Sakurai

IPC分类号： G02F1/133 ,  G02F1/1343 ,  G09G3/36

CPC分类号： G09G3/36 ,  G02F1/134336 ,  G09G2310/0232 ,  G09G2310/061 ,  G09G2360/04

摘要： A liquid crystal display driven in multiplex with a plurality of pixels arranged in a matrix comprises a main display, and at least one sub-display located at least partly around the periphery of the main display.

摘要翻译： 与以矩阵排列的多个像素多路复用的液晶显示器包括主显示器和至少部分地围绕主显示器的周边定位的子显示器。

公开(公告)号：US5579027A

公开(公告)日：1996-11-26

申请号：US614321

申请日：1996-03-12

申请人： Katsuhito Sakurai ,  Mamoru Miyawaki ,  Akira Ishizaki

发明人： Katsuhito Sakurai ,  Mamoru Miyawaki ,  Akira Ishizaki

IPC分类号： G09G3/20 ,  G09G3/36

CPC分类号： G09G3/3611 ,  G09G3/3607 ,  G09G3/3688 ,  G09G2310/0224 ,  G09G3/2011

摘要： An image display apparatus, having a pixel configuration in which pixels on the n-th line and pixels on the n+1-th line are deviated in the horizontal direction, improves the resolution in the horizontal direction by changing over an image signal to be sampled between a delay signal DL and a through signal TH supplied from a delay circuit so as to deviate the image signal by a time corresponding to the deviation of the pixels. By sampling the image signal which corresponds to each line while deviating the image signal by the time which corresponds to the deviation of the pixels in the horizontal direction, the deviation between the pixel and the signal is eliminated, so that the resolution in the horizontal direction is improved.

摘要翻译： 具有像素结构的图像显示装置，其中第n行上的像素和第n + 1行上的像素在水平方向上偏离，通过将图像信号转换为水平方向来提高分辨率 在从延迟电路提供的延迟信号DL和通过信号TH之间采样，以将图像信号偏离与像素的偏差相对应的时间。 通过对与每行对应的图像信号进行采样，同时使图像信号偏移对应于水平方向上的像素的偏差的时间，消除了像素和信号之间的偏差，使得在水平方向上的分辨率 改进了

公开(公告)号：US5801373A

公开(公告)日：1998-09-01

申请号：US950176

申请日：1997-10-14

申请人： Hayao Oozu ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Shigetoshi Sugawa

发明人： Hayao Oozu ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Shigetoshi Sugawa

IPC分类号： H01L27/146 ,  H01L27/148 ,  H04N1/00 ,  H04N1/48 ,  H04N5/33 ,  H04N5/372 ,  H04N9/04 ,  H01J40/14

CPC分类号： H04N1/00846 ,  H01L27/14621 ,  H01L27/1463 ,  H01L27/14645 ,  H01L27/14649 ,  H04N1/00864 ,  H04N1/00875 ,  H04N1/486 ,  H04N3/1562 ,  H04N3/1581 ,  H04N5/33 ,  H04N5/332 ,  H04N9/045

摘要： In a solid-state image pickup device this invention, in order to satisfactorily detect optical signals over a wide spectrum range from a visible light range to an invisible light range, a photoelectric conversion element for converting an optical signal in the invisible light range into an electrical signal, and photoelectric conversion elements for converting an optical signal in the visible light range into an electrical signal are formed on a common semiconductor chip.

摘要翻译： 在本发明的固体摄像装置中，为了在从可见光范围到不可见光范围的宽光谱范围内令人满意地检测光信号，将用于将不可见光范围内的光信号转换为 电信号和用于将可见光范围内的光信号转换为电信号的光电转换元件形成在公共半导体芯片上。

公开(公告)号：US5331197A

公开(公告)日：1994-07-19

申请号：US870258

申请日：1992-04-17

申请人： Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Hiroshi Yuzurihara ,  Tetsunobu Kohchi

发明人： Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Hiroshi Yuzurihara ,  Tetsunobu Kohchi

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L27/102 ,  H01L27/108 ,  H01L27/115 ,  H01L29/423 ,  H01L29/786 ,  H01L29/78

CPC分类号： H01L29/7851 ,  H01L21/823475 ,  H01L27/1026 ,  H01L27/10805 ,  H01L27/115 ,  H01L29/66795

摘要： A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.

摘要翻译： 一种半导体存储器件，包括：绝缘栅晶体管，具有沿着基板的主表面设置的多个主电极区域和设置在所述多个主电极区域之间的沟道区域;以及栅极电极，设置在所述沟道区域上， 绝缘体之间，所述栅电极具有至少两个相对的部分; 以及设置在所述主电极区域之一上的电可破坏的存储元件。

公开(公告)号：US5428237A

公开(公告)日：1995-06-27

申请号：US158371

申请日：1993-11-29

申请人： Hiroshi Yuzurihara ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Tetsunobu Kochi

发明人： Hiroshi Yuzurihara ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Tetsunobu Kochi

IPC分类号： G11C17/16 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/112 ,  H01L27/12 ,  H01L29/06 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/7851 ,  G11C17/16 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/8238 ,  H01L21/823821 ,  H01L29/0653 ,  H01L29/66651 ,  H01L29/66795 ,  H01L29/7834 ,  H01L29/78612 ,  H01L29/78639 ,  H01L27/112 ,  H01L27/1211 ,  Y10S257/901

摘要： An insulated gate type transistor includes a plurality of major electrode regions, a channel region provided between the plurality of major electrode regions, a gate electrode provided on the channel region with a gate insulating film therebetween, and a semiconductor region provided in contact with the channel region, the semiconductor region having the same conductivity type as that of the channel region and a higher impurity concentration than the channel region. The gate electrode has at least two opposing portions. The plurality of major electrode regions are provided on an substrate insulating film. The transistor is activated in a state where the semiconductor region is maintained at a predetermined voltage. A semiconductor device includes a plurality of memory cells, each of which includes the aforementioned insulated gate type transistor and an electrically breakable memory element provided on one of the major electrode regions.

摘要翻译： 绝缘栅型晶体管包括多个主电极区域，设置在多个主电极区域之间的沟道区域，设置在沟道区域上的栅极电极之间的栅极绝缘膜，以及设置成与沟道接触的半导体区域 区域，具有与沟道区相同的导电类型和比沟道区更高的杂质浓度的半导体区。 栅电极具有至少两个相对的部分。 多个主电极区域设置在基板绝缘膜上。 晶体管在半导体区域保持在预定电压的状态下被激活。 半导体器件包括多个存储单元，每个存储单元包括上述绝缘栅型晶体管和设置在其中一个主电极区上的电可破坏存储元件。

公开(公告)号：US5567962A

公开(公告)日：1996-10-22

申请号：US263147

申请日：1994-06-21

申请人： Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Hiroshi Yuzurihara ,  Tetsunobu Kohchi

发明人： Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Hiroshi Yuzurihara ,  Tetsunobu Kohchi

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L27/102 ,  H01L27/108 ,  H01L27/115 ,  H01L29/423 ,  H01L29/786 ,  H01L29/78

CPC分类号： H01L29/7851 ,  H01L21/823475 ,  H01L27/1026 ,  H01L27/10805 ,  H01L27/115 ,  H01L29/66795

摘要： A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.

摘要翻译： 一种半导体存储器件，包括：绝缘栅晶体管，具有沿着基板的主表面设置的多个主电极区域和设置在所述多个主电极区域之间的沟道区域;以及栅极电极，设置在所述沟道区域上， 绝缘体之间，所述栅电极具有至少两个相对的部分; 以及设置在所述主电极区域之一上的电可破坏的存储元件。

公开(公告)号：US5530266A

公开(公告)日：1996-06-25

申请号：US242047

申请日：1994-05-13

申请人： Takao Yonehara ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Junichi Hoshi ,  Masaru Sakamoto ,  Shigetoshi Sugawa ,  Shunsuke Inoue ,  Toru Koizumi ,  Tetsunobu Kohchi ,  Kiyofumi Sakaguchi ,  Takanori Watanabe

发明人： Takao Yonehara ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Junichi Hoshi ,  Masaru Sakamoto ,  Shigetoshi Sugawa ,  Shunsuke Inoue ,  Toru Koizumi ,  Tetsunobu Kohchi ,  Kiyofumi Sakaguchi ,  Takanori Watanabe

IPC分类号： G02F1/1362 ,  H01L27/12 ,  H01L27/092 ,  H01L27/105

CPC分类号： G02F1/13454 ,  H01L27/12 ,  H01L27/1203 ,  H01L27/1233 ,  G02F2001/136281 ,  G02F2202/105 ,  Y10S438/96

摘要： A liquid crystal image display unit created on a substrate non-transparent to the light in the visible radiation area, characterized in that a portion beneath a liquid crystal pixel part on said substrate is removed, so that the light is made transmissive through said liquid crystal pixel part.

摘要翻译： 在对可见光区域的光不透明的基板上形成的液晶图像显示单元，其特征在于，除去所述基板上的液晶像素部下方的部分，使得所述光透过所述液晶 像素部分。

公开(公告)号：US5666180A

公开(公告)日：1997-09-09

申请号：US645892

申请日：1996-05-14

申请人： Akira Ishizaki ,  Mamoru Miyawaki ,  Shigeki Kondo

发明人： Akira Ishizaki ,  Mamoru Miyawaki ,  Shigeki Kondo

IPC分类号： G02F1/1335 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1333

CPC分类号： G02F1/136213 ,  G02F1/133512 ,  G02F1/136227 ,  G02F2001/136218

摘要： A liquid crystal display having a plurality of sets of matrix wiring elements, a plurality of active elements and a liquid crystal layer includes a conductive layer for being maintained at a predetermined potential, which layer is selectively provided around each of pixel electrodes individually provided for each pixel. An image information processing apparatus includes such a liquid crystal display. The selective formation of the conductive layer makes it possible to reduce cross-talk while reducing the risk of the generation of unwanted parasitic capacitance and leakage current.

摘要翻译： 具有多组矩阵布线元件，多个有源元件和液晶层的液晶显示器包括用于保持在预定电位的导电层，该层被选择性地设置在每个单独设置的像素电极周围 像素。 图像信息处理装置包括这种液晶显示器。 导电层的选择性形成使得可以减少串扰，同时降低产生不想要的寄生电容和漏电流的风险。

公开(公告)号：US5612230A

公开(公告)日：1997-03-18

申请号：US417901

申请日：1995-04-06

申请人： Hiroshi Yuzurihara ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Tetsunobu Kochi

发明人： Hiroshi Yuzurihara ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Tetsunobu Kochi

IPC分类号： G11C17/16 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/112 ,  H01L27/12 ,  H01L29/06 ,  H01L29/78 ,  H01L29/786 ,  H01L21/265 ,  H01L21/20

CPC分类号： H01L29/7851 ,  G11C17/16 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/8238 ,  H01L21/823821 ,  H01L29/0653 ,  H01L29/66651 ,  H01L29/66795 ,  H01L29/7834 ,  H01L29/78612 ,  H01L29/78639 ,  H01L27/112 ,  H01L27/1211 ,  Y10S257/901

摘要： An insulated gate type transistor includes a plurality of major electrode regions, a channel region provided between the plurality of major electrode regions, a gate electrode provided on the channel region with a gate insulating film therebetween, and a semiconductor region provided in contact with the channel region, the semiconductor region having the same conductivity type as that of the channel region and a higher impurity concentration than the channel region. The gate electrode has at least two opposing portions. The plurality of major electrode regions are provided on an substrate insulating film. The transistor is activated in a state where the semiconductor region is maintained at a predetermined voltage. A semiconductor device includes a plurality of memory cells, each of which includes the aforementioned insulated gate type transistor and an electrically breakable memory element provided on one of the major electrode regions.

摘要翻译： 绝缘栅型晶体管包括多个主电极区域，设置在多个主电极区域之间的沟道区域，设置在沟道区域上的栅极电极之间的栅极绝缘膜，以及设置成与沟道接触的半导体区域 区域，具有与沟道区相同的导电类型和比沟道区更高的杂质浓度的半导体区。 栅电极具有至少两个相对的部分。 多个主电极区域设置在基板绝缘膜上。 晶体管在半导体区域保持在预定电压的状态下被激活。 半导体器件包括多个存储单元，每个存储单元包括上述绝缘栅型晶体管和设置在其中一个主电极区上的电可破坏存储元件。