公开(公告)号：US5636254A

公开(公告)日：1997-06-03

申请号：US430534

申请日：1995-04-25

申请人： Kenichi Hase ,  Ryutaro Horita ,  Kunio Watanabe ,  Yoshiteru Ishida ,  Takashi Nara ,  Hiroshi Kimura

发明人： Kenichi Hase ,  Ryutaro Horita ,  Kunio Watanabe ,  Yoshiteru Ishida ,  Takashi Nara ,  Hiroshi Kimura

IPC分类号： G11B5/09 ,  G11B20/10 ,  G11B20/14 ,  H03H11/26 ,  H03H11/54 ,  H03K5/13 ,  H03K5/135 ,  H03L7/081 ,  H03L7/089 ,  H03L7/099 ,  H04L7/00 ,  H04L7/02

CPC分类号： H03L7/0805 ,  G11B20/10 ,  G11B20/1403 ,  H03K5/13 ,  H03L7/0812 ,  H03L7/0896 ,  H03L7/0995 ,  H04L7/02 ,  H04L7/0008 ,  H04L7/0041

摘要： A signal processing delay circuit is fabricated as a semiconductor integration circuit to cope with increase in the data transfer speed and data recording and reproducing density on a recording medium. In the delay circuit, the amount of delay of a reference delay circuit of a delay PLL is controlled to take a fixed value independent of deviation in quality of the semiconductor circuit, change in power, and alteration in temperature. A control signal supervising the delay amount of the reference delay circuit is employed to control amounts of delay of input signals supplied to a window adjustment delay circuit of a window adjustment circuit and a T/2 generation delay circuit generating a synchronizing signal. Each of these delay circuits includes an analog variable delay circuit having the same configuration. The window adjustment delay circuit is supervised by a signal obtained by weighting the control signal by a D/A converter. A data acquisition circuit and a data write circuit each include an analog variable delay circuit.

摘要翻译： 制造信号处理延迟电路作为半导体积分电路，以应对数据传送速度的增加和记录介质上的数据记录和再现密度。 在延迟电路中，延迟PLL的参考延迟电路的延迟量被控制为独立于半导体电路的质量偏差，功率变化和温度变化的固定值。 采用监视参考延迟电路的延迟量的控制信号来控制提供给窗口调整电路的窗口调整延迟电路的输入信号的延迟量和产生同步信号的T / 2产生延迟电路。 这些延迟电路中的每一个包括具有相同配置的模拟可变延迟电路。 窗口调整延迟电路由通过D / A转换器对控制信号进行加权而获得的信号进行监视。 数据采集​​电路和数据写入电路各自包括模拟可变延迟电路。

公开(公告)号：US5878097A

公开(公告)日：1999-03-02

申请号：US865704

申请日：1997-05-30

申请人： Kenichi Hase ,  Ryutaro Horita ,  Kunio Watanabe ,  Yoshiteru Ishida ,  Takashi Nara ,  Hiroshi Kimura

发明人： Kenichi Hase ,  Ryutaro Horita ,  Kunio Watanabe ,  Yoshiteru Ishida ,  Takashi Nara ,  Hiroshi Kimura

IPC分类号： G11B5/09 ,  G11B20/10 ,  G11B20/14 ,  H03H11/26 ,  H03H11/54 ,  H03K5/13 ,  H03K5/135 ,  H03L7/081 ,  H03L7/089 ,  H03L7/099 ,  H04L7/00 ,  H04L7/02 ,  H04L25/36 ,  H04L25/40

CPC分类号： H03L7/0805 ,  G11B20/10 ,  G11B20/1403 ,  H03K5/13 ,  H03L7/0812 ,  H03L7/0896 ,  H03L7/0995 ,  H04L7/02 ,  H04L7/0008 ,  H04L7/0041

摘要： A signal processing delay circuit is fabricated as a semiconductor integration circuit to cope with increase in the data transfer speed and data recording and reproducing density on a recording medium. In the delay circuit, the amount of delay of a reference delay circuit of a delay PLL is controlled to take a fixed value independent of deviation in quality of the semiconductor circuit, change in power, and alteration in temperature. A control signal supervising the delay amount of the reference delay circuit is employed to control amounts of delay of input signals supplied to a window adjustment delay circuit of a window adjustment circuit and a T/2 generation delay circuit generating a synchronizing signal. Each of these delay circuits includes an analog variable delay circuit having the same configuration. The window adjustment delay circuit is supervised by a signal obtained by weighting the control signal by a D/A converter. A data acquisition circuit and a data write circuit each include an analog variable delay circuit.

摘要翻译： 制造信号处理延迟电路作为半导体积分电路，以应对数据传送速度的增加和记录介质上的数据记录和再现密度。 在延迟电路中，延迟PLL的参考延迟电路的延迟量被控制为独立于半导体电路的质量偏差，功率变化和温度变化的固定值。 采用监视参考延迟电路的延迟量的控制信号来控制提供给窗口调整电路的窗口调整延迟电路的输入信号的延迟量和产生同步信号的T / 2产生延迟电路。 这些延迟电路中的每一个包括具有相同配置的模拟可变延迟电路。 窗口调整延迟电路由通过D / A转换器对控制信号进行加权而获得的信号进行监视。 数据采集​​电路和数据写入电路各自包括模拟可变延迟电路。

公开(公告)号：US5572163A

公开(公告)日：1996-11-05

申请号：US362874

申请日：1994-12-23

申请人： Hiroshi Kimura ,  Ryutaro Horita ,  Kenichi Hase ,  Kunio Watanabe ,  Takashi Nara

发明人： Hiroshi Kimura ,  Ryutaro Horita ,  Kenichi Hase ,  Kunio Watanabe ,  Takashi Nara

IPC分类号： H03H11/04 ,  H03B5/00

CPC分类号： H03H11/0472 ,  H03H11/0433 ,  H03H2210/023

摘要： An active filter control apparatus for controlling or tuning an active filter having a variable cut-off frequency. The active filter control apparatus includes a control circuit for controlling or tuning the cut-off frequency of the active filter and a characteristic correction generator for generating a correction signal to correct a group delay characteristic of the active filter in accordance with a set cut-off frequency. The characteristic correction includes a correction signal generator for generating the correction signal in accordance with a set correction amount. The cut-off frequency controller controls tunes the characteristic of the active filter in accordance with the correction signal. Preferably, the apparatus is formed of a one-chip LSI integrated on one chip. The control apparatus can be utilized to control the speed in a recording/reproducing apparatus such as a optical disk drive or a magnetic tape drive apparatus.

摘要翻译： 一种用于控制或调谐具有可变截止频率的有源滤波器的有源滤波器控制装置。 有源滤波器控制装置包括用于控制或调谐有源滤波器的截止频率的控制电路和用于根据设定的截止产生校正信号校正有源滤波器的组延迟特性的特性校正发生器 频率。 特征校正包括用于根据设定的校正量产生校正信号的校正信号发生器。 截止频率控制器根据校正信号控制有源滤波器的特性。 优选地，该装置由集成在一个芯片上的单芯片LSI形成。 控制装置可以用于控制诸如光盘驱动器或磁带驱动装置的记录/再现装置中的速度。

公开(公告)号：US5937020A

公开(公告)日：1999-08-10

申请号：US719875

申请日：1996-09-25

申请人： Kenichi Hase ,  Ryutaro Horita ,  Tsuguyoshi Hirooka ,  Haruto Katsu ,  Takashi Nara ,  Shoichi Miyazawa, deceased ,  Shintaro Suzumura

发明人： Kenichi Hase ,  Ryutaro Horita ,  Tsuguyoshi Hirooka ,  Haruto Katsu ,  Takashi Nara ,  Shoichi Miyazawa, deceased ,  Shintaro Suzumura

IPC分类号： G11B20/10 ,  G11B20/14 ,  G11B20/18 ,  H03L7/087 ,  H03L7/22 ,  H03M1/36 ,  H04L7/033 ,  H04L7/04 ,  H04L7/10 ,  H03D3/24 ,  H03D3/02 ,  H03L7/00

CPC分类号： G11B20/10055 ,  G11B20/10009 ,  G11B20/1403 ,  H03L7/087 ,  H03M1/365 ,  H04L7/033 ,  H04L7/046 ,  H04L7/10

摘要： Digital information including a sync data field and a user data field subsequent thereto is read from a storage media as a digital information signal in an analog signal format. The obtained signal is sampled according to a clock signal and is thereby transformed into a digital information signal in a digital format. In the sync data field, the clock signal is synchronized with the digital information signal by an analog PLL circuit. Thereafter, in the user data field, the clock signal is synchronized with the digital information signal by a digital PLL circuit.

摘要翻译： 从存储介质读取包括同步数据字段和随后的用户数据字段的数字信息作为模拟信号格式的数字信息信号。 所获得的信号根据时钟信号被采样，从而被转换为数字格式的数字信息信号。 在同步数据字段中，时钟信号通过模拟PLL电路与数字信息信号同步。 此后，在用户数据字段中，时钟信号通过数字PLL电路与数字信息信号同步。

公开(公告)号：US06445522B1

公开(公告)日：2002-09-03

申请号：US09716326

申请日：2000-11-21

申请人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

发明人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

IPC分类号： G11B509

CPC分类号： G11B20/1217 ,  G11B5/59605 ,  G11B20/24 ,  G11B21/106 ,  G11B2020/1287 ,  G11B2020/1298

摘要： A signal processing device for analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitalized in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.

摘要翻译： 用于模数转换突发信号的信号处理装置具有通过NRZ数据总线选择数据总线以向盘控制装置通知转换结果的特征。 磁盘控制装置存储伺服位置信号的模数转换的结果。 磁盘设备的磁头的位置信号在R / W通道中被数字化。 仅在仅在位置信号的峰值附近定义的窗口中执行用于数字转换的采样。 通过采样获得的峰值由平均电路进行平均。 这使得可以消除在窗外发生的噪声的影响。 虽然窗口中的噪声被采样，但其不利影响被平均处理抑制。

公开(公告)号：US20060285238A1

公开(公告)日：2006-12-21

申请号：US11507436

申请日：2006-08-22

申请人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Yukie Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

发明人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Yukie Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

IPC分类号： G11B5/09 ,  G11B5/596

CPC分类号： G11B20/1217 ,  G11B5/59605 ,  G11B20/24 ,  G11B21/106 ,  G11B2020/1287 ,  G11B2020/1298

摘要： A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting data bus to notify a disk control device 2 of a conversion result via an NRZ data bus. The disk control device 2 includes means for storing the result of the analog-to-digital conversion of said servo positional signal. The positional signal of a head of the disk device is digitalized in an R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.

公开(公告)号：US06172828B2

公开(公告)日：2001-01-09

申请号：US08857171

申请日：1997-05-15

申请人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

发明人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

IPC分类号： G11B509

CPC分类号： G11B20/1217 ,  G11B5/59605 ,  G11B20/24 ,  G11B21/106 ,  G11B2020/1287 ,  G11B2020/1298

摘要： A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitalizes in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.

摘要翻译： 具有模数转换突发信号的特征的信号处理装置具有通过NRZ数据总线选择数据总线以向盘控制装置通知转换结果的特征。 磁盘控制装置存储伺服位置信号的模数转换的结果。 磁盘设备的磁头的位置信号在R / W通道中数字化。 仅在仅在位置信号的峰值附近定义的窗口中执行用于数字转换的采样。 通过采样获得的峰值由平均电路进行平均。 这使得可以消除在窗外发生的噪声的影响。 虽然窗口中的噪声被采样，但其不利影响被平均处理抑制。

公开(公告)号：US06563656B2

公开(公告)日：2003-05-13

申请号：US10200509

申请日：2002-07-23

申请人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

发明人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

IPC分类号： G11B509

CPC分类号： G11B20/1217 ,  G11B5/59605 ,  G11B20/24 ,  G11B21/106 ,  G11B2020/1287 ,  G11B2020/1298

摘要： A signal processing device for analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitized in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.

摘要翻译： 用于模数转换突发信号的信号处理装置具有通过NRZ数据总线选择数据总线以向盘控制装置通知转换结果的特征。 磁盘控制装置存储伺服位置信号的模数转换的结果。 磁盘设备的磁头的位置信号在R / W通道中被数字化。 仅在仅在位置信号的峰值附近定义的窗口中执行用于数字转换的采样。 通过采样获得的峰值由平均电路进行平均。 这使得可以消除在窗外发生的噪声的影响。 虽然窗口中的噪声被采样，但其不利影响被平均处理抑制。

公开(公告)号：US06326838B1

公开(公告)日：2001-12-04

申请号：US09389582

申请日：1999-09-03

申请人： Hiroshi Kimura ,  Takushi Nishiya ,  Takatoshi Kato ,  Takashi Nara ,  Seiichi Mita

发明人： Hiroshi Kimura ,  Takushi Nishiya ,  Takatoshi Kato ,  Takashi Nara ,  Seiichi Mita

IPC分类号： H03B100

CPC分类号： H03H11/0422

摘要： A transconductance control circuit is composed of a replica transconductance amplifier and resistance, a reference voltage source, first selectors, a differential amplifier, a voltage-current translate circuit with characteristics equal to the transconductance amplifier which constitutes analog filters. A first switch of the first selectors is connectable for the reference voltage source, and every constant period is made to connect it using clocks at the reference voltage source. A second switch of second selectors is connectable for plural capacitors, and every constant period is made to connect it using clocks at the capacitors.

摘要翻译： 跨导控制电路由复制跨导放大器和电阻，参考电压源，第一选择器，差分放大器，具有等于构成模拟滤波器的跨导放大器的特性的电压 - 电流平移电路组成。 第一选择器的第一开关可连接到参考电压源，并且每个恒定周期都使用参考电压源的时钟进行连接。 第二选择器的第二开关可连接多个电容器，并且每个恒定周期都使用电容器上的时钟来连接。

公开(公告)号：US08639131B2

公开(公告)日：2014-01-28

申请号：US12957711

申请日：2010-12-01

申请人： Youbao Peng ,  Satoshi Ogata ,  Takashi Nara ,  Tadashi Matsudaira ,  Akihiro Hayashi ,  Eiji Nishikawa

发明人： Youbao Peng ,  Satoshi Ogata ,  Takashi Nara ,  Tadashi Matsudaira ,  Akihiro Hayashi ,  Eiji Nishikawa

IPC分类号： G03G15/20 ,  B65G43/00 ,  F16H7/22

CPC分类号： G03G15/2032 ,  G03G2215/2009

摘要： A belt drive apparatus, including, an endless belt to be laid across in a tensioned condition between supporting rollers and to travel being in pressure contact with or being separated from a body to receive the pressure contact, a pressure contact/separating state detection section to detect whether the endless belt is in the pressure contact with the body or separated therefrom, a belt position detection section to detect a position of the endless belt in a width direction thereof, a belt abnormality judging section to judge whether the endless belt is in an abnormal position based on a detection result obtained by the belt position detection section and one of judgment values which are set correspondingly to the pressure contact/separating state of the endless belt, and a belt drive control section to control a drive of the endless belt.

摘要翻译： 一种皮带驱动装置，包括：在支撑辊之间的张紧状态下横穿的环形带，并与身体压力接触或与主体分离以接收压力接触;压力接触/分离状态检测部分， 检测环形带是否与本体压接或分离，带位置检测部分，用于检测环形带在其宽度方向上的位置;带异常判断部，用于判断环形带是否在 基于由带位置检测部获得的检测结果的异常位置和对应于环形带的压力接触/分离状态设定的判定值中的一个以及用于控制环形带的驱动的带驱动控制部。