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    Method of fabricating capacitor in semiconductor device
    2.
    发明授权
    Method of fabricating capacitor in semiconductor device 失效
    在半导体器件中制造电容器的方法

    公开(公告)号：US08035193B2

    公开(公告)日：2011-10-11

    申请号：US12343379

    申请日：2008-12-23

    申请人： Kwan-Woo Do ,  Kee-Jeung Lee ,  Deok-Sin Kil ,  Young-Dae Kim ,  Jin-Hyock Kim ,  Kyung-Woong Park ,  Jeong-Yeop Lee

    发明人： Kwan-Woo Do ,  Kee-Jeung Lee ,  Deok-Sin Kil ,  Young-Dae Kim ,  Jin-Hyock Kim ,  Kyung-Woong Park ,  Jeong-Yeop Lee

    IPC分类号： H01L27/00

    CPC分类号： H01L28/65

    摘要： A capacitor includes a bottom electrode, a dielectric layer and a top electrode over a substrate. A RuXTiYOZ film is included in at least one of the bottom and top electrodes, where x, y and z are positive real numbers. A method of fabricating the capacitor through a sequential formation of a bottom electrode, a dielectric layer and a top electrode over a substrate includes forming a RuXTiYOZ film during a formation of at least one of the bottom electrode and top electrode, where x, y and z are positive real numbers.

    摘要翻译： 电容器包括底部电极，电介质层和衬底上的顶部电极。 至少一个底部电极和顶部电极中包含RuXTiYOZ膜，其中x，y和z为正实数。 通过顺序形成底部电极，电介质层和衬底上的顶部电极来制造电容器的方法包括在形成底部电极和顶部电极中的至少一个时形成RuXTiYOZ膜，其中x，y和 z是正实数。

    Semiconductor device and method of fabricating the same
    5.
    发明授权
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08134195B2

    公开(公告)日：2012-03-13

    申请号：US12346522

    申请日：2008-12-30

    申请人： Kee-Jeung Lee ,  Jae-Sung Roh ,  Deok-Sin Kil ,  Young-Dae Kim ,  Jin-Hyock Kim ,  Kwan-Woo Do ,  Kyung-Woong Park ,  Jeong-Yeop Lee

    发明人： Kee-Jeung Lee ,  Jae-Sung Roh ,  Deok-Sin Kil ,  Young-Dae Kim ,  Jin-Hyock Kim ,  Kwan-Woo Do ,  Kyung-Woong Park ,  Jeong-Yeop Lee

    IPC分类号： H01L27/108

    CPC分类号： H01L21/31111 ,  H01L21/3146 ,  H01L21/3185 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/91

    摘要： A semiconductor device, and a method of fabricating the semiconductor device, which is able to prevent a leaning phenomenon from occurring between the adjacent storage nodes. The method includes forming a plurality of multi-layered pillar type storage nodes each of which is buried in a plurality of mold layers, wherein the uppermost layers of the multi-layered pillar type storage nodes are fixed by a support layer, etching a portion of the support layer to form an opening, and supplying an etch solution through the opening to remove the multiple mold layers. A process of depositing and etching the mold layer by performing the process 2 or more times to form the multi-layered pillar type storage node. Thus, the desired capacitance is sufficiently secured and the leaning phenomenon is avoided between adjacent storage nodes.

    摘要翻译： 半导体器件以及制造该半导体器件的方法，其能够防止在相邻存储节点之间发生倾斜现象。 该方法包括：形成多个多层支柱型存储节点，每个堆叠在多个模具层中，其中多层支柱型存储节点的最上层由支撑层固定，蚀刻一部分 所述支撑层形成开口，并且通过所述开口提供蚀刻溶液以移除所述多个模具层。 通过进行2次以上的处理来沉积和蚀刻成形层的工序，形成多层支柱型存储节点。 因此，充分确保期望的电容，并且避免相邻存储节点之间的倾斜现象。