摘要:
Embodiments of an apparatus and methods of forming interconnect between a workpiece and substrate and its application to packaging of microelectronic devices are described herein. Other embodiments may be described and claimed.
摘要:
Embodiments of an apparatus and methods of forming interconnect between a workpiece and substrate and its application to packaging of microelectronic devices are described herein. Other embodiments may be described and claimed.
摘要:
Embodiments of an apparatus and methods of forming interconnect between a workpiece and substrate and its application to packaging of microelectronic devices are described herein. Other embodiments may be described and claimed.
摘要:
Embodiments of an apparatus and methods of forming interconnect between a workpiece and substrate and its application to packaging of microelectronic devices are described herein. Other embodiments may be described and claimed.
摘要:
A composition, a method, and a system for a solder flux are disclosed herein. In various embodiments, a solder flux composition may comprise a surfactant and less than about 20% of a carboxylic acid. In some of these embodiments, the solder flux composition may be used in lead-free soldering processes.
摘要:
A chip package includes a thermal interface material disposed between a die backside and a heat sink. The thermal interface material includes a first metal particle that is covered by a dielectric film. The dielectric film is selected from an inorganic compound of the first metal or an inorganic compound coating of a second metal. The dielectric film diminishes overall heat transfer from the first metal particle in the thermal interface material by a small fraction of total possible heat transfer without the dielectric film. A method of operating the chip includes biasing the chip with the dielectric film in place.
摘要:
An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.
摘要:
Methods of forming microelectronic packaging structures and associated structures formed thereby are described. Those methods and structures may include forming a wafer level underfill (WLUF) material comprising a resin material, and adding at least one of a UV absorber, a sterically hindered amine light stabilizer (HALS), an organic surface protectant (OSP), and a fluxing agent to form the WLUF material. The WLUF is then applied to a top surface of a wafer comprising a plurality of die.
摘要:
A solder flux composition is formulated to lower contact wetting angles on bond pads, and to remain stable until the reflow temperature of the solder. A process includes contacting a bond pad with the solder flux composition and reflowing the solder bump that is in contact with the bond pad and the solder flux composition.
摘要:
A chip package includes a thermal interface material disposed between a die backside and a heat sink. The thermal interface material includes a first metal particle that is covered by a dielectric film. The dielectric film is selected from an inorganic compound of the first metal or an inorganic compound coating of a second metal. The dielectric film diminishes overall heat transfer from the first metal particle in the thermal interface material by a small fraction of total possible heat transfer without the dielectric film. A method of operating the chip includes biasing the chip with the dielectric film in place.