利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

6 条记录 (耗时 0.026 秒)

    Method for fabricating printed-wiring substrate
    2.
    发明授权
    Method for fabricating printed-wiring substrate 有权
    印刷布线基板的制造方法

    公开(公告)号：US06887512B2

    公开(公告)日：2005-05-03

    申请号：US10214727

    申请日：2002-08-09

    申请人： Hisashi Wakako ,  Masahiro Iba ,  Kazuhisa Sato ,  Kazuo Kimura

    发明人： Hisashi Wakako ,  Masahiro Iba ,  Kazuhisa Sato ,  Kazuo Kimura

    IPC分类号： H05K3/34 ,  H01L23/12 ,  H01L23/498 ,  H05K3/24 ,  B05D5/12

    CPC分类号： H05K3/244 ,  H01L23/49811 ,  H01L2924/0002 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49156 ,  H01L2924/00

    摘要： A method for fabricating a component board which includes forming a first main-face-side Au plating layer on surfaces of main-face-side connection terminals and a first back-face-side Au plating layer on surfaces of back-face-side connection terminals of the component board; covering the first main-face-side Au plating layer with a protection layer; forming a second back-face-side Au plating layer on the first back-face-side Au plating layer; and removing the protection layer after completing the second Au plating step. Alternatively, the first back-face-side Au plating layer may be removed after completing the masking step. Displacement Au plating is used as the first and second Au plating.

    摘要翻译： 一种部件板的制造方法，其包括在背面侧连接面的主面侧连接端子和第一背面侧Au镀层的表面上形成第一主面侧Au镀层 组件板端子; 用保护层覆盖第一主面Au镀层; 在所述第一背面侧Au镀层上形成第二背面侧Au镀层; 以及在完成第二Au镀层步骤之后去除保护层。 或者，可以在完成掩模步骤之后去除第一背面侧Au镀层。 使用位移Au电镀作为第一和第二Au镀层。

    Printed-wiring substrate and method for fabricating the printed-wiring substrate
    4.
    发明授权
    Printed-wiring substrate and method for fabricating the printed-wiring substrate 有权
    印刷布线基板和印刷布线基板的制造方法

    公开(公告)号：US06472609B2

    公开(公告)日：2002-10-29

    申请号：US09866999

    申请日：2001-05-25

    申请人： Hisashi Wakako ,  Masahiro Iba ,  Kazuhisa Sato ,  Kazuo Kimura

    发明人： Hisashi Wakako ,  Masahiro Iba ,  Kazuhisa Sato ,  Kazuo Kimura

    IPC分类号： H05K103

    CPC分类号： H05K3/244 ,  H01L23/49811 ,  H01L2924/0002 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49156 ,  H01L2924/00

    摘要： A printed-wiring substrate 1 has main-face-side connection terminals 33 for solder-bonding to connection terminals 83 of an IC chip 81 on a main face 1A thereof and back-face-side connection terminals 41 for connecting, through mechanical contact, to connection terminals 93 of a motherboard 91 on a back face 1B thereof. The surface of each of the main-face-side connection terminals 33 is covered with a main-face-side displacement Au plating layer 45 having a thickness of 0.03 to 0.12 &mgr;m, and the surface of each of the back-face-side connection terminals 41 is covered with a back-face-side displacement Au plating layer 55, which is thicker than the main-face-side displacement Au plating layer 45 and has a thickness of 0.2 &mgr;m or greater.

    摘要翻译： 印刷布线基板1具有用于焊接到其主面1A上的IC芯片81的连接端子83的主面侧连接端子33和用于通过机械接触连接的背面侧连接端子41， 连接到母板91的背面1B上的连接端子93。 每个主面侧连接端子33的表面被厚度为0.03至0.12μm的主面侧位移Au镀层45覆盖，并且每个背面侧连接 端子41覆盖有比主面侧位移Au镀层45厚的厚度为0.2μm以上的背面侧位移Au镀层55。

    Wiring board with semiconductor component
    5.
    发明授权
    Wiring board with semiconductor component 有权
    带半导体元件的接线板

    公开(公告)号：US07488896B2

    公开(公告)日：2009-02-10

    申请号：US11265952

    申请日：2005-11-03

    申请人： Hajime Saiki ,  Masahiro Iba

    发明人： Hajime Saiki ,  Masahiro Iba

    IPC分类号： H05K1/16

    CPC分类号： H05K3/3436 ,  H01L23/49816 ,  H01L2224/81191 ,  H01L2924/01322 ,  H05K3/3452 ,  H05K3/3463 ,  H05K2201/09427 ,  H05K2201/099 ,  H05K2201/10992 ,  H05K2203/0465 ,  H05K2203/0594 ,  Y02P70/613 ,  H01L2924/00

    摘要： An electronic device comprised of a wiring board with a semiconductor component. The device is unlikely to have any defects, such as cracks to a solder joint portion during a reflow process of a flip-chip connection. The semiconductor component is flip-chip bonded at a pad array at a component side thereof to a pad array at a board side by way of an individual solder joint portion. In a solder resist layer at a semiconductor component side and a solder resist layer at a board side, D/D0 is prepared to be in a range of 0.70 to 0.99, where D is a bottom inner diameter of an opening at the board side and D0 is a bottom inner diameter of an opening at the component side.

    摘要翻译： 一种由具有半导体部件的布线板构成的电子装置。 在倒装芯片连接的回流工艺期间，器件不太可能具有任何缺陷，例如焊接部分的裂纹。 半导体部件在其一侧的焊盘阵列处通过单独的焊接部分在基板侧被倒装成焊盘阵列。 在半导体部件侧的阻焊层和基板侧的阻焊层中，D / D0为0.70〜0.99的范围，D为板侧的开口的底部内径， D0是部件侧的开口的底部内径。

    Wiring board and method of producing the same
    6.
    发明授权
    Wiring board and method of producing the same 失效
    接线板及其制造方法

    公开(公告)号：US06998336B1

    公开(公告)日：2006-02-14

    申请号：US11070200

    申请日：2005-03-03

    申请人： Masahiro Iba ,  Hajime Sakai ,  Takahiro Hayashi

    发明人： Masahiro Iba ,  Hajime Sakai ,  Takahiro Hayashi

    IPC分类号： H01L21/44

    CPC分类号： H05K3/3484 ,  H05K3/244 ,  H05K3/3463 ,  H05K3/3473 ,  H05K2203/043

    摘要： A method of producing a wiring board includes a preliminary plating step of forming a solder resist layer such that the main layer of each metal pad of the board is exposed in each corresponding opening and covering the surface of the exposed main layer with a preliminary Sn plated layer. A solder paste application step involves applying a solder paste, containing solder powder comprised of the high temperature Sn solder and thicker than the preliminary Sn plated layer, on the preliminary Sn plated layer. A subsequent solder melting step involves forming the Sn solder covering layer by melting the solder paste layer together with the preliminary Sn plated layer by heating the solder paste layer to a temperature higher than the liquid phase line temperature of the high temperature Sn solder. This wettingly extends the melted layers over the surface of the main layer.

    摘要翻译： 一种布线基板的制造方法，其特征在于，具有：形成阻焊层的预镀工序，使得板的每个金属焊盘的主层在相应的开口中露出，并且利用预镀Sn镀层覆盖暴露的主层的表面 层。 焊膏施加步骤包括在预镀Sn镀层上涂覆含有由高温Sn焊料构成的焊料粉末并且比预备Sn镀层厚的焊膏。 随后的焊料熔化步骤包括通过将焊膏层加热到高于高温Sn焊料的液相管线温度的温度，通过将焊膏层与预浸镀锡层一起熔化来形成Sn焊料覆盖层。 这使熔融层在主层的表面上湿润地延伸。