Printed-wiring substrate and method for fabricating the printed-wiring substrate
    1.
    发明授权
    Printed-wiring substrate and method for fabricating the printed-wiring substrate 有权
    印刷布线基板和印刷布线基板的制造方法

    公开(公告)号:US06472609B2

    公开(公告)日:2002-10-29

    申请号:US09866999

    申请日:2001-05-25

    IPC分类号: H05K103

    摘要: A printed-wiring substrate 1 has main-face-side connection terminals 33 for solder-bonding to connection terminals 83 of an IC chip 81 on a main face 1A thereof and back-face-side connection terminals 41 for connecting, through mechanical contact, to connection terminals 93 of a motherboard 91 on a back face 1B thereof. The surface of each of the main-face-side connection terminals 33 is covered with a main-face-side displacement Au plating layer 45 having a thickness of 0.03 to 0.12 &mgr;m, and the surface of each of the back-face-side connection terminals 41 is covered with a back-face-side displacement Au plating layer 55, which is thicker than the main-face-side displacement Au plating layer 45 and has a thickness of 0.2 &mgr;m or greater.

    摘要翻译: 印刷布线基板1具有用于焊接到其主面1A上的IC芯片81的连接端子83的主面侧连接端子33和用于通过机械接触连接的背面侧连接端子41, 连接到母板91的背面1B上的连接端子93。 每个主面侧连接端子33的表面被厚度为0.03至0.12μm的主面侧位移Au镀层45覆盖,并且每个背面侧连接 端子41覆盖有比主面侧位移Au镀层45厚的厚度为0.2μm以上的背面侧位移Au镀层55。

    Method for fabricating printed-wiring substrate
    2.
    发明授权
    Method for fabricating printed-wiring substrate 有权
    印刷布线基板的制造方法

    公开(公告)号:US06887512B2

    公开(公告)日:2005-05-03

    申请号:US10214727

    申请日:2002-08-09

    摘要: A method for fabricating a component board which includes forming a first main-face-side Au plating layer on surfaces of main-face-side connection terminals and a first back-face-side Au plating layer on surfaces of back-face-side connection terminals of the component board; covering the first main-face-side Au plating layer with a protection layer; forming a second back-face-side Au plating layer on the first back-face-side Au plating layer; and removing the protection layer after completing the second Au plating step. Alternatively, the first back-face-side Au plating layer may be removed after completing the masking step. Displacement Au plating is used as the first and second Au plating.

    摘要翻译: 一种部件板的制造方法,其包括在背面侧连接面的主面侧连接端子和第一背面侧Au镀层的表面上形成第一主面侧Au镀层 组件板端子; 用保护层覆盖第一主面Au镀层; 在所述第一背面侧Au镀层上形成第二背面侧Au镀层; 以及在完成第二Au镀层步骤之后去除保护层。 或者,可以在完成掩模步骤之后去除第一背面侧Au镀层。 使用位移Au电镀作为第一和第二Au镀层。

    Outer lead for a semiconductor IC package and a method of fabricating
the same
    6.
    发明授权
    Outer lead for a semiconductor IC package and a method of fabricating the same 失效
    用于半导体IC封装的外引线及其制造方法

    公开(公告)号:US5668060A

    公开(公告)日:1997-09-16

    申请号:US454726

    申请日:1995-05-31

    IPC分类号: H01H1/04 H01L23/495 H01L21/60

    摘要: An outer lead having a plurality of external leads 1 for electrically connecting the semiconductor IC of a semiconductor IC package to external devices comprises a base plate 11, a plated base structure formed over the surface of the base plate 11 and consisting of a plurality of plated base layers 12, 13 and 14 of Ni or a Ni alloy, and a surface layer 15 of Au or an Au alloy formed over the uppermost plated base layer 14 of the plated base structure. The number of the plated base layers is at least three. Each plated base layer 12, 13 and 14 of the plated base structure is subjected to crystal-growth annealing after being formed by plating to crystal-grow the grains thereof. A method of fabricating such an outer lead is provided.

    摘要翻译: 具有用于将半导体IC封装的半导体IC电连接到外部器件的多个外部引线1的外部引线包括基板11,形成在基板11的表面上的镀覆基体结构,由多个电镀 Ni或Ni合金的基底层12,13和14以及形成在镀覆基底结构的最上面镀覆的基底层14上的Au或Au合金的表面层15。 电镀基层的数量至少为3个。 电镀基体结构的每个镀覆基底层12,13和14在通过电镀形成晶体生长其晶粒之后进行结晶生长退火。 提供一种制造这种外引线的方法。

    Outer lead for a semiconductor IC package having individually annealed
plated layers
    7.
    发明授权
    Outer lead for a semiconductor IC package having individually annealed plated layers 失效
    具有单独退火镀层的半导体IC封装的外引线

    公开(公告)号:US5583379A

    公开(公告)日:1996-12-10

    申请号:US514838

    申请日:1995-08-14

    IPC分类号: H01H1/04 H01L23/495 H01L23/48

    摘要: An outer lead having a plurality of external leads 1 for electrically connecting the semiconductor IC of a semiconductor IC package to external devices comprises a base plate 11, a plated base structure formed over the surface of the base plate 11 and consisting of a plurality of plated base layers 12, 13 and 14 of Ni or a Ni alloy, and a surface layer 15 of Au or an Au alloy formed over the uppermost plated base layer 14 of the plated base structure. The number of the plated base layers is at least three. Each plated base layer 12, 13 and 14 of the plated base structure is subjected to crystal-growth annealing after being formed by plating to crystal-grow the grains thereof. A method of fabricating such an outer lead is provided.

    摘要翻译: 具有用于将半导体IC封装的半导体IC电连接到外部器件的多个外部引线1的外部引线包括基板11,形成在基板11的表面上的镀覆基体结构,由多个电镀 Ni或Ni合金的基底层12,13和14以及形成在镀覆基底结构的最上面镀覆的基底层14上的Au或Au合金的表面层15。 电镀基层的数量至少为3个。 电镀基体结构的每个镀覆基底层12,13和14在通过电镀形成晶体生长其晶粒之后进行结晶生长退火。 提供一种制造这种外引线的方法。

    Armature coil winder
    8.
    发明授权
    Armature coil winder 失效
    电枢绕线机

    公开(公告)号:US06502299B2

    公开(公告)日:2003-01-07

    申请号:US09423735

    申请日:1999-12-13

    IPC分类号: H02K1502

    摘要: In order to realize thinned armatures, a winder which winds coils at a high density while restricting coil ends within a restricted space is provided. An armature coil winder for winding coils in an armature core assembly having a plurality of slots in an outer circumference thereof comprising a winding former equipped with a fixed former which guides a coil into two slots and a movable former which restricts a position of a coil end between the slots by moving in the fixed former along both end surfaces of an armature core toward a center thereof, a former slider which shifts the movable former to a specified position, and coil shaping mechanism which is disposed at location other than that of the former slider and equipped with coil shaping blades functioning to shape the coil in the slots, thereby making it possible to wind coils at a high density by effectively utilizing winding spaces.

    摘要翻译: 为了实现减薄的电枢,提供了一种在限制空间内限制线圈端部的情况下以高密度缠绕的绕线器。 一种用于在电枢铁芯组件中缠绕线圈的电枢线圈绕线器,其具有在其外圆周上的多个槽,所述衔铁绕组装备有配备有将线圈引导到两个槽中的固定成形器的绕组架,以及限制线圈端 通过沿着电枢铁心的两个端面向着其中心在固定的成形器中移动的槽之间,将可移动成形器移动到特定位置的前滑块和设置在与前者不同的位置的线圈成形机构 滑块,并配备有线圈成型刀片,其用于使线圈在槽中成形,从而可以通过有效地利用缠绕空间来以高密度缠绕线圈。

    Olefinic thermoplastic elastomer composition
    9.
    发明授权
    Olefinic thermoplastic elastomer composition 失效
    烯烃热塑性弹性体组合物

    公开(公告)号:US06482892B1

    公开(公告)日:2002-11-19

    申请号:US09604099

    申请日:2000-06-27

    IPC分类号: C08L2302

    摘要: An olefinic thermoplastic elastomer composition which does not exhibit problems due to a softening agent such as an oil is superior in molding processability. The thermoplastic elastomer composition is produced by a heat crosslinking process of a resin-rubber composition that contains an olefinic and/or diene rubber, an olefinic resin, and a vinyl copolymer. The vinyl copolymer is obtained by copolymerizing 20 wt % or more of a vinyl monomer represented by CH2═CHOCOR1 or CH2═CHOR2 wherein R1 and R2 are alkyl groups having 1-6 carbon atoms. The thermoplastic elastomer composition can include a vinyl copolymer that has not undergone a heat crosslinking process.

    摘要翻译: 由于软化剂如油不会产生问题的烯烃类热塑性弹性体组合物,成型加工性优异。 热塑性弹性体组合物通过含有烯烃和/或二烯橡胶,烯烃树脂和乙烯基共聚物的树脂 - 橡胶组合物的热交联方法制备。 乙烯基共聚物通过共聚20重量%以上由CH2 = CHOCOR1或CH2 = CHOR2表示的乙烯基单体,其中R1和R2是具有1-6个碳原子的烷基。 热塑性弹性体组合物可以包括未经历热交联过程的乙烯基共聚物。

    Resinous circuit board with pins improved in joining strength
    10.
    发明授权
    Resinous circuit board with pins improved in joining strength 有权
    带引脚的树脂电路板提高了接合强度

    公开(公告)号:US06376782B1

    公开(公告)日:2002-04-23

    申请号:US09494174

    申请日:2000-01-31

    IPC分类号: H05K111

    摘要: In a resinous circuit board having a circuitized substrate having conductive layers therewithin, a plurality of pin pads formed on a rear surface of the substrate, and a plurality of pins, each pin having a tip end portion and a head portion and soldered to the pin pad in such a manner as to contact at the head portion to the pin pad. The head portion of the pin consists of a flange section which is larger in diameter than the tip end portion, and a part-spherical abutment section bulging from the flange section in the direction opposite to the tip end portion and brought into contact with the pin pad. The part-spherical abutment section is made of eutectic silver solder which is lower in melting point than solder such as Sn—Ag solder which is used for soldering the pin to the pin pad. Since the silver solder and soft solder are present between the flange section and the pin pad, they can release the stress applied to the pin, thus making it possible to increase the joining strength considerably. Further, the above structure can dispense with holes which are formed in the circuitized substrate and in which pins are press-fitted and fixed as in the prior art circuit board.

    摘要翻译: 在其中具有导电层的电路化基板的树脂电路板中,形成在基板的后表面上的多个引脚焊盘和多个引脚,每个引脚具有尖端部分和头部,并焊接到引脚 垫以这样的方式在头部与销垫接触。 销的头部由直径大于前端部的凸缘部和与前端部相反方向从凸缘部凸出的部分球形抵接部,与销的接触部 垫。 部分球形邻接部分由共熔银焊料制成,其熔点低于诸如Sn-Ag焊料的焊料,其用于将引脚焊接到引脚焊盘。 由于银焊料和软焊料存在于凸缘部分和销焊盘之间,它们可以释放施加到销的应力,从而可以显着提高接合强度。 此外,如现有技术的电路板那样,上述结构可以省略形成在电路化基板中的孔,并且其中的销被压入和固定。