公开(公告)号：US06680957B1

公开(公告)日：2004-01-20

申请号：US09515493

申请日：2000-02-29

申请人： Masayoshi Koike ,  Shiro Yamasaki ,  Yuta Tezen ,  Seiji Nagai ,  Akira Kojima ,  Toshio Hiramatsu

发明人： Masayoshi Koike ,  Shiro Yamasaki ,  Yuta Tezen ,  Seiji Nagai ,  Akira Kojima ,  Toshio Hiramatsu

IPC分类号： H01S500

CPC分类号： B82Y20/00 ,  H01S5/22 ,  H01S5/34333

摘要： A semiconductor laser 101 comprises a sapphire substrate 1, an AlN buffer layer 2, Si-doped GaN n-layer 3, Si-doped Al0.1Ga0.9N n-cladding layer 4, Si-doped GaN n-guide layer 5, an active layer 6 having multiple quantum well (MQW) structure in which about 35 Å in thickness of GaN barrier layer 62 and about 35 Å in thickness of Ga0.95In0.05N well layer 61 are laminated alternately, Mg-doped GaN p-guide layer 7, Mg-doped Al0.1Ga0.9N p-cladding layer 8, and Mg-doped GaN p-contact layer 9 are formed successively thereon. A ridged hole injection part B which contacts to a ridged resonator part A is formed to have the same width as the width w of an Ni electrode 10. Holes transmitted from the Ni electrode 10 are injected to the active layer 6 with high current density, and electric current threshold for laser oscillation can be decreased. Electric current threshold can be improved more effectively by forming also the p-guide layer 7 to have the same width as the width w of the Ni electrode 10.

摘要翻译： 半导体激光器101包括蓝宝石衬底1，AlN缓冲层2，掺杂Si的GaN n层3，掺杂Si的Al 0.1 Ga 0.9 N n包层4，掺杂Si的GaN n引导层5， 具有多个量子阱（MQW）结构的有源层6，其中厚度约为35的GaN阻挡层62和约35厚度的Ga0.95In0.05N阱层61交替层叠，掺杂Mg的GaN p引导层 如图7所示，依次形成Mg掺杂的Al 0.1 Ga 0.9 N p包覆层8和Mg掺杂的GaN p接触层9。 与脊状谐振器部件A接触的脊状空穴注入部分B形成为具有与Ni电极10的宽度w相同的宽度。从Ni电极10传输的孔以高电流密度注入到有源层6中， 可以降低激光振荡的电流阈值。 也可以通过将p导向层7形成为具有与Ni电极10的宽度w相同的宽度来更有效地提高电流阈值。

公开(公告)号：US06830948B2

公开(公告)日：2004-12-14

申请号：US10168629

申请日：2002-09-26

申请人： Masayoshi Koike ,  Akira Kojima ,  Toshio Hiramatsu ,  Yuta Tezen

发明人： Masayoshi Koike ,  Akira Kojima ,  Toshio Hiramatsu ,  Yuta Tezen

IPC分类号： H01L2106

CPC分类号： H01L33/0075 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02642 ,  H01L21/02647 ,  H01L33/007 ,  H01S5/32341 ,  H01S2304/12

摘要： By using a mask 4, a first Group III nitride compound semiconductor layer 31 is etched, to thereby form an island-like structure such as a dot-like, striped-shaped, or grid-like structure, so as to provide a trench/post. Thus, without removing the mask 4 formed on a top surface of the upper layer of the post, a second Group III nitride compound layer 32 can be epitaxially grown, vertically and laterally, with a sidewall/sidewalls of the trench serving as a nucleus, to thereby bury the trench and also grow the layer in the vertical direction. The second Group III nitride compound layer 32 does not grow epitaxially on the mask 4. In this case, propagation of threading dislocations contained in the first Group III nitride compound semiconductor layer 31 can be prevented in the upper portion of the second Group III nitride compound semiconductor 32 that is formed through lateral epitaxial growth and a region having less threading dislocations can be formed in the buried portion of the trench.

摘要翻译： 通过使用掩模4，蚀刻第一III族氮化物化合物半导体层31，从而形成诸如点状，条状或栅格状结构的岛状结构，从而提供沟槽/ 帖子 因此，在不去除形成在柱的上层的顶表面上的掩模4的情况下，第二III族氮化物化合物层32可以垂直和侧向地外延生长，其中沟槽的侧壁/侧壁用作核， 从而埋入沟槽并且还在垂直方向上生长该层。 第二III族氮化物化合物层32不会在掩模4上外延生长。在这种情况下，可以在第二III族氮化物化合物的上部防止包含在第一III族氮化物化合物半导体层31中的穿透位错的传播 通过横向外延生长形成的半导体32和具有较少穿透位错的区域可以形成在沟槽的掩埋部分中。

公开(公告)号：US07560725B2

公开(公告)日：2009-07-14

申请号：US11226433

申请日：2005-09-15

申请人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu

发明人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu

IPC分类号： H01L31/00

CPC分类号： H01L33/007 ,  B82Y20/00 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265 ,  H01L33/0075 ,  H01L33/025 ,  H01S5/34333

摘要： A first Group III nitride compound semiconductor layer 31 is etched, to thereby form an island-like structure such as a dot-like, stripe-shaped, or grid-like structure, so as to provide a trench/post. Thus, a second Group III nitride compound layer 32 can be epitaxially grown, vertically and laterally, from a top surface of the post and a sidewall/sidewalls of the trench serving as a nucleus for epitaxial growth, to thereby bury the trench and also grow the layer in the vertical direction. In this case, propagation of threading dislocations contained in the first Group III nitride compound semiconductor layer 31 can be prevented in the upper portion of the second Group III nitride compound semiconductor 32 that is formed through lateral epitaxial growth. As a result, a region having less threading dislocations is formed at the buried trench.

摘要翻译： 蚀刻第一III族氮化物化合物半导体层31，从而形成诸如点状，条状或栅格状结构的岛状结构，以提供沟槽/柱。 因此，可以从柱的顶表面和用作外延生长的核的沟槽的侧壁/侧壁外延生长第二III族氮化物化合物层32，从而埋入沟槽并且也生长 该层在垂直方向。 在这种情况下，可以通过横向外延生长形成的第二III族氮化物半导体32的上部阻止在第一III族氮化物化合物半导体层31中包含的穿透位错的传播。 结果，在埋入沟槽处形成具有较少穿透位错的区域。

公开(公告)号：US20050093099A1

公开(公告)日：2005-05-05

申请号：US10978438

申请日：2004-11-02

申请人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu ,  Seiji Nagai

发明人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu ,  Seiji Nagai

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L33/00 ,  H01L29/06 ,  C30B1/00 ,  H01L21/36 ,  H01L29/20 ,  H01L31/0304 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L33/007 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02647

摘要： The present invention provides a Group III nitride compound semiconductor with suppressed generation of threading dislocations. A GaN layer 31 is subjected to etching, so as to form an island-like structure having a shape of, for example, dot, stripe, or grid, thereby providing a trench/mesa structure, and a mask 4 is formed at the bottom of the trench such that the upper surface of the mask 4 is positioned below the top surface of the GaN layer 31. A GaN layer 32 is lateral-epitaxially grown with the top surface 31a of the mesa and sidewalls 31b of the trench serving as nuclei, to thereby bury the trench, and then epitaxial growth is effected in the vertical direction. In the upper region of the GaN layer 32 formed above the mask 4 through lateral epitaxial growth, propagation of threading dislocations contained in the GaN layer 31 can be prevented.

摘要翻译： 本发明提供了具有抑制的穿透位错产生的III族氮化物化合物半导体。 对GaN层31进行蚀刻，以形成具有例如点状，条状或格栅形状的岛状结构，由此提供沟槽/台面结构，并且在底部形成掩模4 使得掩模4的上表面位于GaN层31的顶表面下方。 GaN层32与作为核的沟槽的台面的顶面31a和侧壁31b进行横向外延生长，从而埋入沟槽，然后沿垂直方向进行外延生长。 在通过横向外延生长形成在掩模4上方的GaN层32的上部区域中，可以防止包含在GaN层31中的穿透位错的传播。

公开(公告)号：US07491984B2

公开(公告)日：2009-02-17

申请号：US10978438

申请日：2004-11-02

申请人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu ,  Seiji Nagai

发明人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu ,  Seiji Nagai

IPC分类号： H01L21/00

CPC分类号： H01L33/007 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02647

摘要： The present invention provides a Group III nitride compound semiconductor with suppressed generation of threading dislocations.A GaN layer 31 is subjected to etching, so as to form an island-like structure having a shape of, for example, dot, stripe, or grid, thereby providing a trench/mesa structure, and a mask 4 is formed at the bottom of the trench such that the upper surface of the mask 4 is positioned below the top surface of the GaN layer 31. A GaN layer 32 is lateral-epitaxially grown with the top surface 31a of the mesa and sidewalls 31b of the trench serving as nuclei, to thereby bury the trench, and then epitaxial growth is effected in the vertical direction. In the upper region of the GaN layer 32 formed above the mask 4 through lateral epitaxial growth, propagation of threading dislocations contained in the GaN layer 31 can be prevented.

摘要翻译： 本发明提供了具有抑制的穿透位错产生的III族氮化物化合物半导体。 对GaN层31进行蚀刻，以形成具有例如点状，条状或格栅形状的岛状结构，由此提供沟槽/台面结构，并且在底部形成掩模4 使得掩模4的上表面位于GaN层31的顶表面之下。GaN层32被侧壁外延生长，台面的顶表面31a和用作核的沟槽的侧壁31b ，从而埋入沟槽，然后在垂直方向进行外延生长。 在通过横向外延生长形成在掩模4上方的GaN层32的上部区域中，可以防止包含在GaN层31中的穿透位错的传播。

公开(公告)号：US06979584B2

公开(公告)日：2005-12-27

申请号：US10168617

申请日：2000-12-21

申请人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu

发明人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu

IPC分类号： C30B29/38 ,  H01L21/20 ,  H01L21/205 ,  H01L33/06 ,  H01L33/16 ,  H01L33/22 ,  H01L33/32 ,  H01S5/323 ,  H01S5/343

CPC分类号： H01L33/007 ,  B82Y20/00 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265 ,  H01L33/0075 ,  H01L33/025 ,  H01S5/34333

摘要： A first Group III nitride compound semiconductor layer 31 is etched, to thereby form an island-like structure such as a dot-like, stripe-shaped, or grid-like structure, so as to provide a trench/post. Thus, a second Group III nitride compound layer 32 can be epitaxially grown, vertically and laterally, from a top surface of the post and a sidewall/sidewalls of the trench serving as a nucleus for epitaxial growth, to thereby bury the trench and also grow the layer in the vertical direction. In this case, propagation of threading dislocations contained in the first Group III nitride compound semiconductor layer 31 can be prevented in the upper portion of the second Group III nitride compound semiconductor 32 that is formed through lateral epitaxial growth. As a result, a region having less threading dislocations is formed at the buried trench.

摘要翻译： 蚀刻第一III族氮化物化合物半导体层31，从而形成诸如点状，条状或栅格状结构的岛状结构，以提供沟槽/柱。 因此，可以从柱的顶表面和用作外延生长的核的沟槽的侧壁/侧壁外延生长第二III族氮化物化合物层32，从而埋入沟槽并且也生长 该层在垂直方向。 在这种情况下，可以通过横向外延生长形成的第二III族氮化物半导体32的上部阻止在第一III族氮化物化合物半导体层31中包含的穿透位错的传播。 结果，在埋入沟槽处形成具有较少穿透位错的区域。

公开(公告)号：US07141444B2

公开(公告)日：2006-11-28

申请号：US10221486

申请日：2001-03-12

申请人： Masayoshi Koike ,  Yuta Tezen ,  Hiroshi Yamashita ,  Seiji Nagai ,  Toshio Hiramatsu

发明人： Masayoshi Koike ,  Yuta Tezen ,  Hiroshi Yamashita ,  Seiji Nagai ,  Toshio Hiramatsu

IPC分类号： H01L21/00

CPC分类号： H01L21/0265 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02647

摘要： A first Group III nitride compound semiconductor layer 31 is etched, to thereby form an island-like structure such as a dot-like, stripe-shaped, or grid-like structure, so as to provide a trench/mesa such that layer different from the first Group III nitride compound semiconductor layer 31 is exposed at the bottom portion of the trench. Thus, a second Group III nitride compound layer 32 can be epitaxially grown, laterally, with a top surface of the mesa and a sidewall/sidewalls of the trench serving as a nucleus, to thereby bury the trench and also grow the layer in the vertical direction. In this case, propagation of threading dislocations contained in the first Group III nitride compound semiconductor layer 31 can be prevented in the upper portion of the second Group III nitride compound semiconductor 32 that is formed through lateral epitaxial growth. Etching may be performed until a cavity portion is provided in the substrate. The layer serving as a nucleus of ELO may be doped with indium (In) having an atomic radius greater than that of gallium (Ga) serving as a predominant element. The first semiconductor layer may be a multi-component layer containing a plurality of numbers of repetitions of a unit of a buffer layer and a single-crystal layer.

公开(公告)号：US06861305B2

公开(公告)日：2005-03-01

申请号：US10240249

申请日：2001-03-29

申请人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu ,  Seiji Nagai

发明人： Masayoshi Koike ,  Yuta Tezen ,  Toshio Hiramatsu ,  Seiji Nagai

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L33/00 ,  H01L21/8238

CPC分类号： H01L33/007 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02647

摘要： The present invention provides a Group III nitride compound semiconductor with suppressed generation of threading dislocations. A GaN layer 31 is subjected to etching, so as to form an island-like structure having a shape of, for example, dot, strip, or grid, thereby providing a trench/mesa structure, and a mask 4 is formed at the bottom of the trench such that the upper surface of the mask 4 is positioned below the top surface of the GaN layer 31. A GaN layer 32 is lateral-epitaxially grown with the top surface 31a of the mesa and sidewalls 31b of the trench serving as nuclei, to thereby bury the trench, and then epitaxial growth is effected in the vertical direction. In the upper region of the GaN layer 32 formed above the mask 4 through lateral epitaxial growth, propagation of threading dislocations contained in the GaN layer is 31 can be prevented.

摘要翻译： 本发明提供了具有抑制的穿透位错产生的III族氮化物化合物半导体。 对GaN层31进行蚀刻，以形成例如点状，带状或栅格的形状的岛状结构，从而提供沟槽/台面结构，并且在底部形成掩模4 使得掩模4的上表面位于GaN层31的顶表面之下。GaN层32被侧壁外延生长，台面的顶表面31a和用作核的沟槽的侧壁31b ，从而埋入沟槽，然后在垂直方向进行外延生长。 在通过横向外延生长在掩模4上方形成的GaN层32的上部区域中，可以防止包含在GaN层中的穿透位错的传播为31。

公开(公告)号：US06518599B2

公开(公告)日：2003-02-11

申请号：US09725495

申请日：2000-11-30

申请人： Tamiyo Umezaki ,  Yuta Tezen ,  Toshio Hiramatsu ,  Masayoshi Koike

发明人： Tamiyo Umezaki ,  Yuta Tezen ,  Toshio Hiramatsu ,  Masayoshi Koike

IPC分类号： H01L3300

CPC分类号： H01L33/20 ,  H01L33/32

摘要： A light emitting device using a group III nitride group compound semiconductor is disclosed. The device includes a substrate, a group III nitride group compound semiconductor layer, and a rectangular parallelepiped stack Rd which is formed by etching multiple group III nitride group compound semiconductor layers laminated on the group III nitride group compound semiconductor layer. The group III nitride group compound semiconductor layer comprises regions, which have many defects and less defects, respectively, and are formed in a striped pattern. Each of the boundaries between the regions with less defects and more defects or a plane which includes a longitudinal edge of the buffer layer is vertical to the substrate and parallel to a longitudinal plane of the rectangular parallelepiped stack Rd. The boundaries and two stack facets Mrr of the rectangular parallelepiped stack Rd are parallel to each other.

摘要翻译： 公开了使用III族氮化物族化合物半导体的发光器件。 该装置包括通过蚀刻层叠在III族氮化物系化合物半导体层上的多个III族氮化物系化合物半导体层而形成的基板，III族氮化物系化合物半导体层和长方体叠层Rd。 III族氮化物类化合物半导体层分别包含具有许多缺陷和较少缺陷的区域，并且形成为条纹图案。 具有较少缺陷和更多缺陷的区域之间的边界中的每个边界或包括缓冲层的纵向边缘的平面垂直于基板并平行于长方体堆叠Rd的纵向平面。 矩形平行六面体堆叠Rd的边界和两个堆叠面Mrr彼此平行。

公开(公告)号：US07052979B2

公开(公告)日：2006-05-30

申请号：US10467566

申请日：2002-02-12

申请人： Seiji Nagai ,  Kazuyoshi Tomita ,  Shiro Yamazaki ,  Yuta Tezen ,  Toshio Hiramatsu

发明人： Seiji Nagai ,  Kazuyoshi Tomita ,  Shiro Yamazaki ,  Yuta Tezen ,  Toshio Hiramatsu

IPC分类号： H01L21/20

CPC分类号： C30B25/02 ,  C30B25/18 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265 ,  H01L33/0066 ,  H01L33/007

摘要： When a substrate layer (desired semiconductor crystal) made of a group III nitride compound is grown on a base substrate comprising a lot of projection parts, a cavity in which a semiconductor crystal is not deposited may be formed between each projection part although it depends on conditions such as the size of each projection part, arranging interval between each projection part and crystal growth. So when the thickness of the substrate layer is sufficiently larger compared with the height of the projection part, inner stress or outer stress become easier to act intensively to the projection part. As a result, such stress especially functions as shearing stress toward the projection part. When the shearing stress becomes larger, the projection part is ruptured. So utilizing the shearing stress enables to separate the base substrate and the substrate layer easily. The larger the cavities are formed, the more stress tends to concentrate to the projection parts, to thereby enable to separate the base substrate and the substrate layer more securely.

摘要翻译： 当在包括大量投影部分的基底基板上生长由III族氮化物化合物制成的衬底层（期望的半导体晶体）时，可以在每个突出部分之间形成其中不沉积半导体晶体的空腔，尽管它取决于 条件如每个投影部分的尺寸，每个投影部分之间的间隔和晶体生长。 因此，当基板层的厚度与突出部分的高度相比足够大时，内应力或外应力变得更容易集中于投影部分。 结果，这种应力特别地作用于朝向投影部分的剪切应力。 当剪切应力变大时，突出部分破裂。 因此，利用剪切应力使得能够容易地分离基底和基底层。 形成空穴越大，应力越倾向于集中到突出部分，从而能够更牢固地分离基底基底和基底层。