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公开(公告)号：US20080174397A1
公开(公告)日：2008-07-24
申请号：US11655412
申请日：2007-01-19
CPC分类号： H01F27/2847 , G01R33/34 , G01R33/3621 , G01R33/422 , H01F5/00 , H01F7/20 , H01F17/02 , H01F27/2871 , H01F27/34 , H05B2214/04 , Y10T29/4902
摘要： A spirally-wound inductor having a tapered conductor. The height of the conductor increases from a smaller height near the center of the inductor to a greater height at the outer edge of the inductor. A spherically-shaped inductor and methods for manufacturing the spherically-shaped inductor. The spherically-shaped inductor has a series of coils that increase in diameter from each end toward the middle.
摘要翻译： 具有锥形导体的螺旋卷绕电感器。 导体的高度从电感器中心附近较小的高度增加到电感器外缘的较大高度。 球形电感器和制造球形电感器的方法。 球形电感器具有一系列从每端向中间直径增加的线圈。
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公开(公告)号：US07867824B2
公开(公告)日：2011-01-11
申请号：US12117608
申请日：2008-05-08
IPC分类号： H01L21/00
CPC分类号： H01L27/14601
摘要： Methods of fabricating a tiled transducer array are disclosed. Embodiments of the methods include fabricating a wafer comprising a plurality of transducers, dicing the wafer to form individual transducers, testing the individual transducers to identify a plurality of known good transducers, preparing a substrate having a front side and a backside wherein the backside of the substrate comprises a plurality of connectors, positioning the plurality of known good transducers on the front side of the substrate and aligning the plurality of transducers in a horizontal direction and a vertical direction to form a transducer array, and electrically coupling the connectors on the substrate to the plurality of known good transducers, wherein the connectors are arranged such that each of the plurality of known good transducers may be electrically coupled to an electronic device disposed on the backside of the substrate, through a respective one or more of the plurality of connectors.
摘要翻译： 公开了制作平铺式换能器阵列的方法。 所述方法的实施例包括制造包括多个换能器的晶片，切割晶片以形成单独的换能器，测试各个换能器以识别多个已知的良好换能器，制备具有正面和背面的基底，其中背面 衬底包括多个连接器，将多个已知的良好换能器定位在衬底的前侧上并且在水平方向和垂直方向上对准多个换能器以形成换能器阵列，并将衬底上的连接器电耦合到 所述多个已知的良好换能器，其中所述连接器被布置成使得所述多个已知的良好换能器中的每一个可以通过所述多个连接器中的相应一个或多个电耦合到设置在所述基板的背面上的电子装置。
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公开(公告)号：US07289336B2
公开(公告)日：2007-10-30
申请号：US10975952
申请日：2004-10-28
申请人： William Edward Burdick, Jr. , James Wilson Rose , John Eric Tkaczyk , Oded Meirav , Jerome Stephen Arenson , David Michael Hoffman
发明人： William Edward Burdick, Jr. , James Wilson Rose , John Eric Tkaczyk , Oded Meirav , Jerome Stephen Arenson , David Michael Hoffman
IPC分类号： H05K1/11
CPC分类号： H05K1/147 , H05K2201/10151
摘要： An interconnect structure for use in an electronic device, wherein the interconnect structure comprises a first substrate comprising a flexible material, wherein the first substrate comprises a front side and a back side, and wherein the first substrate is configured to receive a sensor on the front side; and a second substrate coupled to the back side of the first substrate and comprising a rigid material. A detector module for use in an imaging system comprises the aforementioned interconnect structure.
摘要翻译： 一种用于电子设备的互连结构，其中所述互连结构包括包括柔性材料的第一基底，其中所述第一基底包括前侧和后侧，并且其中所述第一基底构造成在前面接收传感器 侧; 以及耦合到所述第一基板的背面并且包括刚性材料的第二基板。 用于成像系统的检测器模块包括上述互连结构。
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公开(公告)号：US06239482B1
公开(公告)日：2001-05-29
申请号：US09334572
申请日：1999-06-21
申请人： Raymond Albert Fillion , William Edward Burdick, Jr. , Ronald Frank Kolc , James Wilson Rose , Glenn Scott Claydon
发明人： Raymond Albert Fillion , William Edward Burdick, Jr. , Ronald Frank Kolc , James Wilson Rose , Glenn Scott Claydon
IPC分类号： H01L2302
CPC分类号： H01L24/25 , H01L23/13 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2224/24195 , H01L2224/24225 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/14 , H01L2924/15151 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043
摘要： An integrated circuit package includes at least one integrated circuit element coupled to a polymer film; a window frame coupled to the polymer film and surrounding the at least one integrated circuit element; and encapsulant material positioned between the at least one integrated circuit element and the window frame.
摘要翻译： 集成电路封装包括耦合到聚合物膜的至少一个集成电路元件; 耦合到所述聚合物膜并围绕所述至少一个集成电路元件的窗框; 以及位于所述至少一个集成电路元件和所述窗框之间的密封材料。
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公开(公告)号：US20080213933A1
公开(公告)日：2008-09-04
申请号：US12117608
申请日：2008-05-08
IPC分类号： H01L21/50
CPC分类号： H01L27/14601
摘要： Methods of fabricating a tiled transducer array are disclosed. Embodiments of the methods include fabricating a wafer comprising a plurality of transducers, dicing the wafer to form individual transducers, testing the individual transducers to identify a plurality of known good transducers, preparing a substrate having a front side and a backside wherein the backside of the substrate comprises a plurality of connectors, positioning the plurality of known good transducers on the front side of the substrate and aligning the plurality of transducers in a horizontal direction and a vertical direction to form a transducer array, and electrically coupling the connectors on the substrate to the plurality of known good transducers, wherein the connectors are arranged such that each of the plurality of known good transducers may be electrically coupled to an electronic device disposed on the backside of the substrate, through a respective one or more of the plurality of connectors.
摘要翻译： 公开了制作平铺式换能器阵列的方法。 所述方法的实施例包括制造包括多个换能器的晶片，切割晶片以形成单独的换能器，测试各个换能器以识别多个已知的良好换能器，制备具有正面和背面的基底，其中背面 衬底包括多个连接器，将多个已知的良好换能器定位在衬底的前侧上并且在水平方向和垂直方向上对准多个换能器以形成换能器阵列，并将衬底上的连接器电耦合到 所述多个已知的良好换能器，其中所述连接器被布置成使得所述多个已知的良好换能器中的每一个可以通过所述多个连接器中的相应一个或多个电耦合到设置在所述基板的背面上的电子装置。
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公开(公告)号：US07112877B2
公开(公告)日：2006-09-26
申请号：US10877256
申请日：2004-06-28
IPC分类号： H01L23/48
CPC分类号： H01R12/62 , H01L23/4985 , H01L23/5387 , H01L2924/0002 , H01L2924/09701 , H01L2924/3011 , H05K1/118 , H05K1/189 , H05K2201/056 , H05K2201/10719 , H01L2924/00
摘要： A high density electrical interconnecting system of the present invention has at least one substrate piece and a flexible wrap-around interconnect assembly extending from a first surface of the substrate piece to a second surface of the substrate piece wherein the flexible wrap-around interconnect is disposed around an outer surface of the substrate piece.
摘要翻译： 本发明的高密度电互连系统具有至少一个基片和柔性环绕互连组件，该基片和柔性环绕互连组件从基片的第一表面延伸到基片的第二表面，其中布置柔性环绕互连 围绕基片的外表面。
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公开(公告)号：US07518251B2
公开(公告)日：2009-04-14
申请号：US11003602
申请日：2004-12-03
CPC分类号： H01L25/0657 , H01L23/481 , H01L2224/14 , H01L2224/16145 , H01L2224/81141 , H01L2224/81913 , H01L2225/06513 , H01L2225/06541 , H01L2225/06551 , H01L2225/06555 , H01L2225/06593 , H01L2924/00011 , H01L2924/00014 , H01L2224/0401
摘要： A stacked electronics module comprises a first layer including a first substrate having a front side and a backside, a first electrical interconnect layer disposed on the first substrate and a first electronic device disposed on the front side of the first substrate. In addition, the stacked electronics module comprises a second layer including a second substrate having a front side and a backside, a second electrical interconnect layer disposed on the second substrate and a second electronic device disposed on the front side of the second substrate.
摘要翻译： 堆叠的电子模块包括第一层，其包括具有前侧和后侧的第一衬底，设置在第一衬底上的第一电互连层和设置在第一衬底的前侧上的第一电子器件。 此外，堆叠的电子模块包括第二层，第二层包括具有正面和背面的第二衬底，设置在第二衬底上的第二电互连层和设置在第二衬底的前侧上的第二电子器件。
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公开(公告)号：US07375420B2
公开(公告)日：2008-05-20
申请号：US11003054
申请日：2004-12-03
IPC分类号： H01L23/02
CPC分类号： H01L27/14601
摘要： A large area transducer array comprising a substrate having a front side and a backside, a plurality of transducers disposed on the front side of the substrate and patterned in the form of a two-dimensional transducer array in the X-Y plane, a plurality of connectors disposed on the backside of the substrate where the connectors are electrically coupled to the transducer elements. Further, a stacked transducer array comprising an electronic device disposed in a first layer, a substrate including a front side and a backside, an electrical interconnect layer disposed on the substrate and a plurality of transducers disposed in a third layer where the transducers are electrically coupled to the electronic device disposed in the first layer.
摘要翻译： 一种大面积传感器阵列，包括具有正面和背面的基底，多个换能器，设置在基板的前侧，并以XY平面中的二维换能器阵列的形式图案化，多个连接器被设置 在衬底的背面，其中连接器电耦合到换能器元件。 此外，堆叠的换能器阵列包括设置在第一层中的电子器件，包括正面和背面的衬底，设置在衬底上的电互连层和设置在第三层中的多个换能器，其中换能器电耦合 到设置在第一层中的电子设备。
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公开(公告)号：US06933813B2
公开(公告)日：2005-08-23
申请号：US10714376
申请日：2003-11-12
申请人： William Edward Burdick, Jr. , James Wilson Rose , Kevin Matthew Durocher , Raymond Albert Fillion
发明人： William Edward Burdick, Jr. , James Wilson Rose , Kevin Matthew Durocher , Raymond Albert Fillion
IPC分类号： H01L23/52 , H01H20060101 , H01L21/3205 , H01L21/48 , H01L21/60 , H01L23/12 , H01L23/34 , H01L23/50 , H01L23/538 , H01P1/04 , H05K3/06 , H05K3/38
CPC分类号： H01L27/14636 , H01L24/19 , H01L24/82 , H01L27/14618 , H01L2224/04105 , H01L2224/18 , H01L2224/92144 , H01L2924/01004 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/12042 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： An interconnection structure includes: a dielectric layer; a first metallization pattern on the dielectric layer, the first metallization pattern including at least one etch stop having a perimeter defining at least one etch stop opening; a cured adhesive on a portion of the dielectric layer, the adhesive not present in an area aligned with the at least one etch stop; and at least one electrical device being attached to the dielectric layer by the adhesive such that an active area of the at least one electrical device is aligned with the etch stop perimeter. The active area of the at least one electrical device may further be aligned with at least one predetermined area defined by an optional additional portion of cured adhesive, the additional portion of the cured adhesive being adhesively attached to the dielectric layer and not adhesively attached to the at least one electrical device.
摘要翻译： 互连结构包括：介电层; 所述第一金属化图案包括至少一个具有限定至少一个蚀刻停止开口的周边的蚀刻停止件; 在所述电介质层的一部分上的固化的粘合剂，所述粘合剂不存在于与所述至少一个蚀刻停止件对准的区域中; 并且至少一个电气装置通过所述粘合剂附接到所述电介质层，使得所述至少一个电气装置的有效面积与所述蚀刻停止周界对准。 至少一个电气装置的活动区域还可以与由固化的粘合剂的任选的附加部分限定的至少一个预定区域对准，固化的粘合剂的附加部分粘合地附着到电介质层上，而不粘附到 至少一个电气设备。
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公开(公告)号：US06671948B2
公开(公告)日：2004-01-06
申请号：US09681066
申请日：2000-12-18
申请人： William Edward Burdick, Jr. , James Wilson Rose , Kevin Matthew Durocher , Raymond Albert Fillion
发明人： William Edward Burdick, Jr. , James Wilson Rose , Kevin Matthew Durocher , Raymond Albert Fillion
IPC分类号： H05K306
CPC分类号： H01L27/14636 , H01L24/19 , H01L24/82 , H01L27/14618 , H01L2224/04105 , H01L2224/18 , H01L2224/92144 , H01L2924/01004 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/12042 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： An interconnection structure includes: a dielectric layer; a first metallization pattern on the dielectric layer, the first metallization pattern including at least one etch stop having a perimeter defining at least one etch stop opening; a cured adhesive on a portion of the dielectric layer, the adhesive not present in an area aligned with the at least one etch stop; and at least one electrical device being attached to the dielectric layer by the adhesive such that an active area of the at least one electrical device is aligned with the etch stop perimeter. The active area of the at least one electrical device may further be aligned with at least one predetermined area defined by an optional additional portion of cured adhesive, the additional portion of the cured adhesive being adhesively attached to the dielectric layer and not adhesively attached to the at least one electrical device.
摘要翻译： 互连结构包括：介电层; 所述第一金属化图案包括至少一个具有限定至少一个蚀刻停止开口的周边的蚀刻停止件; 在所述电介质层的一部分上的固化的粘合剂，所述粘合剂不存在于与所述至少一个蚀刻停止件对准的区域中; 并且至少一个电气装置通过所述粘合剂附接到所述电介质层，使得所述至少一个电气装置的有效面积与所述蚀刻停止周界对准。 至少一个电气装置的活动区域还可以与由固化的粘合剂的任选的附加部分限定的至少一个预定区域对准，固化的粘合剂的附加部分粘合地附着到电介质层上，而不粘附到 至少一个电气设备。
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