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公开(公告)号:US20220335000A1
公开(公告)日:2022-10-20
申请号:US17850927
申请日:2022-06-27
Applicant: Micron Technology, Inc.
Inventor: Thomas H. Kinsley , George E. Pax , Timothy M. Hollis , Yogesh Sharma , Randon K. Richards , Chan H. Yoo , Gregory A. King , Eric J. Stave
Abstract: An apparatus is provided, comprising a plurality of memory devices and a buffering device that permits memory devices with a variety of physical dimensions and memory formats to be used in an industry-standard memory module format. The buffering device includes memory interface circuitry and at least one first-in first-out (FIFO) or multiplexer circuit. The apparatus further comprises a parallel bus connecting the buffering device to the plurality of memory devices. The parallel bus includes a plurality of independent control lines, each coupling the memory interface circuitry to a corresponding subset of a plurality of first subsets of the plurality of memory devices. The parallel bus further includes a plurality of independent data channels, each coupling the at least one FIFO circuit or multiplexer circuit to a corresponding subset of a plurality of second subsets of the plurality of memory devices.
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公开(公告)号:US10410950B1
公开(公告)日:2019-09-10
申请号:US15977760
申请日:2018-05-11
Applicant: Micron Technology, Inc.
Inventor: George E. Pax
IPC: H01L23/00 , H01L23/367 , H01L25/00 , H01L25/065 , H01L23/40
Abstract: Memory devices having heat spreaders are disclosed herein. In one embodiment, a memory device includes first memories coupled to a front side of a substrate, second memories coupled to a back side of the substrate, and a flexible heat spreader. The flexible heat spreader can include graphite and is coupled to back side surfaces of the first and second memories to dissipate heat generated by the first and second memories.
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公开(公告)号:US11855048B2
公开(公告)日:2023-12-26
申请号:US17978029
申请日:2022-10-31
Applicant: Micron Technology, Inc.
Inventor: Thomas H. Kinsley , George E. Pax
IPC: H01L25/065 , H01L23/48 , H01L23/00 , H01L23/498 , H01L23/538 , G11C5/04 , H05K1/02 , H05K1/18
CPC classification number: H01L25/0657 , G11C5/04 , H01L23/481 , H01L23/49838 , H01L23/5385 , H01L24/02 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/73 , H05K1/0243 , H01L23/49894 , H01L24/05 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/97 , H01L2224/023 , H01L2224/0237 , H01L2224/0401 , H01L2224/04042 , H01L2224/061 , H01L2224/08225 , H01L2224/131 , H01L2224/16145 , H01L2224/45099 , H01L2224/48227 , H01L2224/4912 , H01L2224/73207 , H01L2224/73251 , H01L2224/856 , H01L2224/8559 , H01L2224/85411 , H01L2224/85439 , H01L2224/85447 , H01L2224/85455 , H01L2224/97 , H01L2225/0651 , H01L2225/06527 , H01L2225/06565 , H01L2924/1436 , H01L2924/15183 , H01L2924/15311 , H05K1/181 , H05K2201/10159 , H05K2201/10522
Abstract: Semiconductor packages with pass-through clock traces and associated devices, systems, and methods are disclosed herein. In one embodiment, a semiconductor device includes a package substrate including a first surface having a plurality of substrate contacts, a first semiconductor die having a lower surface attached to the first surface of the package substrate, and a second semiconductor die stacked on top of the first semiconductor die. The first semiconductor die includes an upper surface including a first conductive contact, and the second semiconductor die includes a second conductive contact. A first electrical connector electrically couples a first one of the plurality of substrate contacts to the first and second conductive contacts, and a second electrical connector electrically couples a second one of the plurality of substrate contacts to the first and second conductive contacts.
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公开(公告)号:US11488938B2
公开(公告)日:2022-11-01
申请号:US17219821
申请日:2021-03-31
Applicant: Micron Technology, Inc.
Inventor: Thomas H. Kinsley , George E. Pax
IPC: H01L25/065 , H01L23/48 , H01L23/00 , H01L23/498
Abstract: Semiconductor packages with pass-through clock traces and associated devices, systems, and methods are disclosed herein. In one embodiment, a semiconductor device includes a package substrate including a first surface having a plurality of substrate contacts, a first semiconductor die having a lower surface attached to the first surface of the package substrate, and a second semiconductor die stacked on top of the first semiconductor die. The first semiconductor die includes an upper surface including a first conductive contact, and the second semiconductor die includes a second conductive contact. A first electrical connector electrically couples a first one of the plurality of substrate contacts to the first and second conductive contacts, and a second electrical connector electrically couples a second one of the plurality of substrate contacts to the first and second conductive contacts.
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公开(公告)号:US20210144840A1
公开(公告)日:2021-05-13
申请号:US16681350
申请日:2019-11-12
Applicant: Micron Technology, Inc.
Inventor: George E. Pax
Abstract: A heat spreader configured for use with a dual-in line memory module (DIMM) is provided. The heat spreader comprises a thermally conductive body having upper and lower edges with a first length, opposing side edges with a second length less than the first length, and a planar surface configured for attachment to a plurality of co-planar semiconductor devices of the DIMM, and a retaining clip configured to releasably attach the thermally conductive body to the DIMM when disposed within a side notch of the DIMM and around a first one of the opposing side edges of the thermally conductive body.
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公开(公告)号:US10978426B2
公开(公告)日:2021-04-13
申请号:US16512591
申请日:2019-07-16
Applicant: Micron Technology, Inc.
Inventor: Thomas H. Kinsley , George E. Pax
IPC: H01L25/065 , H01L23/48 , H01L23/00 , H01L23/498
Abstract: Semiconductor packages with pass-through clock traces and associated devices, systems, and methods are disclosed herein. In one embodiment, a semiconductor device includes a package substrate including a first surface having a plurality of substrate contacts, a first semiconductor die having a lower surface attached to the first surface of the package substrate, and a second semiconductor die stacked on top of the first semiconductor die. The first semiconductor die includes an upper surface including a first conductive contact, and the second semiconductor die includes a second conductive contact. A first electrical connector electrically couples a first one of the plurality of substrate contacts to the first and second conductive contacts, and a second electrical connector electrically couples a second one of the plurality of substrate contacts to the first and second conductive contacts.
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公开(公告)号:US20210036125A1
公开(公告)日:2021-02-04
申请号:US16530757
申请日:2019-08-02
Applicant: Micron Technology, Inc.
Inventor: Chan H. Yoo , George E. Pax , Yogesh Sharma , Gregory A. King , Thomas H. Kinsley , Randon K. Richards
IPC: H01L29/66 , H05K1/11 , H01L23/495
Abstract: Systems, apparatuses, and methods relating to memory devices and packaging are described. A device, such as a dual inline memory module (DIMM) or other electronic device package, may include a substrate with a layer of graphene configured to conduct thermal energy (e.g., heat) away from components mounted or affixed to the substrate. In some examples, a DIMM includes an uppermost or top layer of graphene that is exposed to the air and configured to allow connection of memory devices (e.g., DRAMs) to be soldered to the conducting pads of the substrate. The graphene may be in contact with parts of the memory device other than the electrical connections with the conducting pads and may thus be configured as a heat sink for the device. Other thin, conductive layers of may be used in addition to or as an alternative to graphene. Graphene may be complementary to other heat sink mechanisms.
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公开(公告)号:US11589480B2
公开(公告)日:2023-02-21
申请号:US17523750
申请日:2021-11-10
Applicant: Micron Technology, Inc.
Inventor: Thomas H. Kinsley , George E. Pax , Yogesh Sharma , Gregory A. King , Chan H. Yoo , Randon K. Richards
IPC: H05K7/20 , H01L23/367 , H01L23/373 , G06F1/20 , H01L23/467
Abstract: Systems, apparatuses, and methods for thermal dissipation on or from an electronic device are described. An apparatus may have a printed circuit board (PCB) having an edge connector. At least one integrated circuit device may be disposed on a surface of the PCB. A tubular heat spreader may be disposed along an edge of the PCB opposite the edge connector.
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公开(公告)号:US20230048780A1
公开(公告)日:2023-02-16
申请号:US17978029
申请日:2022-10-31
Applicant: Micron Technology, Inc.
Inventor: Thomas H. Kinsley , George E. Pax
IPC: H01L25/065 , H01L23/48 , H01L23/00 , H01L23/498
Abstract: Semiconductor packages with pass-through clock traces and associated devices, systems, and methods are disclosed herein. In one embodiment, a semiconductor device includes a package substrate including a first surface having a plurality of substrate contacts, a first semiconductor die having a lower surface attached to the first surface of the package substrate, and a second semiconductor die stacked on top of the first semiconductor die. The first semiconductor die includes an upper surface including a first conductive contact, and the second semiconductor die includes a second conductive contact. A first electrical connector electrically couples a first one of the plurality of substrate contacts to the first and second conductive contacts, and a second electrical connector electrically couples a second one of the plurality of substrate contacts to the first and second conductive contacts.
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公开(公告)号:US20220071061A1
公开(公告)日:2022-03-03
申请号:US17523750
申请日:2021-11-10
Applicant: Micron Technology, Inc.
Inventor: Thomas H. Kinsley , George E. Pax , Yogesh Sharma , Gregory A. King , Chan H. Yoo , Randon K. Richards
IPC: H05K7/20 , H01L23/367 , H01L23/373 , G06F1/20 , H01L23/467
Abstract: Systems, apparatuses, and methods for thermal dissipation on or from an electronic device are described. An apparatus may have a printed circuit board (PCB) having an edge connector. At least one integrated circuit device may be disposed on a surface of the PCB. A tubular heat spreader may be disposed along an edge of the PCB opposite the edge connector.
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