专利检索 cpc:"H01L2224/061" 第 1 页

1.

发明公开
SEMICONDUCTOR PACKAGES WITH PASS-THROUGH CLOCK TRACES AND ASSOCIATED SYSTEMS AND METHODS 审中-公开

公开(公告)号：US20240178193A1

公开(公告)日：2024-05-30

申请号：US18526964

申请日：2023-12-01

申请人： Lodestar Licensing Group LLC

发明人： Thomas H. Kinsley , George E. Pax

IPC分类号： H01L25/065 , G11C5/04 , H01L23/00 , H01L23/48 , H01L23/498 , H01L23/538 , H05K1/02 , H05K1/18

CPC分类号： H01L25/0657 , G11C5/04 , H01L23/481 , H01L23/49838 , H01L23/5385 , H01L24/02 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/73 , H05K1/0243 , H01L23/49894 , H01L24/05 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/97 , H01L2224/023 , H01L2224/0237 , H01L2224/0401 , H01L2224/04042 , H01L2224/061 , H01L2224/08225 , H01L2224/131 , H01L2224/16145 , H01L2224/45099 , H01L2224/48227 , H01L2224/4912 , H01L2224/73207 , H01L2224/73251 , H01L2224/85411 , H01L2224/85439 , H01L2224/85447 , H01L2224/85455 , H01L2224/8559 , H01L2224/856 , H01L2224/97 , H01L2225/0651 , H01L2225/06527 , H01L2225/06565 , H01L2924/1436 , H01L2924/15183 , H01L2924/15311 , H05K1/181 , H05K2201/10159 , H05K2201/10522

摘要： Semiconductor packages with pass-through clock traces and associated devices, systems, and methods are disclosed herein. In one embodiment, a semiconductor device includes a package substrate including a first surface having a plurality of substrate contacts, a first semiconductor die having a lower surface attached to the first surface of the package substrate, and a second semiconductor die stacked on top of the first semiconductor die. The first semiconductor die includes an upper surface including a first conductive contact, and the second semiconductor die includes a second conductive contact. A first electrical connector electrically couples a first one of the plurality of substrate contacts to the first and second conductive contacts, and a second electrical connector electrically couples a second one of the plurality of substrate contacts to the first and second conductive contacts.

2.

发明申请
SEMICONDUCTOR DEVICE 审中-公开

公开(公告)号：US20180082970A1

公开(公告)日：2018-03-22

申请号：US15823051

申请日：2017-11-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： JIE CHEN , YING-JU CHEN , HSIEN-WEI CHEN , TSUNG-YUAN YU

IPC分类号： H01L23/00

CPC分类号： H01L24/17 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/94 , H01L2224/0345 , H01L2224/03462 , H01L2224/0401 , H01L2224/05555 , H01L2224/05567 , H01L2224/05569 , H01L2224/0557 , H01L2224/05571 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2224/0603 , H01L2224/061 , H01L2224/06131 , H01L2224/06133 , H01L2224/06134 , H01L2224/06177 , H01L2224/06179 , H01L2224/06515 , H01L2224/131 , H01L2224/13111 , H01L2224/13116 , H01L2224/13147 , H01L2224/16145 , H01L2224/16227 , H01L2224/17051 , H01L2224/81191 , H01L2224/81815 , H01L2224/94 , H01L2924/351 , H01L2924/3511 , H01L2924/3512 , H01L2924/35121 , H01L2924/381 , H01L2924/00014 , H01L2224/06135 , H01L2224/06136 , H01L2924/00012 , H01L2924/014 , H01L2224/81

摘要： A semiconductor device includes a substrate including a surface, a plurality of pads disposing on the surface of the substrate, the plurality of pads includes a non-solder mask defined (NSMD) pad and a solder mask defined (SMD) pad, and the NSMD pad is arranged at a predetermined location. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing a plurality of pads on a surface of the substrate, disposing a solder mask over the surface of the substrate and the plurality of pads, forming a first recess in the solder mask to surround one of the plurality of pads, and forming a second recess in the solder mask and above one of the plurality of pads.

3.

发明申请
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME 审中-公开

公开(公告)号：US20170133339A1

公开(公告)日：2017-05-11

申请号：US15410068

申请日：2017-01-19

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： MIRNG-JI LII , HAO-YI TSAI , HSIEN-WEI CHEN , HUNG-YI KUO

IPC分类号： H01L23/00 , H01L23/522 , H01L23/528 , H01L21/66

CPC分类号： H01L24/14 , H01L22/14 , H01L22/32 , H01L23/5226 , H01L23/528 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0231 , H01L2224/02311 , H01L2224/02331 , H01L2224/0239 , H01L2224/024 , H01L2224/034 , H01L2224/0347 , H01L2224/0361 , H01L2224/0392 , H01L2224/0401 , H01L2224/05018 , H01L2224/05073 , H01L2224/05166 , H01L2224/05551 , H01L2224/05552 , H01L2224/05556 , H01L2224/05569 , H01L2224/05572 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/05687 , H01L2224/061 , H01L2224/0612 , H01L2224/0801 , H01L2224/08059 , H01L2224/1146 , H01L2224/1147 , H01L2224/131 , H01L2224/14104 , H01L2224/16145 , H01L2224/16227 , H01L2224/81815 , H01L2924/15788 , H01L2924/00 , H01L2924/01029 , H01L2924/01013 , H01L2924/01028 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/00012 , H01L2924/014

摘要： A semiconductor device with an under-bump metallurgy (UBM) over a dielectric is provided. The UBM has a trench configured to be offset from a central point of the UBM. A distance between a center of the trench to an edge of the UBM is larger than a distance between the center of the trench to an opposite edge of the UBM. A probe pin is configured to contact the UBM and collect measurement data.

4.

发明申请
Chip Packages and Methods of Manufacture Thereof 有权

公开(公告)号：US20170092617A1

公开(公告)日：2017-03-30

申请号：US14871447

申请日：2015-09-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Wei Wu , Jing-Cheng Lin , Szu-Wei Lu , Ying-Ching Shih

IPC分类号： H01L25/065 , H01L25/00

CPC分类号： H01L25/0652 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L21/76885 , H01L21/78 , H01L23/3114 , H01L23/367 , H01L23/49811 , H01L23/5389 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L24/25 , H01L24/32 , H01L24/33 , H01L24/73 , H01L24/83 , H01L24/96 , H01L24/97 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/68359 , H01L2221/68381 , H01L2224/02371 , H01L2224/0401 , H01L2224/04105 , H01L2224/05023 , H01L2224/05124 , H01L2224/05147 , H01L2224/061 , H01L2224/11002 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/211 , H01L2224/215 , H01L2224/24137 , H01L2224/24147 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H01L2224/73217 , H01L2224/73253 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06548 , H01L2225/06562 , H01L2225/06586 , H01L2225/06589 , H01L2924/10253 , H01L2924/1027 , H01L2924/1032 , H01L2924/141 , H01L2924/1421 , H01L2924/143 , H01L2924/1431 , H01L2924/1434 , H01L2924/1436 , H01L2924/1461 , H01L2924/3511 , H01L2224/83

摘要： Chip packages and method of manufacturing the same are disclosed. In an embodiment, a chip package may include: a redistribution layer (RDL); a first chip including a plurality of first contact pads, the plurality of first contact pads facing the RDL; a second chip disposed between the first chip and the redistribution layer (RDL) wherein a portion of the first chip is disposed outside a lateral extent of the second chip; and a conductive via laterally separated from the second chip, the conductive via extending between the RDL and a first contact pad of the plurality of first contact pads, the first contact pad located in the portion of the first chip disposed outside the lateral extent of the second chip.

5.

发明授权
Semiconductor memory device having pads 有权
标题翻译：具有衬垫的半导体存储器件

公开(公告)号：US09595498B2

公开(公告)日：2017-03-14

申请号：US14960716

申请日：2015-12-07

申请人： SK hynix Inc.

发明人： Chang Kun Park , Seong Hwi Song , Yong Ju Kim , Sung Woo Han , Hee Woong Song , Ic Su Oh , Hyung Soo Kim , Tae Jin Hwang , Hae Rang Choi , Ji Wang Lee , Jae Min Jang

IPC分类号： H01L23/52 , H01L23/00 , H01L23/528 , H01L27/105

CPC分类号： H01L24/06 , H01L23/5286 , H01L24/09 , H01L27/1052 , H01L2224/061 , H01L2224/0612 , H01L2224/06515 , H01L2224/091 , H01L2224/09515 , H01L2924/14 , H01L2924/1434 , H01L2924/30101 , H01L2924/3011 , H01L2924/00

摘要： A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.

摘要翻译： 半导体存储器件包括具有芯片焊盘形成区域的半导体电路基板。在芯片焊盘区域一侧的半导体电路基板上形成一对数据线。一对数据线沿着半导体电路基板的芯片焊盘区域延伸的方向延伸。这对数据线被布置为彼此相邻并且接收一对差分数据信号。电源线形成在芯片焊盘区域的另一侧的半导体电路基板上。电源线沿着半导体电路基板的芯片焊盘区域延伸的方向延伸，并且电源线接收电力。

6.

发明申请
SEMICONDUCTOR MEMORY DEVICE HAVING PADS 有权

公开(公告)号：US20160104684A1

公开(公告)日：2016-04-14

申请号：US14960716

申请日：2015-12-07

申请人： SK hynix Inc.

发明人： Chang Kun PARK , Seong Hwi SONG , Yong Ju KIM , Sung Woo HAN , Hee Woong SONG , Ic Su OH , Hyung Soo KIM , Tae Jin HWANG , Hae Rang CHOI , Ji Wang LEE , Jae Min JANG

IPC分类号： H01L23/00 , H01L23/528

CPC分类号： H01L24/06 , H01L23/5286 , H01L24/09 , H01L27/1052 , H01L2224/061 , H01L2224/0612 , H01L2224/06515 , H01L2224/091 , H01L2224/09515 , H01L2924/14 , H01L2924/1434 , H01L2924/30101 , H01L2924/3011 , H01L2924/00

摘要： A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.

7.

发明授权
Semiconductor memory device having pads 有权

公开(公告)号：US09209145B2

公开(公告)日：2015-12-08

申请号：US14550445

申请日：2014-11-21

申请人： SK hynix Inc.

发明人： Chang Kun Park , Seong Hwi Song , Yong Ju Kim , Sung Woo Han , Hee Woong Song , Ic Su Oh , Hyung Soo Kim , Tae Jin Hwang , Hae Rang Choi , Ji Wang Lee , Jae Min Jang

IPC分类号： H01L27/10 , H01L23/00 , H01L23/528 , H01L27/105

CPC分类号： H01L24/06 , H01L23/5286 , H01L24/09 , H01L27/1052 , H01L2224/061 , H01L2224/0612 , H01L2224/06515 , H01L2224/091 , H01L2224/09515 , H01L2924/14 , H01L2924/1434 , H01L2924/30101 , H01L2924/3011 , H01L2924/00

摘要： A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.

8.

发明授权
Semiconductor system that tests the connectivity between a metal and a bump that are formed in the upper portion of a penetrating electrode 有权
标题翻译：半导体系统，其测试在穿透电极的上部形成的金属和凸块之间的连接性

公开(公告)号：US09140743B2

公开(公告)日：2015-09-22

申请号：US14328357

申请日：2014-07-10

申请人： SK hynix Inc.

发明人： Heat-Bit Park

IPC分类号： H01L23/00 , G01R31/26 , H01L23/48 , H01L23/498

CPC分类号： H01L23/49827 , G01R31/31715 , H01L22/34 , H01L23/481 , H01L23/49816 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0557 , H01L2224/056 , H01L2224/061 , H01L2224/13025 , H01L2224/13028 , H01L2224/13099 , H01L2924/1304 , H01L2924/00012 , H01L2924/00014

摘要： A semiconductor system includes a semiconductor chip; a penetrating electrode, which is formed to penetrate the semiconductor chip; two or more metals, which are formed in the upper portion of the penetrating electrode; a bump, which is formed to contact the upper portions of the metals and supplies a data signal inputted from outside to the metals; a detection block suitable for detecting whether or not the bump is coupled with the metals by comparing voltage levels of the metals with each other and generating a decision signal; and a signal output block suitable for outputting the decision signal externally.

摘要翻译： 半导体系统包括半导体芯片; 穿透电极，其形成为穿透半导体芯片; 两个或更多个金属，形成在穿透电极的上部; 形成为与金属的上部接触并将从外部输入的数据信号提供给金属的凸块; 检测块，用于通过比较所述金属的电压电平并产生判定信号来检测所述凸块是否与所述金属耦合; 以及适于从外部输出判定信号的信号输出块。