公开(公告)号：US20130099304A1

公开(公告)日：2013-04-25

申请号：US13603049

申请日：2012-09-04

申请人： Min Soo KIM ,  Dong Sun Sheen ,  Young Jin Lee ,  Jin Hae Choi ,  Joo Hee Han ,  Sung Jin Whang

发明人： Min Soo KIM ,  Dong Sun Sheen ,  Young Jin Lee ,  Jin Hae Choi ,  Joo Hee Han ,  Sung Jin Whang

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L27/11582 ,  H01L21/283 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/32135 ,  H01L27/11556 ,  H01L29/40117 ,  H01L29/42344 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/7926

摘要： The device includes plural control gates stacked on a substrate, plural first channels, configured to penetrate the control gates, and plural memory layer patterns, each located between the control gate and the first channel, configured to respectively surround the first channel, wherein the memory layer patterns are isolated from one another.

公开(公告)号：US07585730B1

公开(公告)日：2009-09-08

申请号：US12164721

申请日：2008-06-30

申请人： Seok Pyo Song ,  Dong Sun Sheen ,  Young Jin Lee ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

发明人： Seok Pyo Song ,  Dong Sun Sheen ,  Young Jin Lee ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

IPC分类号： H01L21/8247

CPC分类号： H01L29/7881 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

摘要： A method of fabricating a non-volatile memory device includes forming a tunneling layer and a conductive layer on a semiconductor substrate, and patterning the conductive layer, the tunneling layer, and the semiconductor substrate to form a conductive pattern, a tunneling pattern, and a trench in the semiconductor substrate. The method also includes filling the trench with a insulating material, and exposing a partial sidewall of the conductive pattern. The method further includes recessing the exposed partial sidewall of the conductive pattern in an inward direction to form a floating gate. The floating gate includes a base portion and a protruding portion having a width smaller than that of the base portion. The method also includes etching the insulating layer to form an isolation layer that exposes the base portion of the floating gate. Still further, the method includes forming a dielectric layer, that extends along the base and protruding portions of the floating gate, and a control gate that covers the base and protruding portions of the floating gate.

摘要翻译： 一种制造非易失性存储器件的方法包括在半导体衬底上形成隧道层和导电层，并且对导电层，隧道层和半导体衬底进行构图以形成导电图案，隧道图案和 沟槽在半导体衬底中。 该方法还包括用绝缘材料填充沟槽，以及暴露导电图案的部分侧壁。 该方法还包括将导电图案的暴露部分侧壁向内凹入以形成浮动栅极。 浮动门包括基部和具有小于基部的宽度的突出部分。 该方法还包括蚀刻绝缘层以形成暴露浮动栅极的基部的隔离层。 此外，该方法包括形成沿着基极延伸的电介质层和浮动栅极的突出部分，以及覆盖浮动栅极的基部和突出部分的控制栅极。

公开(公告)号：US20090186456A1

公开(公告)日：2009-07-23

申请号：US12346011

申请日：2008-12-30

申请人： Young Jin Lee ,  Dong Sun Sheen ,  Seok Pyo Song ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

发明人： Young Jin Lee ,  Dong Sun Sheen ,  Seok Pyo Song ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

IPC分类号： H01L21/8238

CPC分类号： H01L21/823814 ,  H01L21/823425 ,  H01L21/823835

摘要： A method for manufacturing a semiconductor device using a salicide process, which includes forming a gate dielectric layer over a silicon substrate including a PMOS region and an NMOS region; forming a first silicon pattern in the NMOS region and a second silicon pattern in the PMOS region; forming a first metal layer that is in contact with the first silicon pattern and the exposed first portion of the silicon substrate; and forming a first gate, a first junction, a second gate, and a second junction by performing a heat treatment to silicify the respective first and second silicon patterns and the silicon substrate.

摘要翻译： 一种使用自对准硅化物工艺制造半导体器件的方法，包括在包括PMOS区域和NMOS区域的硅衬底上形成栅极电介质层; 在所述NMOS区域中形成第一硅图案和在所述PMOS区域中形成第二硅图案; 形成与所述第一硅图案和所述暴露的所述硅衬底的第一部分接触的第一金属层; 以及通过进行热处理以使相应的第一和第二硅图案和硅衬底硅化而形成第一栅极，第一结，第二栅极和第二结。

公开(公告)号：US07795086B2

公开(公告)日：2010-09-14

申请号：US12346011

申请日：2008-12-30

申请人： Young Jin Lee ,  Dong Sun Sheen ,  Seok Pyo Song ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

发明人： Young Jin Lee ,  Dong Sun Sheen ,  Seok Pyo Song ,  Mi Ri Lee ,  Chi Ho Kim ,  Gil Jae Park ,  Bo Min Seo

IPC分类号： H01L21/8238

CPC分类号： H01L21/823814 ,  H01L21/823425 ,  H01L21/823835

摘要： A method for manufacturing a semiconductor device using a salicide process, which includes forming a gate dielectric layer over a silicon substrate including a PMOS region and an NMOS region; forming a first silicon pattern in the NMOS region and a second silicon pattern in the PMOS region; forming a first metal layer that is in contact with the first silicon pattern and the exposed first portion of the silicon substrate; and forming a first gate, a first junction, a second gate, and a second junction by performing a heat treatment to silicify the respective first and second silicon patterns and the silicon substrate.

摘要翻译： 一种使用自对准硅化物工艺制造半导体器件的方法，包括在包括PMOS区域和NMOS区域的硅衬底上形成栅极电介质层; 在所述NMOS区域中形成第一硅图案和在所述PMOS区域中形成第二硅图案; 形成与所述第一硅图案和所述暴露的所述硅衬底的第一部分接触的第一金属层; 以及通过进行热处理以使相应的第一和第二硅图案和硅衬底硅化而形成第一栅极，第一结，第二栅极和第二结。

公开(公告)号：US08401778B2

公开(公告)日：2013-03-19

申请号：US12509567

申请日：2009-07-27

申请人： Young Jin Lee

发明人： Young Jin Lee

IPC分类号： G06F17/00 ,  G06F19/00

CPC分类号： B60R16/0236 ,  B60K2350/1092 ,  Y02T10/84

摘要： The present invention relates to a system and a method for displaying an accumulative fuel economic driving area of a vehicle. A system according to an embodiment includes a vehicle information unit that collects vehicle information and a controller that calculates a fuel economic driving area by using the vehicle information, and calculates an accumulative fuel economic driving area by accumulating respective lighting times of respective zones of the fuel economic driving area and calculating respective accumulation ratios of the respective zones. The system provides the driver with information for fuel economic driving.

摘要翻译： 本发明涉及一种用于显示车辆的累积燃料经济驾驶区域的系统和方法。 根据实施例的系统包括：收集车辆信息的车辆信息单元和通过使用车辆信息计算燃料经济驾驶区域的控制器，并且通过累积燃料的各个区域的各个照明时间来计算累积燃料经济驾驶区域 经济驾驶面积，并计算各个区域的各个累积比例。 该系统为驾驶员提供燃油经济驾驶的信息。

公开(公告)号：USD664323S1

公开(公告)日：2012-07-24

申请号：US29393214

申请日：2011-06-01

申请人： Young Jin Lee ,  Eui Sik Kim

设计人： Young Jin Lee ,  Eui Sik Kim

公开(公告)号：US08203165B2

公开(公告)日：2012-06-19

申请号：US12343455

申请日：2008-12-23

申请人： Young Jin Lee ,  Hyung Kun Kim

发明人： Young Jin Lee ,  Hyung Kun Kim

IPC分类号： H01L31/00

CPC分类号： H01L33/62 ,  H01L33/486 ,  H01L33/641 ,  H01L2924/0002 ,  H01L2924/19107 ,  H01L2924/00

摘要： Provided is a ceramic package for headlamp, and a headlamp module having the same. The ceramic package for headlamp includes a body part, a pair of internal electrodes, and an electrode exposing part. The body part has a cavity formed therein. The cavity is upwardly opened to expose a light emitting diode mounted on a mounting part. The pair of internal electrodes in the body part is electrically connected to the light emitting diode. The electrode exposing part is stepped at either side of the body part to upwardly expose the internal electrode to the outside.

摘要翻译： 提供了一种用于头灯的陶瓷封装件和具有该陶瓷封装件的前照灯模块。 用于头灯的陶瓷封装包括主体部分，一对内部电极和电极暴露部分。 主体部分具有形成在其中的空腔。 空腔向上打开以暴露安装在安装部件上的发光二极管。 主体部分中的一对内部电极电连接到发光二极管。 电极暴露部分在主体部分的任一侧是阶梯状的，以将内部电极向外暴露于外部。

公开(公告)号：US08183583B2

公开(公告)日：2012-05-22

申请号：US12571754

申请日：2009-10-01

申请人： Suk Ho Jung ,  Hyung Kun Kim ,  Hak Hwan Kim ,  Young Jin Lee ,  Ho Sun Paek

发明人： Suk Ho Jung ,  Hyung Kun Kim ,  Hak Hwan Kim ,  Young Jin Lee ,  Ho Sun Paek

IPC分类号： H01L33/00

CPC分类号： H01L25/0753 ,  H01L33/486 ,  H01L33/504 ,  H01L33/508 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2924/00014

摘要： An LED package module according to an aspect of the invention may include: a substrate having predetermined electrodes thereon; a plurality of LED chips mounted onto the substrate, separated from each other at predetermined intervals, and electrically connected to the electrodes; a first color resin portion molded around at least one of the plurality of LED chips; a second color resin portion molded around all of the LED chips except for the LED chip around which the first color resin portion is molded, and having a different color from the first color resin portion; and a third color resin portion encompassing both the first color resin portion and the second color resin portion and having a different color from the first color resin portion and the second color resin portion. Accordingly, a reduction in luminous efficiency of an LED caused by yellowing is prevented to thereby increase luminous efficiency and achieve a reduction in size.

摘要翻译： 根据本发明的一个方面的LED封装模块可以包括：其上具有预定电极的基板; 安装在基板上的多个LED芯片，以预定间隔彼此分开，并与电极电连接; 围绕所述多个LED芯片中的至少一个模制的第一颜色树脂部分; 围绕除了第一着色树脂部分成型的LED芯片之外的所有LED芯片的第二颜色树脂部分模制，并且具有与第一着色树脂部分不同的颜色; 以及第三颜色树脂部分，其包围第一着色树脂部分和第二颜色树脂部分，并且具有与第一着色树脂部分和第二着色树脂部分不同的颜色。 因此，防止由黄化引起的LED的发光效率的降低，从而提高发光效率并实现尺寸的减小。

公开(公告)号：US08026675B2

公开(公告)日：2011-09-27

申请号：US12213506

申请日：2008-06-20

申请人： Young Jin Lee ,  Byoung Own Min ,  Gil Han Park ,  Grigory Onushkin

发明人： Young Jin Lee ,  Byoung Own Min ,  Gil Han Park ,  Grigory Onushkin

IPC分类号： H05B37/02

CPC分类号： H05B33/0803 ,  H05B33/0821 ,  Y02B20/342 ,  Y10S362/80 ,  Y10S362/808

摘要： There is provided an LED driving circuit including: at least one ladder network circuit including: (n+1) number of first branches connected in parallel with one another by n number of first middle junction points between a first junction point and a second junction point, where n denotes an integer satisfying n≧2, (n+1) number of second branches connected in parallel with one another by n number of second middle junction points between the first junction point and the second junction point, the (n+1) number of second branches connected in parallel with the first branches; and n number of middle branches connecting the first and second middle junction points of an identical m sequence to each other, respectively, wherein each of the first and second, and middle branches comprises at least one LED device.

摘要翻译： 提供了一种LED驱动电路，包括：至少一个梯形网络电路，包括：（n + 1）数个第一分支，其在第一连接点和第二连接点之间彼此并联连接n个第一中间连接点 ，其中n表示满足n≥2的整数，（n + 1）个在第一连接点和第二连接点之间由n个第二中间连接点彼此并联连接的第二分支数，第（n + 1）个 ）与第一分支并联连接的第二分支的数量; 以及分别将相同m个序列的第一和第二中间连接点彼此连接的n个中间分支，其中第一和第二和中间分支中的每一个包括至少一个LED装置。

公开(公告)号：US20100119628A1

公开(公告)日：2010-05-13

申请号：US12654635

申请日：2009-12-28

申请人： Chan Koo Kang ,  Young Jin Lee ,  Sang Hoon Han ,  Seung Hun Kim

发明人： Chan Koo Kang ,  Young Jin Lee ,  Sang Hoon Han ,  Seung Hun Kim

IPC分类号： A61K36/185 ,  A61Q19/08

CPC分类号： A61Q19/08 ,  A61K8/63 ,  A61K8/671 ,  A61K8/97

摘要： The present invention relates to an anti-aging cosmetic composition, and more particularly, the present invention relates to an anti-aging cosmetic composition containing Hibiscus esculentus extracts and at least one selected from the group consisting of oleanolic acid, ursolic acid, glycyrhetinic acid and retinol, showing high safety to skin and wrinkle-improvement effect.

摘要翻译： 本发明涉及一种抗衰老化妆品组合物，更具体地说，本发明涉及一种含有芙蓉提取物和至少一种选自齐墩果酸，熊果酸，甘草次酸和 视黄醇，对皮肤表现出高安全性和皱纹改善作用。