公开(公告)号：US20110254175A1

公开(公告)日：2011-10-20

申请号：US13172571

申请日：2011-06-29

申请人： Taku NISHIYAMA ,  Tetsuya YAMAMOTO ,  Naohisa OKUMURA

发明人： Taku NISHIYAMA ,  Tetsuya YAMAMOTO ,  Naohisa OKUMURA

IPC分类号： H01L23/48

CPC分类号： G11C5/063 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor memory device includes: a wiring board including an element mounting portion and connection pads; a first element group including a plurality of semiconductor elements each having electrode pads arranged along one of outer sides of the semiconductor element, the plurality of semiconductor elements being layered stepwise on the element mounting portion of the wiring board in a way that pad arrangement sides of the semiconductor elements face in the same direction, and that the electrode pads are exposed; a second element group including a plurality of semiconductor elements each having electrode pads arranged along one of outer sides of the semiconductor element, the plurality of semiconductor elements being layered stepwise on the first element group in a way that pad arrangement sides of the semiconductor elements face in the same direction as that of the first element group, and that the electrode pads are exposed, the second element group being disposed to be offset from the first element group in an arrangement direction of the electrode pads;metallic wires for electrically connecting the electrode pads of the plurality of semiconductor elements included in the first and second element groups to the connection pads of the wiring board; and a sealing resin layer formed on the wiring board so as to seal the first and second element groups together with the metallic wires.

摘要翻译： 半导体存储器件包括：布线板，包括元件安装部分和连接焊盘; 包括多个半导体元件的第一元件组，每个半导体元件具有沿着所述半导体元件的一个外侧布置的电极焊盘，所述多个半导体元件以所述布线板的元件安装部分的方式逐层地分层， 半导体元件面向相同方向，电极焊盘露出; 包括多个半导体元件的第二元件组，每个半导体元件具有沿着所述半导体元件的一个外侧布置的电极焊盘，所述多个半导体元件以半导体元件的衬垫布置面朝向所述第一元件组逐级分层 在与第一元件组相同的方向上，并且电极焊盘被暴露，第二元件组被设置为沿着电极焊盘的布置方向偏离第一元件组; 用于将包括在第一和第二元件组中的多个半导体元件的电极焊盘电连接到布线板的连接焊盘的金属线; 以及密封树脂层，其形成在所述布线板上，以与所述金属线一起密封所述第一和第二元件组。

公开(公告)号：US20110115100A1

公开(公告)日：2011-05-19

申请号：US12948160

申请日：2010-11-17

申请人： Naohisa OKUMURA ,  Taku NISHIYAMA

发明人： Naohisa OKUMURA ,  Taku NISHIYAMA

IPC分类号： H01L23/488

CPC分类号： H01L25/18 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/32145 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2224/85399 ,  H01L2224/05599

摘要： According to one embodiment, a semiconductor device includes a base, a memory chip, a controller chip, and a plurality of passive components. The base includes a bonding pad. The memory chip is provided above the base and connected to the bonding pad by a wire. Data can be electrically stored in the memory chip. The controller chip is provided in a memory area including the memory chip in a direction from the memory chip toward the base and controls an operation of the memory chip. The passive components are provided in the memory area.

摘要翻译： 根据一个实施例，半导体器件包括基极，存储器芯片，控制器芯片和多个无源部件。 基座包括接合垫。 存储芯片设置在基座上方并通过导线连接到接合焊盘。 数据可以电存储在存储芯片中。 控制器芯片设置在从存储芯片朝向基座的方向上包括存储器芯片的存储区域中，并且控制存储芯片的操作。 被动元件被提供在存储器区域中。

公开(公告)号：US20100109141A1

公开(公告)日：2010-05-06

申请号：US12558814

申请日：2009-09-14

申请人： Taku NISHIYAMA ,  Naohisa OKUMURA ,  Kiyokazu OKADA

发明人： Taku NISHIYAMA ,  Naohisa OKUMURA ,  Kiyokazu OKADA

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L27/115 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor memory card includes a wiring board which has a first pad region along a first long side and a second pad region along a second long side. First memory chips which configure a first chip group are stacked in a step-like shape on the wiring board. Second memory chips which configure a second chip group are stacked in a step-like shape on the first chip group with the direction reversed. The electrode pads of the first memory chips are electrically connected to the connection pads arranged on the first pad region, and the electrode pads of the second memory chips are electrically connected to the connection pads arranged on the second pad region.

摘要翻译： 半导体存储卡包括具有沿着第一长边的第一焊盘区域和沿着第二长边的第二焊盘区域的布线板。 配置第一芯片组的第一存储芯片在布线板上以阶梯状形式堆叠。 构成第二芯片组的第二存储芯片在第一芯片组上以阶梯状形状堆叠，其方向颠倒。 第一存储器芯片的电极焊盘电连接到布置在第一焊盘区域上的连接焊盘，并且第二存储器芯片的电极焊盘电连接到布置在第二焊盘区域上的连接焊盘。

公开(公告)号：US20070210175A1

公开(公告)日：2007-09-13

申请号：US11683634

申请日：2007-03-08

申请人： Naohisa OKUMURA

发明人： Naohisa OKUMURA

IPC分类号： G06K19/06

CPC分类号： G06K19/07 ,  G06K19/0722 ,  G06K19/07732 ,  H05K1/0268 ,  H05K1/11 ,  H05K3/28 ,  H05K2201/0949 ,  H05K2201/10159 ,  H05K2201/10212 ,  H05K2203/058 ,  H05K2203/1476

摘要： A semiconductor memory card that is connected to an external device for use, has a circuit board that has an input/output terminal to be connected to said external device for signal input/output, an internal terminal and a substrate wiring formed on the upper surface thereof and has a resin member for insulation protection of said substrate wiring; a semiconductor memory chip for storing data that is mounted on the lower surface of said circuit board and electrically connected to said internal terminal; and an insulating seal for insulating said internal terminal from the outside that is disposed on said circuit board to cover at least said internal terminal, wherein the peripheral part of said insulating seal is bonded to a position lower than the height of the upper surface of said resin member.

摘要翻译： 连接到外部设备使用的半导体存储卡具有电路板，其具有要连接到所述用于信号输入/输出的外部设备的输入/输出端子，内部端子和形成在上表面上的基板布线 并具有用于所述衬底布线的绝缘保护的树脂构件; 半导体存储芯片，用于存储安装在所述电路板的下表面上并电连接到所述内部端子的数据; 以及绝缘密封件，用于将设置在所述电路板上的所述内部端子与外部绝缘以至少覆盖所述内部端子，其中所述绝缘密封件的周边部分结合到低于所述内部端子的上表面的高度的位置 树脂构件。

公开(公告)号：US20090321960A1

公开(公告)日：2009-12-31

申请号：US12489658

申请日：2009-06-23

申请人： Naohisa OKUMURA

发明人： Naohisa OKUMURA

IPC分类号： H01L23/52

CPC分类号： H01L25/18 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A plurality of semiconductor memory chips are stacked on a first main surface of a wiring board, and an interposer chip is stacked on the plurality of semiconductor chips, and a semiconductor controller chip is stacked on the interposer chip. The plurality of semiconductor memory chips are independently and electrically connected with inner connecting terminals formed on the wiring board, respectively, and independently controlled by the semiconductor controller chip which is electrically connected with another inner connecting terminals formed on the wiring board via the interposer chip.

摘要翻译： 多个半导体存储器芯片堆叠在布线板的第一主表面上，并且插入器芯片堆叠在多个半导体芯片上，并且半导体控制器芯片堆叠在插入器芯片上。 多个半导体存储器芯片分别独立地电连接到形成在布线板上的内部连接端子，并且由与通过插入器芯片形成在布线板上的另一个内部连接端子电连接的半导体控制器芯片独立地控制。

公开(公告)号：US20090045525A1

公开(公告)日：2009-02-19

申请号：US12191574

申请日：2008-08-14

申请人： Ryoji MATSUSHIMA ,  Naohisa OKUMURA

发明人： Ryoji MATSUSHIMA ,  Naohisa OKUMURA

IPC分类号： H01L23/28

CPC分类号： H01L23/3128 ,  H01L21/568 ,  H01L23/585 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/743 ,  H01L24/82 ,  H01L24/83 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/24145 ,  H01L2224/24998 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48624 ,  H01L2224/48799 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/82007 ,  H01L2224/82102 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/85186 ,  H01L2224/85399 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3862 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48824 ,  H01L2924/00015 ,  H01L2924/207 ,  H01L2224/4554

摘要： A semiconductor element is provided with electrode pads which are arranged on a front surface of an element main body, an insulating protection film which covers the front surface of the element main body excepting its outer peripheral area while exposing the electrode pads, and an insulating adhesive layer which is formed to cover a back surface, a sidewall surface and a corner between the front surface and the sidewall surface of the element main body. A plurality of semiconductor elements are stacked on a circuit substrate. The semiconductor elements are adhered via the insulating adhesive layer.

摘要翻译： 半导体元件设置有布置在元件主体的前表面上的电极焊盘，绝缘保护膜，其在暴露电极焊盘的同时覆盖元件主体的除外周区域的前表面之外的绝缘保护膜，以及绝缘粘合剂 层，其形成为覆盖元件主体的前表面和侧壁表面的后表面，侧壁表面和拐角。 多个半导体元件堆叠在电路基板上。 半导体元件通过绝缘粘合剂层粘合。