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    Passive one-way valve and microfluidic device
    2.
    发明授权
    Passive one-way valve and microfluidic device 有权
    被动单向阀和微流体装置

    公开(公告)号：US08545767B2

    公开(公告)日：2013-10-01

    申请号：US12160593

    申请日：2007-01-09

    申请人： Susumu Arai

    发明人： Susumu Arai

    IPC分类号： G01N21/75

    CPC分类号： G01N27/44743 ,  B01L3/502738 ,  B01L2300/0816 ,  B01L2300/0867 ,  B01L2300/0874 ,  B01L2400/0605 ,  B01L2400/0633 ,  F16K99/0001 ,  F16K99/0005 ,  F16K99/0034 ,  F16K99/0057 ,  Y10T137/1624 ,  Y10T137/7879 ,  Y10T137/87434 ,  Y10T436/2575

    摘要： This passive one-way valve is used in a connection portion between first and second flow channels, and includes: an inlet portion into which a fluid from the first flow channel flows; an elastic portion for blocking the inlet portion; a rigid portion for supporting the elastic portion from a side opposite to the inlet portion across the elastic portion; a gap portion formed around the rigid portion; and an outlet portion which is in communication with the gap portion for letting the fluid flow out into the second flow channel. Furthermore, the inlet portion is hermetically sealed by the elastic portion being pressed against the inlet portion side by the rigid portion. According to this passive one-way valve, it is possible to provide a simple and inexpensive passive one-way valve without requiring special equipment such as a vacuum pump and pressurized air, and to provide a microfluidic device using the same.

    摘要翻译： 该无源单向阀用于第一和第二流动通道之间的连接部分，并且包括：入口部分，来自第一流动通道的流体流入该入口部分; 用于阻挡入口部分的弹性部分; 刚性部分，用于通过弹性部分从与入口部分相对的一侧支撑弹性部分; 形成在刚性部分周围的间隙部分; 以及与间隙部分连通以使流体流出到第二流动通道中的出口部分。 此外，入口部分被弹性部分气密地密封，该弹性部分被刚性部分压入入口部分侧。 根据该无源单向阀，可以提供一种简单便宜的无源单向阀，而不需要诸如真空泵和加压空气的特殊设备，并且提供使用该单向阀的微流体装置。

    MICROFLUIDIC DEVICE
    3.
    发明申请
    MICROFLUIDIC DEVICE 有权
    微流体装置

    公开(公告)号：US20110253222A1

    公开(公告)日：2011-10-20

    申请号：US13131356

    申请日：2009-11-26

    申请人： Susumu Arai

    发明人： Susumu Arai

    IPC分类号： B01L3/00

    CPC分类号： B01J19/0093 ,  B01F5/0646 ,  B01F5/0647 ,  B01F13/0059 ,  B01F15/0203 ,  B01F15/0234 ,  B01J2219/0086 ,  B01J2219/00907 ,  B01J2219/00984 ,  B01L3/502707 ,  B01L3/50273 ,  B01L3/502776 ,  B01L2200/0636 ,  B01L2200/10 ,  B01L2300/0867 ,  B01L2300/0874 ,  B01L2300/0883 ,  B01L2300/161 ,  B01L2400/0406 ,  B01L2400/0457 ,  B81B1/00 ,  B81B2201/051 ,  Y10T137/0318

    摘要： The present invention is to provide a microfluidic device capable of allowing a fluid to stably flow in a microchannel without using an external source such as a pump or a suction device, and the microfluidic device, provided with a microchannel to which a sample liquid is transported, includes: an inlet reservoir which reserves a sample liquid to be introduced into said microchannel; an inlet which is provided on a sample-introduced side of the microchannel, and communicates with the inlet reservoir; an outlet provided on a sample-discharged side of the microchannel; and an open channel which is provided as communicating with the outlet, and part of at least one surface of which is opened to the outside atmosphere, wherein the inlet is provided at a higher position in a gravity direction than the outlet.

    摘要翻译： 本发明提供一种微流体装置，其能够允许流体在微通道内稳定地流动而不使用诸如泵或抽吸装置的外部源，以及微流体装置，其设置有运送样品液体的微通道 包括：入口储存器，其保留待引入所述微通道的样品液体; 入口，设置在所述微通道的样品导入侧，并与所述入口容器连通; 设置在微通道的样品排出侧的出口; 以及开口通道，其设置为与所述出口连通，并且其至少一个表面的一部分向外部大气开放，其中所述入口设置在比所述出口在重力方向更高的位置。

    High availability multi-processor system
    5.
    发明授权
    High availability multi-processor system 失效
    高可用性多处理器系统

    公开(公告)号：US07562252B2

    公开(公告)日：2009-07-14

    申请号：US12130757

    申请日：2008-05-30

    申请人： Susumu Arai

    发明人： Susumu Arai

    IPC分类号： G06F11/00

    CPC分类号： G06F11/203 ,  G06F11/2038 ,  G06F11/2041 ,  G06F11/2043

    摘要： A method and system are provided for enabling replacement of a failed processor without requiring redundancy of hardware. The system is a multiprocessing computer system that includes one or more processor chips. Each processor chip may include one or more logical processors. During system initialization, one or more logical processors may be reserved in an inactive state. In the event an error is detected on a logical or physical processor, one or more reserved logical processors may have execution context transferred from the processor experiencing the error. Thereafter, the active processor is designated as inactive and replaced by the inactive processor to which the execution context has been transferred.

    摘要翻译： 提供了一种方法和系统，用于使得能够更换故障处理器而不需要硬件的冗余。 该系统是包括一个或多个处理器芯片的多处理计算机系统。 每个处理器芯片可以包括一个或多个逻辑处理器。 在系统初始化期间，可以将一个或多个逻辑处理器保留在非活动状态。 在逻辑或物理处理器上检测到错误的情况下，一个或多个保留的逻辑处理器可能具有从处理器传送的执行上下文经历错误。 此后，活动处理器被指定为非活动的，并被执行上下文传送到的非活动处理器代替。

    SYSTEM AND METHOD FOR CONTROLLING PROCESSOR LOW POWER STATES
    7.
    发明申请
    SYSTEM AND METHOD FOR CONTROLLING PROCESSOR LOW POWER STATES 审中-公开
    用于控制处理器低功率状态的系统和方法

    公开(公告)号：US20120102349A1

    公开(公告)日：2012-04-26

    申请号：US13089669

    申请日：2011-04-19

    申请人： Susumu Arai ,  Michael Walz ,  Barnes Cooper

    发明人： Susumu Arai ,  Michael Walz ,  Barnes Cooper

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3203

    摘要： A next idle state for a processor in a system may be determined based on a previous idle period and a previous idle state. The next idle state for the processor may also be determined based on times when interrupts are generated by devices in the system.

    摘要翻译： 可以基于先前的空闲时段和先前的空闲状态来确定系统中的处理器的下一个空闲状态。 处理器的下一个空闲状态也可以基于系统中的设备产生中断的时间来确定。

    High Availability Multi-Processor System
    8.
    发明申请
    High Availability Multi-Processor System 失效
    高可用性多处理器系统

    公开(公告)号：US20080229146A1

    公开(公告)日：2008-09-18

    申请号：US12130757

    申请日：2008-05-30

    申请人： Susumu Arai

    发明人： Susumu Arai

    IPC分类号： G06F11/20

    CPC分类号： G06F11/203 ,  G06F11/2038 ,  G06F11/2041 ,  G06F11/2043

    摘要： A method and system are provided for enabling replacement of a failed processor without requiring redundancy of hardware. The system is a multiprocessing computer system that includes one or more processor chips. Each processor chip may include one or more logical processors. During system initialization, one or more logical processors may be reserved in an inactive state. In the event an error is detected on a logical or physical processor, one or more reserved logical processors may have execution context transferred from the processor experiencing the error. Thereafter, the active processor is designated as inactive and replaced by the inactive processor to which the execution context has been transferred.

    摘要翻译： 提供了一种方法和系统，用于使得能够更换故障处理器而不需要硬件的冗余。 该系统是包括一个或多个处理器芯片的多处理计算机系统。 每个处理器芯片可以包括一个或多个逻辑处理器。 在系统初始化期间，可以将一个或多个逻辑处理器保留在非活动状态。 在逻辑或物理处理器上检测到错误的情况下，一个或多个保留的逻辑处理器可能具有从处理器传送的执行上下文经历错误。 此后，活动处理器被指定为非活动的，并被执行上下文传送到的非活动处理器代替。

    High availability multi-processor system
    9.
    发明授权
    High availability multi-processor system 有权
    高可用性多处理器系统

    公开(公告)号：US07404105B2

    公开(公告)日：2008-07-22

    申请号：US10919105

    申请日：2004-08-16

    申请人： Susumu Arai

    发明人： Susumu Arai

    IPC分类号： G06F11/00

    CPC分类号： G06F11/203 ,  G06F11/2038 ,  G06F11/2041 ,  G06F11/2043

    摘要： A method and system are provided for enabling replacement of a failed processor without requiring redundancy of hardware. The system is a multiprocessing computer system that includes one or more processor chips. Each processor chip may include one or more logical processors. During system initialization, one or more logical processors may be reserved in an inactive state. In the event an error is detected on a logical or physical processor, one or more reserved logical processors may have execution context transferred from the processor experiencing the error. Thereafter, the active processor is designated as inactive and replaced by the inactive processor to which the execution context has been transferred.

    摘要翻译： 提供了一种方法和系统，用于使得能够更换故障处理器而不需要硬件的冗余。 该系统是包括一个或多个处理器芯片的多处理计算机系统。 每个处理器芯片可以包括一个或多个逻辑处理器。 在系统初始化期间，可以将一个或多个逻辑处理器保留在非活动状态。 在逻辑或物理处理器上检测到错误的情况下，一个或多个保留的逻辑处理器可能具有从处理器传送的执行上下文经历错误。 此后，活动处理器被指定为非活动的，并被执行上下文传送到的非活动处理器代替。

    Method and apparatus for providing for detecting processor state transitions
    10.
    发明申请
    Method and apparatus for providing for detecting processor state transitions 有权
    用于提供检测处理器状态转换的方法和装置

    公开(公告)号：US20070150759A1

    公开(公告)日：2007-06-28

    申请号：US11316541

    申请日：2005-12-22

    申请人： Vasudevan Srinivasan ,  Susumu Arai ,  Barnes Cooper

    发明人： Vasudevan Srinivasan ,  Susumu Arai ,  Barnes Cooper

    IPC分类号： G06F1/26

    CPC分类号： G06F1/3203 ,  G06F1/329 ,  G06F9/4818 ,  G06F11/3423 ,  G06F11/3466 ,  Y02D10/24

    摘要： In some embodiments, the method and apparatus to provide for the detection of processor transition states is described. Some embodiments include at least two threads which provide detection for high and low priority states, which provide for power state transitions by the operating system: The low priority thread runs just prior to entry into an idle or low power state; the high priority thread runs when the idle state is ended or the highest power state is reached. In some embodiments, the use of these threads provides for the detection of processor state transitions and idle times independently of the operating system. Other embodiments are described.

    摘要翻译： 在一些实施例中，描述了提供用于检测处理器转换状态的方法和装置。 一些实施例包括提供针对高优先级和低优先级状态的检测的至少两个线程，其提供操作系统的功率状态转换：低优先级线程在进入空闲或低功率状态之前运行; 高优先级线程在空闲状态结束或达到最高功率状态时运行。 在一些实施例中，这些线程的使用提供独立于操作系统的处理器状态转换和空闲时间的检测。 描述其他实施例。