公开(公告)号：US11939691B2

公开(公告)日：2024-03-26

申请号：US16309088

申请日：2017-06-13

Applicant: ISHIHARA CHEMICAL CO., LTD.

Inventor： Syohei Yamaguchi ,  Hiroki Ishida ,  Masaru Hatabe ,  Shoya Iuchi

IPC: C25D3/32 ,  C25D3/58 ,  C25D3/60 ,  C25D7/12 ,  H01L23/00

CPC classification number: C25D3/32 ,  C25D3/60 ,  C25D7/12 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/11462 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2924/014

Abstract: An electrodeposit formed by using a tin or tin alloy plating bath containing a prescribed branched polyoxyalkylene compound, such as an alkylene oxide adduct of aliphatic monoamine or polyamine in which a plurality of oxyalkylene chains are bonded to a nitrogen atom of an amine structure in a molecule, or an alkylene oxide adduct of glycerin or polyglycerin in which oxyalkylene chains are respectively bonded to a plurality of oxygen atoms of an alcohol structure in a molecule, suppresses formation defect such as abnormal growth of the electrodeposit. The electrodeposit also improves yield from the viewpoint of quality control.

公开(公告)号：US20230151504A1

公开(公告)日：2023-05-18

申请号：US17935410

申请日：2022-09-26

Applicant: HOJIN PLATECH CO., LTD.

Inventor： Woon Suk JUNG ,  Jong Uk KIM ,  Jin Gyu LEE

IPC: C25D3/32 ,  C25D3/60

CPC classification number: C25D3/32 ,  C25D3/60

Abstract: Provided is an electroplating solution of tin or a tin alloy in which the thickness variation of wafer bumps is maintained at a low level even in various changes of plating conditions and thus the mass productivity is improved. The electroplating solution of tin or a tin alloy may include tin ions as metal ions, a conductive salt, a carboxylic acid as a structure refiner, and a combination of a flavone compound and a quaternary ammonium compound as a thickness variation improving agent.

公开(公告)号：US20190233962A1

公开(公告)日：2019-08-01

申请号：US16220883

申请日：2018-12-14

Applicant: New Mexico Tech University Research Park Corporation

Inventor： Bhaskar S. MAJUMDAR ,  Sherin BHASSYVASANTHA ,  Luke SOULE

IPC: C25D3/60 ,  C25D3/32

CPC classification number: C25D3/60 ,  C23C18/31 ,  C25D3/30 ,  C25D3/32 ,  H05K3/24

Abstract: The disclosure provides a Sn—In electroplating bath that is Pb-free, environmentally safe, operates at room temperature, and does not require changes in existing plating assemblies. Room temperature aging and limited thermal cycling tests show that the electroplated Sn—In alloy film on a Cu substrate effectively mitigates whisker growth.

公开(公告)号：US20190088608A1

公开(公告)日：2019-03-21

申请号：US15954254

申请日：2018-04-16

Applicant: Texas Instruments Incorporated

Inventor： Nazila Dadvand ,  Salvatore Frank Pavone ,  Christopher Daniel Manack

IPC: H01L23/00 ,  C25D5/12

CPC classification number: H01L24/11 ,  C25D3/30 ,  C25D3/38 ,  C25D3/56 ,  C25D3/562 ,  C25D3/60 ,  C25D5/022 ,  C25D5/10 ,  C25D5/12 ,  C25D5/18 ,  C25D5/505 ,  C25D7/00 ,  C25D7/123 ,  H01L21/288 ,  H01L23/49524 ,  H01L23/49582 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05096 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13284 ,  H01L2224/13582 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/13639 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1368 ,  H01L2224/13684 ,  H01L2224/13693 ,  H01L2224/16245 ,  H01L2224/16503 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01042 ,  H01L2924/01027 ,  H01L2924/01028

Abstract: A microelectronic device includes a reflow structure. The reflow structure has a copper-containing member and a solder member, and a barrier layer between them. The barrier layer has metal grains, with a diffusion barrier filler between the metal grains. The metal grains include at least a first metal and a second metal, each selected from nickel, cobalt, lanthanum, and cerium, with each having a concentration in the metal grains of at least 10 weight percent. The diffusion barrier filler includes at least a third metal, selected from tungsten and molybdenum. A combined concentration of tungsten and molybdenum in the diffusion barrier filler is higher than in the metal grains to provide a desired resistance to diffusion of copper. The barrier layer includes 2 weight percent to 15 weight percent of the combined concentration of tungsten, and molybdenum. A bump bond structure and a lead frame package are disclosed.

公开(公告)号：US20180237933A1

公开(公告)日：2018-08-23

申请号：US15958525

申请日：2018-04-20

Applicant: Novellus Systems, Inc.

Inventor： Steven T. Mayer ,  David W. Porter

IPC: C25D3/60 ,  C25C7/00 ,  C25C1/20 ,  C25D21/18 ,  C25D21/14 ,  C25D5/02 ,  C25D7/12 ,  C25D17/00 ,  C25D21/12 ,  C25D5/48 ,  C25D3/56

CPC classification number: C25D3/60 ,  C25C1/20 ,  C25C7/00 ,  C25D3/56 ,  C25D5/022 ,  C25D5/48 ,  C25D7/123 ,  C25D17/001 ,  C25D17/002 ,  C25D21/12 ,  C25D21/14 ,  C25D21/18

Abstract: An apparatus for continuous simultaneous electroplating of two metals having substantially different standard electrodeposition potentials (e.g., for deposition of Sn—Ag alloys) comprises an anode chamber for containing an anolyte comprising ions of a first, less noble metal, (e.g., tin), but not of a second, more noble, metal (e.g., silver) and an active anode; a cathode chamber for containing catholyte including ions of a first metal (e.g., tin), ions of a second, more noble, metal (e.g., silver), and the substrate; a separation structure positioned between the anode chamber and the cathode chamber, where the separation structure substantially prevents transfer of more noble metal from catholyte to the anolyte; and fluidic features and an associated controller coupled to the apparatus and configured to perform continuous electroplating, while maintaining substantially constant concentrations of plating bath components for extended periods of use.

公开(公告)号：US20180056451A1

公开(公告)日：2018-03-01

申请号：US15303832

申请日：2016-03-23

Applicant: HITACHI METALS, LTD

Inventor： Motoki WAKANO

IPC: B23K35/30 ,  B22F1/02 ,  B22F9/08 ,  B23K35/02 ,  C25D3/12 ,  C25D3/60 ,  C25D5/34

CPC classification number: B23K35/302 ,  B22F1/02 ,  B22F1/025 ,  B22F9/08 ,  B22F9/082 ,  B22F2301/10 ,  B23K35/0244 ,  C22C9/00 ,  C23C18/54 ,  C25D3/12 ,  C25D3/60 ,  C25D5/12 ,  C25D5/34 ,  C25D7/00 ,  C25D17/16

Abstract: A metal particle having a particle diameter of 10 μm or more and 1000 μm or less and includes Cu and trace elements and a total mass content of P and S, among other trace elements, is 3 ppm or more and 30 ppm or less. A method for producing a metal particle including producing a molten metal material by melting a metal material in a crucible, wherein Cu as determined in GDMS analysis is over 99.995% and a total of P and S is 3 ppm or more and 30 ppm or less; applying a pressure of 0.05 MPa or more and 1.0 MPa or less to drip the molten metal material through an orifice, thereby producing a molten metal droplet; and rapidly solidifying the molten metal droplet using an inert gas whose oxygen concentration is 1000 ppm or less.

公开(公告)号：US20180051385A1

公开(公告)日：2018-02-22

申请号：US15802619

申请日：2017-11-03

Applicant: International Business Machines Corporation ,  Ancosys GmbH

Inventor： Charles L. Arvin ,  Jürg Stahl

IPC: C25D3/56 ,  C25D21/12 ,  C25D21/00 ,  C25D3/64 ,  C23F13/00 ,  C25D3/60 ,  C25D3/46 ,  C25D3/30 ,  C25D17/10

CPC classification number: C25D3/56 ,  C23F13/005 ,  C25D3/30 ,  C25D3/46 ,  C25D3/60 ,  C25D3/64 ,  C25D17/10 ,  C25D21/00 ,  C25D21/12

Abstract: Disclosed are an electrodeposition system and method with an anode assembly comprising a capacitor comprising a first conductive plate (i.e., an anode) with a frontside having a surface exposed to a plating solution, a second conductive plate on a backside of the first conductive plate, and a dielectric layer between the two conductive plates. During a non-plating mode, a power source, having positive and negative terminals connected to the first and second conductive plates, respectively, is turned on, thereby polarizing the first conductive plate (i.e., the anode) relative to the second conductive plate to prevent degradation of the anode and/or plating solution. During an active plating mode, another power source, having positive and negative terminals connected to the first conductive plate (i.e., the anode) and a cathode, respectively, is turned on, thereby polarizing the anode relative to the cathode in order to deposit a plated layer on a workpiece.

公开(公告)号：US09863051B2

公开(公告)日：2018-01-09

申请号：US14831252

申请日：2015-08-20

Applicant: International Business Machines Corporation ,  Ancosys GmbH

Inventor： Charles L. Arvin ,  Jürg Stahl

IPC: C25D3/56 ,  C25D21/00 ,  C23F13/00 ,  C25D3/30 ,  C25D3/46 ,  C25D21/12 ,  C25D3/60 ,  C25D3/64 ,  C25D17/10

CPC classification number: C25D3/56 ,  C23F13/005 ,  C25D3/30 ,  C25D3/46 ,  C25D3/60 ,  C25D3/64 ,  C25D17/10 ,  C25D21/00 ,  C25D21/12

Abstract: Disclosed are an electrodeposition system and method with an anode assembly comprising a capacitor comprising a first conductive plate (i.e., an anode) with a frontside having a surface exposed to a plating solution, a second conductive plate on a backside of the first conductive plate, and a dielectric layer between the two conductive plates. During a non-plating mode, a power source, having positive and negative terminals connected to the first and second conductive plates, respectively, is turned on, thereby polarizing the first conductive plate (i.e., the anode) relative to the second conductive plate to prevent degradation of the anode and/or plating solution. During an active plating mode, another power source, having positive and negative terminals connected to the first conductive plate (i.e., the anode) and a cathode, respectively, is turned on, thereby polarizing the anode relative to the cathode in order to deposit a plated layer on a workpiece.

公开(公告)号：US20170263541A1

公开(公告)日：2017-09-14

申请号：US15169194

申请日：2016-05-31

Applicant: Washington State University

Inventor： Indranath Dutta

IPC: H01L23/495 ,  C25D7/00 ,  H01L21/48 ,  C22C13/00 ,  C22F1/16 ,  C25D3/30 ,  C25D5/50

CPC classification number: H01L23/49582 ,  C22C13/00 ,  C22F1/16 ,  C25D3/30 ,  C25D3/54 ,  C25D3/60 ,  C25D5/10 ,  C25D5/34 ,  C25D5/505 ,  C25D7/00

Abstract: A method comprising incorporating indium into an entire Sn film for preventing the growth of whiskers from the Sn film, wherein the Sn film is applied to a metallic substrate. The indium is present in the entire thickness of the Sn film.

公开(公告)号：US09721913B2

公开(公告)日：2017-08-01

申请号：US15240291

申请日：2016-08-18

Applicant: CHIPMOS TECHNOLOGIES INC.

Inventor： Tung Bao Lu ,  Heng-Sheng Wang ,  Tzu-Han Hsu

IPC: H01L21/44 ,  H01L21/4763 ,  H01L23/00 ,  H01L21/324 ,  C25D7/12 ,  C25D3/60 ,  C25D3/62 ,  C25D5/50 ,  G02F1/1333 ,  H01L33/62 ,  C25D5/02 ,  C23C18/16

CPC classification number: H01L24/11 ,  C23C18/1653 ,  C25D3/60 ,  C25D3/62 ,  C25D5/02 ,  C25D5/505 ,  C25D7/123 ,  G02F1/1333 ,  H01L21/324 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/742 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L33/62 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/06102 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/92125 ,  H01L2924/00015 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/2064 ,  H01L2924/351 ,  H01L2924/0105 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2224/81411 ,  H01L2924/0665

Abstract: A semiconductor package comprises a semiconductor chip having an active surface with a conductive pad thereon; an electroplated Au—Sn alloy bump over the active surface; and a (glass) substrate comprising conductive traces electrically coupling with the electroplated Au—Sn alloy bump, wherein the electroplated Au—Sn alloy bump has a composition from about Au0.35Sn0.15 to about Au0.75Sn0.25 in weight percent uniformly distributed from an end in proximity to the active surface to an end in proximity to the substrate. A method of manufacturing a semiconductor package comprises forming patterns of conductive pads on an active surface of a semiconductor chip; electroplating Au—Sn alloy bump over the conductive pads; and bonding the semiconductor chip on a corresponding conductive trace on a substrate by a reflow operation or a thermal press operation.