公开(公告)号：US11837688B2

公开(公告)日：2023-12-05

申请号：US17051127

申请日：2019-05-08

Applicant: OSRAM OLED GmbH

Inventor： Michael Zitzlsperger

IPC: H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00 ,  H01L33/62 ,  H01L25/075 ,  H01L25/16

CPC classification number: H01L33/62 ,  H01L25/0753 ,  H01L25/167 ,  H01L27/156 ,  H01L33/005

Abstract: In an embodiment a pixel for a multi-pixel LED module includes a first light-emitting semiconductor chip having a first upper chip side and a first lead-frame section having a first upper side, a first contacting protrusion and a second contacting protrusion, wherein the first contacting protrusion and the second contacting protrusion extend from the first upper side, and wherein the first light-emitting semiconductor chip is embedded in an electrically insulating material such that the first upper side is covered by the electrically insulating material and the first upper chip side and the contacting protrusions are exposed.

公开(公告)号：US11715820B2

公开(公告)日：2023-08-01

申请号：US16966331

申请日：2019-03-12

Applicant: OSRAM OLED GmbH

Inventor： Klaus Reingruber ,  Michael Zitzlsperger ,  Matthias Goldbach

IPC: H01L33/60 ,  H01L33/54 ,  H01L33/44 ,  H01L33/46 ,  H01L33/48 ,  H01S5/02216 ,  H01S5/0234 ,  H01S5/30 ,  H01L33/50

CPC classification number: H01L33/60 ,  H01L33/54 ,  H01S5/0234 ,  H01S5/02216 ,  H01L33/50 ,  H01L2933/005 ,  H01L2933/0041 ,  H01L2933/0058 ,  H01S5/3013

Abstract: In at least one embodiment, the optoelectronic component comprises an optoelectronic semiconductor chip with an emission side and a rear side opposite the emission side. Furthermore, the component comprises a housing body with a top side and an underside opposite the top side, and a metal layer on the top side of the housing body. During proper operation, the semiconductor chip emits primary electromagnetic radiation via the emission side. The semiconductor chip is embedded in the housing body and laterally surrounded by the housing body. The emission side is on the rear side and the top side is downstream of the underside along a main emission direction of the semiconductor chip. The metal layer is at least partially reflecting or absorbing radiation generated by the optoelectronic component.

公开(公告)号：US20210050499A1

公开(公告)日：2021-02-18

申请号：US17051127

申请日：2019-05-08

Applicant: OSRAM OLED GmbH

Inventor： Michael Zitzlsperger

IPC: H01L33/62 ,  H01L25/075 ,  H01L33/00 ,  H01L27/15 ,  H01L25/16

Abstract: In an embodiment a pixel for a multi-pixel LED module includes a first light-emitting semiconductor chip having a first upper chip side and a first lead-frame section having a first upper side, a first contacting protrusion and a second contacting protrusion, wherein the first contacting protrusion and the second contacting protrusion extend from the first upper side, and wherein the first light-emitting semiconductor chip is embedded in an electrically insulating material such that the first upper side is covered by the electrically insulating material and the first upper chip side and the contacting protrusions are exposed.

公开(公告)号：US11462500B2

公开(公告)日：2022-10-04

申请号：US16962175

申请日：2019-01-23

Applicant: OSRAM OLED GmbH

Inventor： Matthias Hien ,  Matthias Goldbach ,  Michael Zitzlsperger ,  Ludwig Peyker

IPC: H01L23/00 ,  H01L25/04 ,  H01L25/075 ,  H01L25/16 ,  H01L31/02 ,  H01L33/62 ,  H01L31/0203 ,  H01L33/52 ,  H01L33/60

Abstract: In one embodiment, an optoelectronic semiconductor device includes at least two lead frame parts and an optoelectronic semiconductor chip which is mounted in a mounting region on one of the lead frame parts. The lead frame parts are mechanically connected to one another via a casting body. The semiconductor chip is embedded in the cast body. In the mounting region the respective lead frame part has a reduced thickness. An electrical line is led over the cast body from the semiconductor chip to a connection region of the other of the lead frame parts. In the connection region, the respective lead frame part has the full thickness. From the connection region to the semiconductor chip the electrical line does not overcome any significant difference in height.

公开(公告)号：US11450794B2

公开(公告)日：2022-09-20

申请号：US16639722

申请日：2018-07-23

Applicant: OSRAM OLED GmbH

Inventor： Paola Altieri-Weimar ,  Ingo Neudecker ,  Michael Zitzlsperger ,  Stefan Groetsch ,  Holger Klassen

IPC: H01L33/62 ,  H01L33/00 ,  H01L33/38

Abstract: A carrier and a component are disclosed. In an embodiment a component includes a semiconductor chip including a substrate and a semiconductor body arranged thereon and a metallic carrier having a coefficient of thermal expansion which is at least 1.5 times greater than a coefficient of thermal expansion of the substrate or of the semiconductor chip, wherein the semiconductor chip is attached to a mounting surface of the metallic carrier by a connection layer such that the connection layer is located between the semiconductor chip and a buffer layer and adjoins a rear side of the semiconductor chip, wherein the buffer layer has a yield stress which is at least 10 MPa and at most 300 MPa, and wherein the substrate of the semiconductor chip and the metallic carrier of the component have a higher yield stress than the buffer layer.

公开(公告)号：US20200235271A1

公开(公告)日：2020-07-23

申请号：US16639722

申请日：2018-07-23

Applicant: OSRAM OLED GmbH

Inventor： Paola Altieri-Weimar ,  Ingo Neudecker ,  Michael Zitzlsperger ,  Stefan Groetsch ,  Holger Klassen

IPC: H01L33/62 ,  H01L33/38 ,  H01L33/00

Abstract: A carrier and a component are disclosed. In an embodiment a component includes a semiconductor chip including a substrate and a semiconductor body arranged thereon and a metallic carrier having a coefficient of thermal expansion which is at least 1.5 times greater than a coefficient of thermal expansion of the substrate or of the semiconductor chip, wherein the semiconductor chip is attached to a mounting surface of the metallic carrier by a connection layer such that the connection layer is located between the semiconductor chip and a buffer layer and adjoins a rear side of the semiconductor chip, wherein the buffer layer has a yield stress which is at least 10 MPa and at most 300 MPa, and wherein the substrate of the semiconductor chip and the metallic carrier of the component have a higher yield stress than the buffer layer.