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1.发明授权
公开(公告)号：US5055843A
公开(公告)日：1991-10-08
申请号：US472706
申请日：1990-01-31
摘要： A separate filter circuit is inserted between the D/A converter and the summing junction in the feedback path of a conventional sigma delta modulator. This additional filter allows control of the quantization noise transfer function profile independently of the forward signal transfer function. By proper tailoring of the transfer functions a third or higher order modulator can be constructed without instability developing.
摘要翻译： 在常规Σ-Δ调制器的反馈路径中的D / A转换器和求和结点之间插入单独的滤波电路。 该附加滤波器允许独立于正向信号传递函数来控制量化噪声传递函数谱。 通过适当调整传递函数，可以构建第三个或更高阶的调制器，而不会产生不稳定的发展。
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公开(公告)号：US5311181A
公开(公告)日：1994-05-10
申请号：US60890
申请日：1993-05-12
CPC分类号： H03G3/02 , H03M3/454 , H03M7/3035 , H03M3/43 , H03M3/446 , H03M3/45 , H03M7/3028 , H03M7/304
摘要： A separate filter circuit is inserted between the D/A converter and the summing junction in the feedback path of a conventional sigma delta modulator. This additional filter allows control of the quantization noise transfer function profile independently of the forward signal transfer function. By proper tailoring of the transfer functions a third or higher order modulator can be constructed without instability developing. The modulator can also be constructed as a completely digital circuit and used as a noise shaping circuit in a digital digital-to-analog converter.
摘要翻译： 在常规Σ-Δ调制器的反馈路径中的D / A转换器和求和结点之间插入单独的滤波电路。 该附加滤波器允许独立于正向信号传递函数来控制量化噪声传递函数谱。 通过适当调整传递函数，可以构建第三个或更高阶的调制器，而不会产生不稳定的发展。 调制器也可以构造为完全数字电路，并用作数字数/模转换器中的噪声整形电路。
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公开(公告)号：US5331221A
公开(公告)日：1994-07-19
申请号：US110327
申请日：1993-08-23
CPC分类号： H03F1/3211 , H03F1/223 , H03F3/45076
摘要： Gain linearity problems caused by impact ionization in a active MOS device are avoided by connecting an MOS shield device in series with the active MOS device so that the overall supply voltage is split across two devices, keeping both devices in a region of operation well below where impact ionization becomes a significant problem. The gate of the MOS shield device is maintained at a voltage proportional to its drain voltage, thereby keeping the device in the saturation mode and avoiding an abrupt mode change associated with prior art shield circuits.
摘要翻译： 通过将MOS屏蔽器件与有源MOS器件串联连接来避免由于在有源MOS器件中产生的冲击电离引起的增益线性问题，使得整个电源电压在两个器件之间分离，从而将两个器件保持在低于 冲击电离成为一个重大问题。 MOS屏蔽器件的栅极保持与其漏极电压成比例的电压，从而保持器件处于饱和模式，并避免与现有技术的屏蔽电路相关的突然模式变化。
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公开(公告)号：US5517149A
公开(公告)日：1996-05-14
申请号：US259858
申请日：1994-06-15
CPC分类号： H03F1/3211 , H03F1/223 , H03F3/45076
摘要： Gain linearity problems caused by impact ionization in a active MOS device are avoided by connecting an MOS shield device in series with the active MOS device so that the overall supply voltage is split across two devices, keeping both devices in a region of operation well below where impact ionization becomes a significant problem. The gate of the MOS shield device is maintained at a voltage proportional to its drain voltage, thereby keeping the device in the saturation mode and avoiding an abrupt mode change associated with prior art shield circuits.
摘要翻译： 通过将MOS屏蔽器件与有源MOS器件串联连接来避免由于在有源MOS器件中产生的冲击电离引起的增益线性问题，使得整个电源电压在两个器件之间分离，从而将两个器件保持在低于 冲击电离成为一个重大问题。 MOS屏蔽器件的栅极保持与其漏极电压成比例的电压，从而保持器件处于饱和模式，并避免与现有技术的屏蔽电路相关的突然模式变化。
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公开(公告)号：US4581545A
公开(公告)日：1986-04-08
申请号：US538945
申请日：1983-10-04
IPC分类号： H03K3/353 , H03K3/0232 , H03K3/0233 , H03K3/3565 , H03K3/295
CPC分类号： H03K3/3565 , H03K3/02337
摘要： A Schmitt trigger circuit 10 includes a pair of transmission gates 20, 22 connected, respectively, between a pair of threshold voltages V.sub.tH, V.sub.tL and the threshold input port 16 of a comparator 12. The control lead of one transmission gate 20 is connected to the output 18 of the comparator 12 through an inverter 24. The control lead of the other transmission gate 22 is connected directly to the output 18 of the comparator 12. The other input port 14 of the comparator 12 receives the signal input. Also disclosed is a circuit 26 for generating the reference voltages V.sub.tH, V.sub.tL. The circuit 26 includes an operational amplifier 28 driving a complementary pair of current mirrors (M1, M3, M5; M4, M6) which force current through a pair of resistors (R.sub.H, R.sub.L) to ground potential. The resistors (R.sub.H, R.sub.L) provide stable reference potentials.
摘要翻译： 施密特触发电路10包括分别连接在一对阈值电压VtH，VtL和比较器12的阈值输入端口16之间的一对传输门20,22。一个传输门20的控制引线连接到 输出18通过反相器24.另一传输门22的控制引线直接连接到比较器12的输出端18.比较器12的另一个输入端口14接收信号输入端。 还公开了用于产生参考电压VtH，VtL的电路26。 电路26包括驱动互补的一对电流镜（M1，M3，M5; M4，M6）的运算放大器28，其将电流通过一对电阻器（RH，RL）施加到接地电位。 电阻（RH，RL）提供稳定的参考电位。
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公开(公告)号：US4677322A
公开(公告)日：1987-06-30
申请号：US641400
申请日：1984-08-16
摘要： A voltage comparator (10) includes two sampled input networks connected inarallel between an input reference voltage (Vref) and the inverting input (16) of an integrator (12,14), the other input (18) of which is grounded. The first input network has a first input capacitor (C1) which is through-switched at a first sampling frequency (F1). The second input network has a second input capacitor which is diagonally-switched at a second sampling frequency (F2), thus providing an output voltage to the integrator (12,14) which is of opposite polarity to that of the first network. For a given ratio between the capacitors (C1,C2), the output (15) of the integrator is determined by the relationship between the sampling frequencies (F1,F2), thus providing a comparator capability. Also disclosed is a frequency lock loop (34) in which the output (Vcontrol) of a frequency comparator (38) is filtered of the switching frequencies and utilized as the control voltage for a voltage controlled oscillator (42). The output of the oscillator is then coupled to a switching pulse generator (44) which provides the switching pulses (F2,F2N) to the second input network of the comparator (38).
摘要翻译： 电压比较器（10）包括在输入参考电压（Vref）和积分器（12,14）的反相输入端（16）之间并联连接的两个采样输入网络，其另一个输入端（18）接地。 第一输入网络具有以第一采样频率（F1）进行通过交换的第一输入电容器（C1）。 第二输入网络具有以第二采样频率（F2）对角线切换的第二输入电容器，从而向积分器（12,14）提供与第一网络相反极性的输出电压。 对于电容器（C1，C2）之间的给定比例，积分器的输出（15）由采样频率（F1，F2）之间的关系确定，从而提供比较器能力。 还公开了一种频率锁定环（34），其中频率比较器（38）的输出（Vcontrol）被滤波开关频率，并用作压控振荡器（42）的控制电压。 然后，振荡器的输出被耦合到开关脉冲发生器（44），该开关脉冲发生器（44）向比较器（38）的第二输入网络提供开关脉冲（F2，F2N）。
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公开(公告)号：US4573099A
公开(公告)日：1986-02-25
申请号：US626230
申请日：1984-06-29
IPC分类号： H02H9/04 , H01L21/8234 , H01L27/02 , H01L27/088 , H03K3/356 , H03K17/08 , H03K17/0814
CPC分类号： H03K3/356104 , H01L27/0251 , H03K17/08142
摘要： A CMOS circuit (10) for preventing overvoltage between two supply nodes (12,14) makes use of vertical NPN bipolar transistors (80,84) for their current-carrying capability. Zener diodes (16,18,20,22) and a resistor (24) generate a sensing voltage which is amplified by a vertical bipolar transistor (28) and coupled to one input of a comparator (40) which has the other input at a bias voltage node (52) of a voltage divider (54,56,58,60). The comparator output (50) is coupled to the input of a transimpedance transistor (72) which drives the input current of a current mirror (66,74). The output (78) of the current mirror turns on the current-carrying transistors (80,84). Positive feedback for latching is provided by connecting the common gates of the current mirror transistors to the gate of a feedback transistor (86) which has its current path connected between the one supply node and the base (26) of the first bipolar transistor. The vertical bipolar transistors (28,80,84) of the circuit include guard rings (37) of heavily doped material about the emitter (32) and base (34) regions at the surface and tied to the collector voltage.
摘要翻译： 用于防止两个电源节点（12,14）之间的过电压的CMOS电路（10）利用垂直NPN双极晶体管（80,84）来承载能力。 齐纳二极管（16,18,20,22）和电阻器（24）产生感测电压，其被垂直双极晶体管（28）放大并耦合到比较器（40）的一个输入，比较器（40）的另一个输入端 分压器（54,56,58,60）的偏置电压节点（52）。 比较器输出（50）耦合到驱动电流镜（66,74）的输入电流的跨阻晶体管（72）的输入端。 电流镜的输出（78）导通载流晶体管（80,84）。 通过将电流镜晶体管的公共栅极连接到其电流路径连接在第一双极晶体管的一个电源节点和基极（26）之间的反馈晶体管（86）的栅极来提供用于锁存的正反馈。 电路的垂直双极晶体管（28,80,84）包括围绕发射极（32）和表面处的基极（34）区域的重掺杂材料的保护环（37），并连接到集电极电压。
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公开(公告)号：US4554515A
公开(公告)日：1985-11-19
申请号：US628582
申请日：1984-07-06
CPC分类号： H03F3/3022 , H03F3/3023 , H03F3/45179 , H03F3/4521 , H03F2203/30033 , H03F2203/30087 , H03F2203/30153 , H03F2203/45188 , H03F2203/45192 , H03F2203/45224 , H03F2203/45658 , H03F2203/45674
摘要： Two input stages (10,12) are interconnected so that their input common mode voltage ranges to one side of signal ground are combined to provide a common mode voltage range substantially equal to the supply voltage. One stage has N-channel differential input transistors (N1,N2), while the other stage has P-channel differential input transistors (P3,P4). The input current branches of the stages are interconnected by current mirror transistors (N6,N7) so that signal current is shared. The output (22) is taken from one branch of the N-type stage (10) and coupled to an output stage (24) with frequency compensation (C,R).
摘要翻译： 两个输入级（10,12）互连，使得它们的输入共模电压范围到信号地的一侧被组合以提供基本上等于电源电压的共模电压范围。 一级具有N沟道差分输入晶体管（N1，N2），而另一级具有P沟道差分输入晶体管（P3，P4）。 级的输入电流分支通过电流镜晶体管（N6，N7）互连，使信号电流共享。 输出（22）取自N型级（10）的一个分支，并与频率补偿（C，R）耦合到输出级（24）。
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公开(公告)号：US20110121782A1
公开(公告)日：2011-05-26
申请号：US12623841
申请日：2009-11-23
申请人： Douglas G. Marsh , Apparajan Ganesan , Ashok Raghunathrao Saraf , Kishore Chandrakant Jambhekar
发明人： Douglas G. Marsh , Apparajan Ganesan , Ashok Raghunathrao Saraf , Kishore Chandrakant Jambhekar
CPC分类号： H02J7/022 , B25F5/021 , H02J7/0045
摘要： The present invention is an ac-to-dc adaptor capable of driving the drill unit of a cordless drill. In the preferred embodiment, the adaptor has essentially the same look and feel as the battery pack normally used with a cordless drill. The adaptor contains conventional electronics to convert an ac line power input into a dc output sufficient to power the drill unit. The invention applies to other cordless tools as well.
摘要翻译： 本发明是能够驱动无绳钻机的钻机单元的交流 - 直流适配器。 在优选实施例中，适配器具有与通常与无绳电钻一起使用的电池组基本相同的外观和感觉。 适配器包含常规电子设备，用于将交流线路电力输入转换成足以为钻机供电的直流输出。 本发明也适用于其它无绳工具。
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公开(公告)号：US06219107B1
公开(公告)日：2001-04-17
申请号：US09139038
申请日：1998-08-24
申请人： Karl H. Renner , Apparajan Ganesan
发明人： Karl H. Renner , Apparajan Ganesan
IPC分类号： H04N552
CPC分类号： H04N5/52
摘要： A video decoder circuit is provided with automatic AGC bias voltage calibration. The video decoder circuit has an input for receiving a video signal that is capacitively coupled to an analog front-end circuit. The decoder circuit includes a microprocessor-based control circuit coupled to the analog front-end circuit. The control circuit includes a bias circuit, a gain interface circuit for changing the amplitude of the video signal prior to filtering in a filter circuit, an offset circuit for changing the DC-level shift of the video signal, and a switching circuit for switching into a calibration mode by bypassing the filter circuit and connecting the gain interface circuit directly to an analog-to-digital conversion circuit of the analog front-end circuit.
摘要翻译： 视频解码器电路具有自动AGC偏置电压校准。 视频解码器电路具有用于接收与模拟前端电路电容耦合的视频信号的输入。 解码器电路包括耦合到模拟前端电路的基于微处理器的控制电路。 控制电路包括偏置电路，用于在滤波电路中滤波之前改变视频信号的幅度的增益接口电路，用于改变视频信号的直流电平偏移的偏移电路，以及切换电路 通过旁路滤波器电路并将增益接口电路直接连接到模拟前端电路的模拟 - 数字转换电路的校准模式。
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