公开(公告)号：US4803181A

公开(公告)日：1989-02-07

申请号：US26799

申请日：1987-03-17

申请人： Peter L. Buchmann ,  Peter Vettiger ,  Bart J. Van Zeghbroech

发明人： Peter L. Buchmann ,  Peter Vettiger ,  Bart J. Van Zeghbroech

IPC分类号： H01L21/30 ,  G03F7/40 ,  H01L21/027 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/265

CPC分类号： G03F7/405 ,  Y10S148/051 ,  Y10S148/111 ,  Y10S148/137 ,  Y10S438/947 ,  Y10S438/948 ,  Y10S438/949 ,  Y10S438/95

摘要： A process for forming sidewalls for use in the fabrication of semiconductor structures, where the thin, vertical sidewalls are "image transferred" to define sub-micron lateral dimensions.First, a patterned resist profile with substantially vertical edges is formed on a substrate on which the sidewalls are to be created. Then, the profile is soaked in a reactive organometallic silylation agent to silylate the top and the vertical edges of the resist to a predetermined depth, thereby rendering the profile surfaces highly oxygen etch resistant. In a subsequent anisotropic RIE process, the horizontal surfaces of the silylated profile and the unsilylated resist are removed, leaving the silylated vertical edges, that provide the desired free-standing sidewalls, essentially unaffected.

摘要翻译： 用于形成用于制造半导体结构的侧壁的方法，其中薄的垂直侧壁被“图像转印”以限定亚微米横向尺寸。 首先，在其上将形成侧壁的基板上形成具有基本垂直边缘的图案化抗蚀剂轮廓。 然后，将该轮廓浸泡在反应性有机金属硅烷化剂中以将抗蚀剂的顶部和垂直边缘甲硅烷化至预定深度，从而使轮廓表面具有高耐氧蚀刻性。 在随后的各向异性RIE过程中，去除了甲硅烷基化曲线和未磺酰化的抗蚀剂的水平表面，留下提供所需的独立侧壁的甲硅烷基化的垂直边缘基本上不受影响。

公开(公告)号：US5032219A

公开(公告)日：1991-07-16

申请号：US533748

申请日：1990-06-06

申请人： Peter L. Buchmann ,  Peter Vettiger ,  Otto Voegeli ,  David J. Webb

发明人： Peter L. Buchmann ,  Peter Vettiger ,  Otto Voegeli ,  David J. Webb

IPC分类号： H01L21/302 ,  G02B6/122 ,  H01L21/3065 ,  H01L27/15 ,  H01S5/00 ,  H01S5/02 ,  H01S5/028 ,  H01S5/16 ,  H01S5/22

CPC分类号： H01S5/22 ,  H01S5/028 ,  H01S5/16 ,  H01S5/0202 ,  H01S5/0203

摘要： A method, and device produced therewith, for improving the planarity of etched mirror facets 18 of integrated optic structures with non-planar stripe waveguides, such as ridge or groove diode lasers or passive devices such as modulators and switches. The curvature of the mirror facet surface at the edges of the waveguide due to topographical, lithographical and etch process effects, causes detrimental phase distortions, and is avoided by widening the waveguide end near the mirror surface thereby shifting the curved facet regions away from the light mode region to surface regions where curvature is not critical.

公开(公告)号：US5177031A

公开(公告)日：1993-01-05

申请号：US707557

申请日：1991-05-30

申请人： Peter L. Buchmann ,  David J. Webb ,  Peter Vettiger

发明人： Peter L. Buchmann ,  David J. Webb ,  Peter Vettiger

IPC分类号： H01L21/308 ,  H01L21/306 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01S5/00 ,  H01S5/02 ,  H01S5/028

CPC分类号： H01L21/02052 ,  H01L21/02178 ,  H01L21/02266 ,  H01L21/02307 ,  H01L21/314 ,  H01L21/31616 ,  H01L21/3185 ,  H01S5/028 ,  H01S5/0203 ,  H01S5/0282 ,  Y10S438/958

摘要： A method of passivating etched mirror facets of semiconductor laser diodes which enhances device reliability.The etched mirror facet is first subjected to a weet-etch process to substantially remove any native oxide as well as any surface layer which may have been mechanically damaged during the preceding mirror etch process. Then, a passivation pre-treatment is applied whereby any residual oxygen is removed and a sub-monolayer is formed which permanently reduces the non-radiative recombination of minority carriers at the mirror facet. Finally, the pre-treated mirror surface is coated with a passivation layer to avoid any environmental effect on the mirror.

摘要翻译： 钝化半导体激光二极管的蚀刻镜面的方法，这增强了器件的可靠性。 蚀刻的镜面首先经受蚀刻蚀刻工艺，以基本上除去任何自然氧化物以及在前面的镜蚀刻工艺期间可能被机械损坏的任何表面层。 然后，施加钝化预处理，由此除去任何残留的氧，并且形成亚单层，其永久地减少在镜面处的少数载流子的非辐射复合。 最后，预处理的镜面涂有钝化层，以避免对镜子产生任何环境影响。

公开(公告)号：US5103493A

公开(公告)日：1992-04-07

申请号：US669817

申请日：1991-03-15

申请人： Peter L. Buchmann ,  Peter Vettiger ,  Otto Voegeli ,  David J. Webb

发明人： Peter L. Buchmann ,  Peter Vettiger ,  Otto Voegeli ,  David J. Webb

IPC分类号： H01L21/302 ,  G02B6/122 ,  H01L21/3065 ,  H01L27/15 ,  H01S5/00 ,  H01S5/02 ,  H01S5/028 ,  H01S5/16 ,  H01S5/22

CPC分类号： H01S5/22 ,  H01S5/028 ,  H01S5/16 ,  H01S5/0202 ,  H01S5/0203

摘要： A method, and device produced therewith, for improving the planarity of etched mirror facets 18 of integrated optic structures with non-planar stripe waveguides, such as ridge or groove diode lasers or passive devices such as modulators and switches. The curvature of the mirror facet surface at the edges of the waveguide due to topographical, lithographical and etch process effects, causes detrimental phase distortions, and is avoided by widening the waveguide end near the mirror surface thereby shifting the curved facet regions away from the light mode region to surface regions where curvature is not critical.

摘要翻译： 一种用于改进具有非平面条纹波导的集成光学结构的蚀刻镜面18（例如脊或沟槽二极管激光器）或无源器件（诸如调制器和开关）的平面度的方法和装置。 由于地形，光刻和蚀刻过程效应，波导边缘处的镜面表面的曲率造成有害的相位失真，并且通过加宽靠近镜面的波导端来避免，从而使弯曲的小面区域远离光线 模式区域到曲面不重要的表面区域。

公开(公告)号：US4732871A

公开(公告)日：1988-03-22

申请号：US31648

申请日：1987-03-30

申请人： Peter L. Buchmann ,  Volker Graf ,  Peter D. Hoh ,  Theodor O. Mohr ,  Peter Vettiger

发明人： Peter L. Buchmann ,  Volker Graf ,  Peter D. Hoh ,  Theodor O. Mohr ,  Peter Vettiger

IPC分类号： H01L21/033 ,  H01L21/285 ,  H01L21/311 ,  H01L21/318 ,  H01L21/336 ,  H01L21/338 ,  H01L29/812 ,  H01L21/265

CPC分类号： H01L29/66871 ,  H01L21/0337 ,  H01L21/28587 ,  H01L21/31111 ,  H01L21/3185 ,  H01L29/66545

摘要： Process for producing temperature-stable undercut profiles for use in semiconductor fabrication. The process is based on the phenomenon of high etch-rate selectivity between RF- and LF- PECVD-grown silicon nitride films (12G and 13G, respectively) that are deposited on top of each other. By choosing proper film and process parameters, these PECVD nitride structures can be made stress-free: the tensile stress of the RF film (12G) compensates the compressive stress of the LF film (13G).Also disclosed is an application of a T-shaped structure (15), produced with the new process, in a method for fabricating fully self-aligned "dummy" gate sub-micron MESFETs.

公开(公告)号：US20130133433A1

公开(公告)日：2013-05-30

申请号：US13699667

申请日：2011-05-09

申请人： Genki Yoshikawa ,  Heinrich Rohrer ,  Terunobu Akiyama ,  Peter Vettiger

发明人： Genki Yoshikawa ,  Heinrich Rohrer ,  Terunobu Akiyama ,  Peter Vettiger

IPC分类号： G01L1/18

CPC分类号： G01L1/18 ,  G01N29/022 ,  G01N2291/02466

摘要： Deflection of a free end of one plate-like member, that is caused by uniform stress, is transmitted to the other plate-like member by moving a free end of the other plate-like member. According to this configuration, the uniform stress applied to the one plate-like member is converted into stress induced by a point force in the other plate-like member, and then, the induced stress is concentrated on a fixed end side narrow portion in which a piezoresistor is provided. Thus, a novel structure for a piezoresistive surface stress sensor having high sensitivity to uniform stress applied to the surface of the sensor is provided.

摘要翻译： 由均匀的应力引起的一个板状构件的自由端的偏移通过移动另一个板状构件的自由端而被传递到另一个板状构件。 根据该结构，施加到一个板状构件的均匀的应力被转换为由另一个板状构件中的点力引起的应力，然后，感应应力集中在固定端侧窄部， 提供一个压敏电阻。 因此，提供了对施加到传感器的表面的均匀应力具有高灵敏度的压阻表面应力传感器的新型结构。

公开(公告)号：US07713789B2

公开(公告)日：2010-05-11

申请号：US11852317

申请日：2007-09-09

申请人： Thomas J. Brunschwiler ,  Michel Despont ,  Mark A. Lantz ,  Bruno Michel ,  Peter Vettiger

发明人： Thomas J. Brunschwiler ,  Michel Despont ,  Mark A. Lantz ,  Bruno Michel ,  Peter Vettiger

IPC分类号： H01L21/00

CPC分类号： H01L21/4882 ,  H01L21/4871 ,  H01L21/4875 ,  H01L23/3677 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/09701 ,  H01L2924/1461 ,  H01L2924/00

摘要： Provides semiconductor devices and method for fabricating devices having a high thermal dissipation efficiency. An example device comprises a thermally conducting structure attached to a surface of the semiconductor device via soldering. The thermally conducting structure is essentially formed of a thermally conducting material and comprises an array of freestanding fins, studs or frames, or a grid of connected fins. A process for fabricating such a semiconductor device includes forming a thermally conducting structure on a carrier and attaching the thermally conducting structure formed on the carrier to a surface of the semiconductor device via soldering.

摘要翻译： 提供用于制造具有高散热效率的器件的半导体器件和方法。 示例性装置包括通过焊接附接到半导体器件的表面的导热结构。 导热结构基本上由导热材料形成，并且包括独立的翅片，螺柱或框架的阵列或连接的翅片的格栅。 制造这种半导体器件的方法包括在载体上形成导热结构，并通过焊接将形成在载体上的导热结构附着在半导体器件的表面上。

公开(公告)号：US20080225679A1

公开(公告)日：2008-09-18

申请号：US12131231

申请日：2008-06-02

申请人： Gerd K. Binning ,  Walter Haeberle ,  Peter Vettiger

发明人： Gerd K. Binning ,  Walter Haeberle ,  Peter Vettiger

IPC分类号： G11B9/00

CPC分类号： B82Y10/00 ,  G11B9/14 ,  G11B11/007 ,  G11B13/00

摘要： A method for writing data to and/or reading data from locations on a surface via a tip comprises moving the tip between the locations on the surface. At each location, energy is selectively applied to the surface via the tip and the tip and the surface are selectively forced together in synchronization with the application of energy.

摘要翻译： 通过尖端将数据写入和/或从表面上的位置读取数据的方法包括在表面上的位置之间移动尖端。 在每个位置，通过尖端选择性地将能量施加到表面，并且尖端和表面与能量的施加同步地选择性地强制在一起。

公开(公告)号：US07180847B2

公开(公告)日：2007-02-20

申请号：US10669851

申请日：2003-09-23

申请人： Gerd K. Binnig ,  Walter Haeberle ,  Peter Vettiger

发明人： Gerd K. Binnig ,  Walter Haeberle ,  Peter Vettiger

IPC分类号： G11B9/00

CPC分类号： B82Y10/00 ,  G11B9/14 ,  G11B9/1409 ,  G11B9/1418 ,  G11B25/06 ,  G11B25/063

摘要： In accordance with the present invention, there is provided an apparatus comprising a tape having an information layer on which information is storable in the form of perturbations, an array of probes that in function faces the tape such that the probes scan the surface of the tape, means for selectively forming the perturbations via the probes, means for detecting the presence of the perturbations via the probes, and drive means for moving the tape relative to the array of probes. The apparatus allows to store high data capacities at a small form factor.

摘要翻译： 根据本发明，提供了一种装置，包括具有信息层的信息层，信息层可以以扰动的形式存储在信息层上，探针的阵列在功能上面向带，使得探针扫描带的表面 用于选择性地通过探针形成扰动的装置，用于检测经由探针的扰动的存在的装置，以及用于相对于探针阵列移动带的驱动装置。 该设备允许以小尺寸存储高数据容量。

公开(公告)号：US07057746B2

公开(公告)日：2006-06-06

申请号：US09952773

申请日：2001-09-14

申请人： Gerd K. Binnig ,  Walter Häberle ,  Peter Vettiger

发明人： Gerd K. Binnig ,  Walter Häberle ,  Peter Vettiger

IPC分类号： H04N1/40

CPC分类号： H02N2/021

摘要： An apparatus and method for moving a first object relative to a second object is provided. One of the first and second objects is moved and thereby guided by a tracking device. The tracking device uses a pattern on the first object and/or second object and a releasable clamping device for holding the first and second object in contact. The first and second object can then be releasably clamped such that the patterns match and the clamping device holds the first and second object in a position defined by the pattern. This invention is particularly well suited for nanomechanical or micromechanical applications.