Methods and systems for handling malicious attacks in a wireless communication system
    1.
    发明授权
    Methods and systems for handling malicious attacks in a wireless communication system 有权
    在无线通信系统中处理恶意攻击的方法和系统

    公开(公告)号:US09344894B2

    公开(公告)日:2016-05-17

    申请号:US14176784

    申请日:2014-02-10

    摘要: Certain aspects of the present disclosure relate to methods and apparatuses for handling malicious attacks. In one aspect, the methods and apparatuses are configured to identify packets received from a malicious source based at least in part on packets received by a wireless device that change a state of the wireless device from a dormant state to a connected state, selectively disconnect the wireless device from a packet data network (PDN) by releasing a first Internet Protocol (IP) address used to connect the wireless device to the PDN when a number of packets identified as received from the malicious source reaches a threshold number within a monitoring period, and reconnect the wireless device to the PDN using a second IP address that is different from the first IP address. In another aspect, a connection to an IP Multimedia Subsystem (IMS) PDN is maintained after the PDN is disconnected.

    摘要翻译: 本公开的某些方面涉及用于处理恶意攻击的方法和装置。 在一个方面,所述方法和装置被配置为至少部分地基于由无线设备接收的分组将恶意源接收的分组识别,所述分组将无线设备的状态从休眠状态改变为连接状态,选择性地断开 无线设备从分组数据网络(PDN)通过在监视期间内识别为从恶意源接收到的数量的分组达到阈值数目时释放用于将无线设备连接到PDN的第一互联网协议(IP)地址, 并且使用与第一IP地址不同的第二IP地址将无线设备重新连接到PDN。 在另一方面,在PDN断开连接之后,维护与IP多媒体子系统(IMS)PDN的连接。

    CIRCUITS AND METHODS PROVIDING STATE INFORMATION PRESERVATION DURING POWER SAVING OPERATIONS
    2.
    发明申请
    CIRCUITS AND METHODS PROVIDING STATE INFORMATION PRESERVATION DURING POWER SAVING OPERATIONS 有权
    节电操作期间提供状态信息保存的电路和方法

    公开(公告)号:US20160246356A1

    公开(公告)日:2016-08-25

    申请号:US14630392

    申请日:2015-02-24

    IPC分类号: G06F1/32

    摘要: Methods, systems, and circuits for preserving state information during power saving operations are disclosed. One example embodiment includes a circuit having a processing core, where the processing core includes logic processing circuits as well as circuits (e.g., flip-flops registers) that are used to store state information in the processing core. The logic processing circuits have power connections to a power rail that are subject to a switch, which can disconnect the power connections from the power rail. The circuits that are used to store state information have different power connections that are subject to a different switch. Therefore, the logic processing circuits and the state information circuits can be separately power-collapsed.

    摘要翻译: 公开了用于在省电操作期间保持状态信息的方法,系统和电路。 一个示例实施例包括具有处理核心的电路,其中处理核心包括逻辑处理电路以及用于在处理核心中存储状态信息的电路(例如,触发器寄存器)。 逻辑处理电路具有经受切换的电力轨的电​​力连接,这可以将电力连接从电力轨道断开。 用于存储状态信息的电路具有不同的电源连接,这些电源连接受不同的开关的影响。 因此,逻辑处理电路和状态信息电路可以单独断电。

    METHODS AND SYSTEMS FOR HANDLING MALICIOUS ATTACKS IN A WIRELESS COMMUNICATION SYSTEM
    3.
    发明申请
    METHODS AND SYSTEMS FOR HANDLING MALICIOUS ATTACKS IN A WIRELESS COMMUNICATION SYSTEM 有权
    在无线通信系统中处理恶意攻击的方法和系统

    公开(公告)号:US20150230091A1

    公开(公告)日:2015-08-13

    申请号:US14176784

    申请日:2014-02-10

    IPC分类号: H04W12/08 H04L29/06 H04L12/26

    摘要: Certain aspects of the present disclosure relate to methods and apparatuses for handling malicious attacks. In one aspect, the methods and apparatuses are configured to identify packets received from a malicious source based at least in part on packets received by a wireless device that change a state of the wireless device from a dormant state to a connected state, selectively disconnect the wireless device from a packet data network (PDN) by releasing a first Internet Protocol (IP) address used to connect the wireless device to the PDN when a number of packets identified as received from the malicious source reaches a threshold number within a monitoring period, and reconnect the wireless device to the PDN using a second IP address that is different from the first IP address. In another aspect, a connection to an IP Multimedia Subsystem (IMS) PDN is maintained after the PDN is disconnected.

    摘要翻译: 本公开的某些方面涉及用于处理恶意攻击的方法和装置。 在一个方面,所述方法和装置被配置为至少部分地基于由无线设备接收的分组将恶意源接收的分组识别,所述分组将无线设备的状态从休眠状态改变为连接状态,选择性地断开 无线设备从分组数据网络(PDN)通过在监视期间内识别为从恶意源接收到的数量的分组达到阈值数目时释放用于将无线设备连接到PDN的第一互联网协议(IP)地址, 并且使用与第一IP地址不同的第二IP地址将无线设备重新连接到PDN。 在另一方面,在PDN断开连接之后,维护与IP多媒体子系统(IMS)PDN的连接。

    Thermal mitigation in devices with multiple processing units

    公开(公告)号:US10528117B2

    公开(公告)日:2020-01-07

    申请号:US14579660

    申请日:2014-12-22

    摘要: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

    Circuits and methods providing state information preservation during power saving operations
    8.
    发明授权
    Circuits and methods providing state information preservation during power saving operations 有权
    在省电操作期间提供状态信息保存的电路和方法

    公开(公告)号:US09582068B2

    公开(公告)日:2017-02-28

    申请号:US14630392

    申请日:2015-02-24

    IPC分类号: G06F1/32

    摘要: Methods, systems, and circuits for preserving state information during power saving operations are disclosed. One example embodiment includes a circuit having a processing core, where the processing core includes logic processing circuits as well as circuits (e.g., flip-flops registers) that are used to store state information in the processing core. The logic processing circuits have power connections to a power rail that are subject to a switch, which can disconnect the power connections from the power rail. The circuits that are used to store state information have different power connections that are subject to a different switch. Therefore, the logic processing circuits and the state information circuits can be separately power-collapsed.

    摘要翻译: 公开了用于在省电操作期间保持状态信息的方法,系统和电路。 一个示例实施例包括具有处理核心的电路,其中处理核心包括逻辑处理电路以及用于在处理核心中存储状态信息的电路(例如,触发器寄存器)。 逻辑处理电路具有经受切换的电力轨的电​​力连接,这可以将电力连接从电力轨道断开。 用于存储状态信息的电路具有不同的电源连接,这些电源连接受不同的开关的影响。 因此,逻辑处理电路和状态信息电路可以单独断电。

    Thermal mitigation in devices with multiple processing units

    公开(公告)号:US11340689B2

    公开(公告)日:2022-05-24

    申请号:US16674494

    申请日:2019-11-05

    摘要: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

    Thermal Mitigation in Devices with Multiple Processing Units

    公开(公告)号:US20200073468A1

    公开(公告)日:2020-03-05

    申请号:US16674494

    申请日:2019-11-05

    摘要: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.