公开(公告)号：US20180103199A1

公开(公告)日：2018-04-12

申请号：US15718581

申请日：2017-09-28

Applicant: QUALCOMM Incorporated

Inventor： Fnu HENDRY ,  Ye-Kui WANG

IPC: H04N5/232 ,  H04N21/218 ,  H04N21/2662 ,  H04N19/61 ,  H04N21/81 ,  H04N21/2343 ,  H04N21/84

CPC classification number: H04N5/23238 ,  H04L67/02 ,  H04N19/103 ,  H04N19/162 ,  H04N19/172 ,  H04N19/33 ,  H04N19/61 ,  H04N19/70 ,  H04N21/21805 ,  H04N21/2343 ,  H04N21/234318 ,  H04N21/234327 ,  H04N21/23439 ,  H04N21/2662 ,  H04N21/440227 ,  H04N21/440245 ,  H04N21/816 ,  H04N21/84 ,  H04N21/845 ,  H04N21/8543

Abstract: Techniques and systems are provided for processing video data. For example, 360-degree video data can be obtained for processing by an encoding device or a decoding device. The 360-degree video data includes pictures divided into motion-constrained tiles. The 360-degree video data can be used to generate a media file including a plurality of tracks. Each of the plurality of tracks contain a set of at least one of the motion-constrained tiles. The set of at least one of the motion-constrained tiles corresponds to at least one of a plurality of viewports of the 360-degree video data. A first tile representation can be generated for the media file. The first tile representation encapsulates a first track of the plurality of tracks, and the first track includes a first set of at least one of the motion-constrained tiles at a first tile location in the pictures of the 360-degree video data. The first set of at least one of the motion-constrained tiles corresponds to a viewport of the 360-degree video data.

公开(公告)号：US20150373338A1

公开(公告)日：2015-12-24

申请号：US14741304

申请日：2015-06-16

Applicant: QUALCOMM Incorporated

Inventor： Fnu HENDRY ,  Adarsh Krishnan RAMASUBRAMONIAN ,  Ye-Kui WANG

IPC: H04N19/172 ,  H04N19/105 ,  H04N19/31 ,  H04N19/33 ,  H04N13/00 ,  H04N19/52 ,  H04N19/58 ,  H04N19/577 ,  H04N19/597 ,  H04N19/159 ,  H04N19/503

CPC classification number: H04N19/187 ,  H04N13/161 ,  H04N19/107 ,  H04N19/157 ,  H04N19/30 ,  H04N19/31 ,  H04N19/33 ,  H04N19/46 ,  H04N19/70 ,  H04W84/042 ,  H04W88/02

Abstract: An apparatus for coding video information according to certain aspects includes a memory unit configured to store video information associated with a plurality of layers and a processor. The processor is configured to obtain information associated with a current access unit (AU) to be coded, the current AU containing pictures from one or more layers of the plurality of layers. The processor is further configured to determine whether the current AU includes a first layer containing an intra random access point (IRAP) picture. The process is additionally configured to reset a picture order count (POC) of the second layer at the current AU, in response to determining that the current AU includes (1) a first layer that contains an IRAP picture and (2) a second layer containing no picture or containing a discardable picture.

Abstract translation: 根据某些方面的用于对视频信息进行编码的装置包括被配置为存储与多个层相关联的视频信息的存储器单元和处理器。 处理器被配置为获得与要编码的当前访问单元（AU）相关联的信息，当前AU包含来自所述多个层中的一个或多个层的图片。 处理器还被配置为确定当前AU是否包括包含内部随机接入点（IRAP）图像的第一层。 该过程另外被配置为响应于确定当前AU包括（1）包含IRAP图像的第一层和（2）第二层来重置当前AU处的第二层的图像顺序计数（POC） 不包含图片或包含可丢弃的图片。

公开(公告)号：US20150373342A1

公开(公告)日：2015-12-24

申请号：US14741253

申请日：2015-06-16

Applicant: QUALCOMM Incorporated

Inventor： Fnu HENDRY ,  Adarsh Krishnan RAMASUBRAMONIAN ,  Ye-Kui WANG

IPC: H04N19/187

CPC classification number: H04N19/187 ,  H04N13/161 ,  H04N19/107 ,  H04N19/157 ,  H04N19/30 ,  H04N19/31 ,  H04N19/33 ,  H04N19/46 ,  H04N19/70 ,  H04W84/042 ,  H04W88/02

Abstract: An apparatus for coding video information according to certain aspects includes a memory unit configured to store video information associated with a plurality of layers and a processor. The processor is configured to obtain information associated with a current access unit (AU) to be coded, the current AU containing pictures from one or more layers of the plurality of layers. The processor is also configured to reset a picture order count (POC) of a layer included in the current AU via (1) resetting only a most significant bit (MSB) of the POC or (2) resetting both the MSB of the POC and a least significant (LSB) of the POC. The processor is further configured to, for pictures in one or more Ails subsequent to the current AU in decoding order: set a value of a first flag indicative whether a reset of the POC is a full reset.

Abstract translation: 根据某些方面的用于对视频信息进行编码的装置包括被配置为存储与多个层相关联的视频信息的存储器单元和处理器。 处理器被配置为获得与要编码的当前访问单元（AU）相关联的信息，当前AU包含来自所述多个层中的一个或多个层的图片。 处理器还被配置为通过（1）仅复位POC的最高有效位（MSB）来复位当前AU中包括的层的图像顺序计数（POC），或者（2）重置POC的MSB和 POC的最低有效（LSB）。 所述处理器还被配置为：以解码顺序对当前AU之后的一个或多个Ail中的图片进行配置：设置指示POC的复位是否为全复位的第一标志的值。

公开(公告)号：US20150264369A1

公开(公告)日：2015-09-17

申请号：US14656447

申请日：2015-03-12

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan RAMASUBRAMONIAN ,  Fnu HENDRY ,  Ye-Kui WANG

IPC: H04N19/31 ,  H04N19/187 ,  H04N19/136 ,  H04N19/184

CPC classification number: H04N19/31 ,  H04N19/136 ,  H04N19/184 ,  H04N19/187 ,  H04N19/30 ,  H04N19/70

Abstract: An apparatus configured to code video information in a bitstream includes a memory and a processor in communication with the memory. The memory is configured to store video information associated with a video layer having a current picture. The processor is configured to: determine whether a slice segment header extension associated with the current picture is present in the bitstream; and determine that one or more most significant bits (MSBs) of a picture order count (POC) value associated with the current picture are not present in the bitstream in response to a determination that the slice segment header extension associated with the current picture is not present in the bitstream. The processor may encode or decode the video information in the bitstream.

Abstract translation: 被配置为对位流中的视频信息进行编码的装置包括存储器和与存储器通信的处理器。 存储器被配置为存储与具有当前图片的视频层相关联的视频信息。 处理器被配置为：确定与当前图片相关联的片段标题扩展是否存在于比特流中; 并且确定与当前图片相关联的图片顺序计数（POC）值的一个或多个最高有效位（MSB）不响应于确定与当前图片相关联的片段标题扩展不在存在于比特流中 存在于比特流中。 处理器可以对比特流中的视频信息进行编码或解码。

公开(公告)号：US20150181233A1

公开(公告)日：2015-06-25

申请号：US14575788

申请日：2014-12-18

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan RAMASUBRAMONIAN ,  Fnu HENDRY ,  Ye-Kui WANG

IPC: H04N19/597 ,  H04N19/52

CPC classification number: H04N19/597 ,  H04N19/463 ,  H04N19/52 ,  H04N19/70

Abstract: An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a first video layer having a current picture. The processor is configured to process a first offset associated with the current picture, the first offset indicating a difference between (a) most significant bits (MSBs) of a first picture order count (POC) of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture.

Abstract translation: 被配置为对视频信息进行编码的装置包括与存储器单元通信的存储器单元和处理器。 存储单元被配置为存储与具有当前图片的第一视频层相关联的视频信息。 处理器被配置为处理与当前图像相关联的第一偏移，第一偏移指示第一视频层中先前图像的第一图像顺序计数（POC）的（a）最高有效位（MSB）之间的差异， 在当前图片的解码顺序前面和（b）当前图片的第二个POC的MSB。

公开(公告)号：US20150271526A1

公开(公告)日：2015-09-24

申请号：US14657617

申请日：2015-03-13

Applicant: QUALCOMM Incorporated

Inventor： Fnu HENDRY ,  Adarsh Krishnan RAMASUBRAMONIAN ,  Ye-Kui WANG ,  Vadim SEREGIN

IPC: H04N19/70 ,  H04N19/172 ,  H04N19/46

CPC classification number: H04N19/70 ,  H04N19/124 ,  H04N19/172 ,  H04N19/187 ,  H04N19/188 ,  H04N19/30 ,  H04N19/31 ,  H04N19/46 ,  H04N19/60

Abstract: According to certain aspects, an apparatus for coding video information includes a memory and a processor configured to determine whether a first syntax element is present in a bitstream, the first syntax element associated with a sequence parameter set (SPS) and a first flag indicative of whether a temporal identifier (ID) of a reference picture for pictures that refer to the SPS can be nested; and in response to determining that the first syntax element is not present in the bitstream: obtain a second syntax element indicative of a maximum number of temporal sub-layers in a particular layer of the plurality of layers; and determine whether to set the first flag equal to a second flag indicative of whether a temporal ID of a reference picture for any pictures can be nested based at least in part on a value of the second syntax element.

Abstract translation: 根据某些方面，用于对视频信息进行编码的装置包括存储器和处理器，其被配置为确定位流中是否存在第一语法元素，与序列参数集（SPS）相关联的第一语法元素以及指示 是否可以嵌套参考SPS的图片的参考图片的时间标识符（ID）; 并且响应于确定所述第一语法元素不存在于所述比特流中：获得指示所述多个层的特定层中的最大数量的时间子层的第二语法元素; 并且确定是否将所述第一标志设置为等于指示用于任何图片的参考图片的时间ID是否可以至少部分地基于所述第二语法元素的值来嵌套的第二标志。

公开(公告)号：US20150271506A1

公开(公告)日：2015-09-24

申请号：US14657624

申请日：2015-03-13

Applicant: QUALCOMM Incorporated

Inventor： Fnu HENDRY ,  Adarsh Krishnan RAMASUBRAMONIAN ,  Ye-Kui WANG ,  Vadim SEREGIN

IPC: H04N19/169 ,  H04N19/124 ,  H04N19/60 ,  H04N19/187 ,  H04N19/46

CPC classification number: H04N19/70 ,  H04N19/124 ,  H04N19/172 ,  H04N19/187 ,  H04N19/188 ,  H04N19/30 ,  H04N19/31 ,  H04N19/46 ,  H04N19/60

Abstract: An apparatus for coding video information according to certain aspects includes a memory and a processor. The memory is configured to store video information associated with one or more layers. The processor is configured to code a current access unit (AU) in a bitstream including a plurality of layers, the plurality of layers including a reference layer and at least one corresponding enhancement layer. The processor is further configured to code a first end of sequence (EOS) network abstraction layer (NAL) unit associated with the reference layer in the current AU, the first EOS NAL unit having the same layer identifier (ID) as the reference layer. The processor is also configured to code a second EOS NAL unit associated with the enhancement layer in the current AU, the second EOS NAL unit having the same layer ID as the enhancement layer.

Abstract translation: 根据某些方面的用于编码视频信息的装置包括存储器和处理器。 存储器被配置为存储与一个或多个层相关联的视频信息。 处理器被配置为对包括多个层的比特流中的当前访问单元（AU）进行编码，所述多个层包括参考层和至少一个对应的增强层。 处理器还被配置为对与当前AU中的参考层相关联的序列（EOS）网络抽象层（NAL）单元进行编码，第一EOS NAL单元具有与参考层相同的层标识符（ID）。 处理器还被配置为对与当前AU中的增强层相关联的第二EOS NAL单元进行编码，第二EOS NAL单元具有与增强层相同的层ID。

公开(公告)号：US20150264370A1

公开(公告)日：2015-09-17

申请号：US14656469

申请日：2015-03-12

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan RAMASUBRAMONIAN ,  Ye-Kui WANG ,  Fnu HENDRY

IPC: H04N19/33 ,  H04N19/196 ,  H04N19/187 ,  H04N19/167 ,  H04N19/18

CPC classification number: H04N19/33 ,  H04N19/167 ,  H04N19/18 ,  H04N19/187 ,  H04N19/196 ,  H04N19/30 ,  H04N19/423 ,  H04N19/597 ,  H04N19/70

Abstract: An apparatus according to certain aspects includes a memory and a processor configured to: in response to determining that a reference layer intra random access point (IRAP) picture starts a new coded video sequence (CVS) at the current AU: determine whether the reference layer IRAP picture activates a new video parameter set (VPS) or defines a prediction boundary at the current AU; in response to determining that the reference layer IRAP picture activates a new VPS or defines a prediction boundary at the current AU, remove pictures in the decoded picture buffer (DPB) associated with each of a plurality of layers; and in response to determining that the reference layer IRAP picture does not activate a new VPS and does not define a prediction boundary at the current AU, remove only pictures in the DPB associated with the reference layer.

Abstract translation: 根据某些方面的装置包括存储器和处理器，其被配置为：响应于确定参考层内随机接入点（IRAP）图片在当前AU处开始新的编码视频序列（CVS）：确定参考层 IRAP图片激活新的视频参数集（VPS）或在当前AU定义预测边界; 响应于确定参考层IRAP图片激活新的VPS或在当前AU定义预测边界，去除与多个层中的每一层相关联的解码图像缓冲器（DPB）中的图像; 并且响应于确定参考层IRAP图片不激活新的VPS并且不在当前AU处定义预测边界，仅去除与参考层相关联的DPB中的图片。

公开(公告)号：US20150103923A1

公开(公告)日：2015-04-16

申请号：US14513034

申请日：2014-10-13

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan RAMASUBRAMONIAN ,  Ying CHEN ,  Ye-Kui WANG ,  Fnu HENDRY

IPC: H04N19/37

CPC classification number: H04N19/187 ,  H04N19/30 ,  H04N19/46 ,  H04N19/68 ,  H04N19/70 ,  H04N19/80 ,  H04N19/86

Abstract: An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a video layer having a picture. The processor is configured to determine whether the picture is a non-picture-order-count (POC)-anchor picture, and based on the determination of whether the picture is a non-POC-anchor picture, perform one of (1) refraining from indicating a POC reset in connection with the picture, or (2) indicating the POC reset in connection with the picture. The processor may encode or decode the video information.

Abstract translation: 被配置为对视频信息进行编码的装置包括与存储器单元通信的存储器单元和处理器。 存储单元被配置为存储与具有图像的视频层相关联的视频信息。 处理器被配置为确定图像是非图像顺序计数（POC）图像，并且基于图像是否是非POC锚图像的确定，执行以下中的一个：（1）避免 指示与图像相关的POC复位，或（2）指示与图像相关的POC复位。 处理器可以对视频信息进行编码或解码。

公开(公告)号：US20150358640A1

公开(公告)日：2015-12-10

申请号：US14730041

申请日：2015-06-03

Applicant: QUALCOMM Incorporated

Inventor： Fnu HENDRY ,  Ye-Kui WANG ,  Adarsh Krishnan RAMASUBRAMONIAN

IPC: H04N19/547 ,  H04N19/61 ,  H04N19/44

CPC classification number: H04N19/547 ,  H04N19/30 ,  H04N19/44 ,  H04N19/463 ,  H04N19/61 ,  H04N19/70

Abstract: Video data bitstreams may contain bitstream conformance parameters, such as hypothetical reference decoder (HRD) parameters, which may be used to allow a decoder to test the conformance of a received bitstream. In multi-layer codecs transmitted using partitions, the video data may be associated with one or more layer sets. Each layer set may be associated with one or more output layer sets. Each output layer set may be further associated with one or more partitioning schemes. Conformance parameters are mapped to partitions of a partitioning scheme, based upon the output layer set that the partitioning scheme is associated with. This allows for a partition to be associated with different conformance parameters, depending upon the output layer set that is being used.

Abstract translation: 视频数据比特流可以包含比特流一致性参数，诸如假设参考解码器（HRD）参数，其可以用于允许解码器测试接收的比特流的一致性。 在使用分区传输的多层编解码器中，视频数据可以与一个或多个层集相关联。 每个层集合可以与一个或多个输出层集相关联。 每个输出层集合可以进一步与一个或多个分区方案相关联。 基于分区方案相关联的输出层集，将一致性参数映射到分区方案的分区。 这允许分区与不同的一致性参数相关联，这取决于正在使用的输出层集。