Alignment mark fabrication process to limit accumulation of errors in level to level overlay
    1.
    发明授权
    Alignment mark fabrication process to limit accumulation of errors in level to level overlay 有权
    对准标记制作过程,以限制层次叠加中错误的积累

    公开(公告)号:US06440816B1

    公开(公告)日:2002-08-27

    申请号:US09771621

    申请日:2001-01-30

    IPC分类号: H01L2176

    CPC分类号: H01L21/76229 Y10S438/975

    摘要: A process for device fabrication, including coating a wafer with a layer including SiO2, SiNx, and a first resist, defining shallow trench isolation and alignment patterns in the first resist, transferring the first resist pattern into the SiO2 and SiNx, removing the first resist, etching trenches to a depth suitable for shallow trench isolation, coating the wafer with a second photoresist, defining open areas around alignment-marks, etching alignment mark trenches to a depth greater than the trench depth, suitable for alignment mark detection, removing the second resist and the SiNx, depositing SiO2 to fill the trenches for shallow trench isolation and partially fill the alignment mark trenches for alignment mark detection; and performing chemical mechanical polishing, leaving shallow trench isolation features and topographical alignment marks. As a result, alignment marks can be fabricated from the STI level with an arbitrary depth and an SiO2 fill to produce topography and/or material contrast without accumulating errors by using a mask that is separate from the transistor isolation feature mask to define the alignment mark positions.

    摘要翻译: 一种用于器件制造的方法,包括用包括SiO 2,SiN x和第一抗蚀剂的层涂覆晶片,在第一抗蚀剂中限定浅沟槽隔离和取向图案,将第一抗蚀剂图案转移到SiO 2和SiN x中,除去第一抗蚀剂 将沟槽蚀刻到适于浅沟槽隔离的深度,用第二光致抗蚀剂涂覆晶片,限定对准标记周围的开放区域,蚀刻对准标记沟槽至大于沟槽深度的深度,适合于对准标记检测,去除第二 抗蚀剂和SiNx,沉积SiO 2以填充沟槽用于浅沟槽隔离并部分填充对准标记沟槽用于对准标记检测; 并执行化学机械抛光,留下浅沟槽隔离特征和形貌对准标记。 结果,可以从具有任意深度的STI级和SiO 2填充制造对准标记,以通过使用与晶体管隔离特征掩模分离的掩模来定义对准标记来产生形貌和/或材料对比度而不会累积误差 职位

    Method and system for a GAN vertical JFET utilizing a regrown gate
    3.
    发明授权
    Method and system for a GAN vertical JFET utilizing a regrown gate 有权
    使用再生栅的GAN垂直JFET的方法和系统

    公开(公告)号:US09184305B2

    公开(公告)日:2015-11-10

    申请号:US13198655

    申请日:2011-08-04

    摘要: A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

    摘要翻译: 垂直III族氮化物场效应晶体管包括:包含第一III族氮化物材料的漏极,与漏极电耦合的漏极接触点;以及漂移区域,包括耦合到漏极并邻近漏极设置的第二III族氮化物材料 垂直方向 场效应晶体管还包括沟道区,该沟道区包括耦合到漂移区的第三III族氮化物材料,至少部分围绕沟道区的栅极区和电耦合到栅极区的栅极接触。 场效应晶体管还包括耦合到沟道区的源极和电耦合到源极的源极接触。 沟道区域沿着垂直方向设置在漏极和源极之间,使得垂直III族氮化物场效应晶体管的工作期间的电流沿着垂直方向。

    Ingan ohmic source contacts for vertical power devices
    5.
    发明授权
    Ingan ohmic source contacts for vertical power devices 有权
    用于垂直功率器件的Ingan欧姆源触点

    公开(公告)号:US09006800B2

    公开(公告)日:2015-04-14

    申请号:US13326192

    申请日:2011-12-14

    摘要: A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region. The source includes a GaN-layer coupled to an InGaN layer. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

    摘要翻译: 垂直III族氮化物场效应晶体管包括:包含第一III族氮化物材料的漏极,与漏极电耦合的漏极接触点;以及漂移区域,包括耦合到漏极并邻近漏极设置的第二III族氮化物材料 垂直方向 场效应晶体管还包括沟道区,该沟道区包括耦合到漂移区的第三III族氮化物材料,至少部分围绕沟道区的栅极区和电耦合到栅极区的栅极接触。 场效应晶体管还包括耦合到沟道区的源极。 源包括耦合到InGaN层的GaN层。 沟道区域沿着垂直方向设置在漏极和源极之间,使得垂直III族氮化物场效应晶体管的工作期间的电流沿垂直方向。

    Photovoltaic device
    8.
    发明授权
    Photovoltaic device 有权
    光伏装置

    公开(公告)号:US08895845B2

    公开(公告)日:2014-11-25

    申请号:US12940861

    申请日:2010-11-05

    摘要: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. A photovoltaic (PV) unit, according to embodiments of the invention, may have a very thin absorber layer produced by epitaxial lift-off (ELO), all electrical contacts positioned on the back side of the PV device to avoid shadowing, and/or front side and back side light trapping employing a diffuser and a reflector to increase absorption of the photons impinging on the front side of the PV unit. Several PV units may be combined into PV banks, and an array of PV banks may be connected to form a PV module with thin strips of metal or conductive polymer applied at low temperature. Such innovations may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.

    摘要翻译: 提供了与常规太阳能电池相比,用于将诸如太阳能的电磁辐射转换成电能的方法和装置,其效率提高。 根据本发明的实施例的光伏(PV)单元可以具有通过外延剥离(ELO)制造的非常薄的吸收层,所有电触点位于PV装置的背面以避免阴影,和/或 使用扩散器和反射器的前侧和后侧光捕获以增加入射到PV单元的前侧的光子的吸收。 可以将多个PV单元组合成PV组,并且可以将PV组阵列连接以形成具有在低温下施加的薄金属或导电聚合物的PV模块。 与常规太阳能电池相比,这样的创新可以允许PV装置的更高的效率和灵活性。

    Vertical GaN JFET with gate source electrodes on regrown gate
    9.
    发明授权
    Vertical GaN JFET with gate source electrodes on regrown gate 有权
    在再生栅上具有栅极源电极的垂直GaN JFET

    公开(公告)号:US08698164B2

    公开(公告)日:2014-04-15

    申请号:US13315720

    申请日:2011-12-09

    IPC分类号: H01L29/808 H01L21/335

    摘要: A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.

    摘要翻译: 半导体结构包括具有第一表面和第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。 第一电极电耦合到GaN衬底的第二表面。 半导体结构还包括耦合到GaN衬底的第一表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN层。 第一GaN外延层包括沟道区。 第二GaN外延层包括栅极区域和边缘端接结构。 耦合到栅极区域的第二电极和耦合到沟道区域的第三电极都设置在边缘端接结构内。

    Photovoltaic device with increased light trapping
    10.
    发明授权
    Photovoltaic device with increased light trapping 有权
    具有增加的光捕获的光伏器件

    公开(公告)号:US08686284B2

    公开(公告)日:2014-04-01

    申请号:US12605140

    申请日:2009-10-23

    IPC分类号: H01L31/00

    摘要: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. A photovoltaic (PV) device may incorporate front side and/or back side light trapping techniques in an effort to absorb as many of the photons incident on the front side of the PV device as possible in the absorber layer. The light trapping techniques may include a front side antireflective coating, multiple window layers, roughening or texturing on the front and/or the back sides, a back side diffuser for scattering the light, and/or a back side reflector for redirecting the light into the interior of the PV device. With such light trapping techniques, more light may be absorbed by the absorber layer for a given amount of incident light, thereby increasing the efficiency of the PV device.

    摘要翻译: 提供了与常规太阳能电池相比,用于将诸如太阳能的电磁辐射转换成电能的方法和装置,其效率提高。 光伏(PV)装置可以包括前侧和/或后侧光捕获技术,以尽量吸收在吸收层中尽可能多地入射到PV装置的前侧的光子。 光捕获技术可以包括前侧防反射涂层,多个窗口层,在前侧和/或后侧上的粗糙化或纹理化,用于散射光的后侧扩散器和/或用于将光重定向到的后侧反射器 PV设备的内部。 通过这种光捕获技术,对于给定量的入射光,更多的光可以被吸收层吸收,从而提高PV器件的效率。