公开(公告)号：US09349678B2

公开(公告)日：2016-05-24

申请号：US14750009

申请日：2015-06-25

Applicant: Renesas Electronics Corporation

Inventor： Yoshihiro Ono ,  Nobuhiro Kinoshita ,  Tsuyoshi Kida ,  Jumpei Konno ,  Kenji Sakata ,  Kentaro Mori ,  Shinji Baba

IPC: H01L23/48 ,  H01L21/00 ,  B23K31/00 ,  H01L23/495 ,  H01L23/544 ,  H01L23/00

CPC classification number: H01L23/49568 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/4952 ,  H01L23/49558 ,  H01L23/49811 ,  H01L23/544 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/45 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0657 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05666 ,  H01L2224/06153 ,  H01L2224/06155 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16105 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8113 ,  H01L2224/81191 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2924/00011 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/32245 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01074 ,  H01L2924/013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2224/45147

Abstract: The reliability of a semiconductor device is improved. A probe mark is formed on a probe region of a pad covered with a protective insulating film. And, a pillar-shaped electrode has a first portion formed on an opening region and a second portion that is extended over the probe region from the upper portion of the opening region. At this time, a center position of the opening region is shifted from a center position of the pillar-shaped electrode that is opposed to a bonding finger.

Abstract translation: 提高了半导体器件的可靠性。 在覆盖有保护绝缘膜的焊盘的探针区域上形成探针标记。 并且，柱状电极具有形成在开口区域上的第一部分和从开口区域的上部在探针区域上延伸的第二部分。 此时，开口区域的中心位置从与接合手指相对的柱状电极的中心位置偏移。

公开(公告)号：US10312199B2

公开(公告)日：2019-06-04

申请号：US15941300

申请日：2018-03-30

Applicant: Renesas Electronics Corporation

Inventor： Shinji Watanabe ,  Tsuyoshi Kida ,  Yoshihiro Ono ,  Kentaro Mori ,  Kenji Sakata ,  Yusuke Yamada

IPC: H01L23/00 ,  H01L23/31

Abstract: A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.

公开(公告)号：US20180226362A1

公开(公告)日：2018-08-09

申请号：US15941300

申请日：2018-03-30

Applicant: Renesas Electronics Corporation

Inventor： Shinji Watanabe ,  Tsuyoshi Kida ,  Yoshihiro Ono ,  Kentaro Mori ,  Kenji Sakata ,  Yusuke Yamada

IPC: H01L23/00 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L23/31 ,  H01L23/3128 ,  H01L24/02 ,  H01L24/16 ,  H01L24/42 ,  H01L24/97 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.

公开(公告)号：US10141273B2

公开(公告)日：2018-11-27

申请号：US15304015

申请日：2014-04-14

Applicant: Renesas Electronics Corporation

Inventor： Shinji Watanabe ,  Tsuyoshi Kida ,  Yoshihiro Ono ,  Kentaro Mori ,  Kenji Sakata ,  Yusuke Yamada

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31

Abstract: In a semiconductor device according to an embodiment, a second semiconductor chip is mounted on a first rear surface of a first semiconductor chip. Also, the first rear surface of the first semiconductor chip includes a first region in which a plurality of first rear electrodes electrically connected to the second semiconductor chip via a protrusion electrode are formed and a second region which is located on a peripheral side relative to the first region and in which a first metal pattern is formed. In addition, a protrusion height of the first metal pattern with respect to the first rear surface is smaller than a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface.