公开(公告)号：US20170005080A1

公开(公告)日：2017-01-05

申请号：US15268742

申请日：2016-09-19

Applicant: Renesas Electronics Corporation

Inventor： Bunji YASUMURA ,  Yoshinori DEGUCHI ,  Fumikazu TAKEI ,  Akio HASEBE ,  Naohiro MAKIHIRA ,  Mitsuyuki KUBO

IPC: H01L25/00 ,  H01L23/00 ,  H01L23/544 ,  H01L25/18 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L21/6835 ,  H01L22/12 ,  H01L22/14 ,  H01L23/544 ,  H01L24/05 ,  H01L24/06 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/18 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5448 ,  H01L2223/54493 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/06131 ,  H01L2224/11009 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2224/11 ,  H01L2924/00

Abstract: To improve the assemblability of a semiconductor device.When a memory chip is mounted over a logic chip, a recognition range including a recognition mark formed at a back surface of the logic chip is imaged and a shape of the recognition range is recognized, alignment of a plurality of bumps of the logic chip and a plurality of projection electrodes of the above-described memory chip is performed based on a result of the recognition, and the above-described memory chip is mounted over the logic chip. At this time, the shape of the recognition range is different from any portion of an array shape of the bumps, as a result, the recognition mark in the shape of the recognition range can be reliably recognized, and alignment of the bumps of the logic chip and the projection electrodes of the above-described memory chip is performed with high accuracy.

Abstract translation: 当存储器芯片安装在逻辑芯片上时，将形成在逻辑芯片的背面的识别标记的识别范围成像，识别范围的形状，逻辑芯片的多个凸点与 基于识别的结果执行上述存储芯片的多个投影电极，并且将上述存储芯片安装在逻辑芯片上。 此时，识别范围的形状与凸块的阵列形状的任何部分不同，结果，可以可靠地识别识别范围形状的识别标记，并且逻辑的凸块的对准 高精度地执行上述存储芯片的芯片和投影电极。

公开(公告)号：US20150359102A1

公开(公告)日：2015-12-10

申请号：US14829720

申请日：2015-08-19

Applicant: Renesas Electronics Corporation

Inventor： Mitsuyuki KUBO ,  Junichi YAMADA ,  Hiroshi HOMMA

IPC: H05K1/18 ,  H05K1/02 ,  H05K1/11 ,  H01L23/498 ,  H01L23/00

CPC classification number: H05K1/181 ,  G01R1/0408 ,  H01L22/14 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/642 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H05K1/0231 ,  H05K1/0268 ,  H05K1/115 ,  H05K1/141 ,  H05K3/3415 ,  H05K2201/10015 ,  H05K2201/10378 ,  H05K2201/10545 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Electrical characteristics of a mounting board over which a semiconductor device is mounted is improved. A mounting board (wiring board) includes a plurality of first through holes and second through holes extending from its upper surface bearing a semiconductor device (semiconductor package) to its lower surface and through-hole wirings formed in the respective through holes. The mounting board has a capacitor arranged on its lower surface and electrically connected with the semiconductor device via second electrodes. Among a plurality of first electrodes formed on the upper surface of the mounting board, the several first electrodes to be connected with the capacitor are connected with one wiring formed in a first through hole with a larger diameter than a signal transmission path.

Abstract translation: 改善了安装有半导体器件的安装基板的电气特性。 安装板（布线板）包括多个第一通孔和从其上表面延伸到其下表面的半导体器件（半导体封装）和形成在各个通孔中的通孔布线的第二通孔。 安装板具有设置在其下表面上并经由第二电极与半导体器件电连接的电容器。 在形成在安装板的上表面上的多个第一电极中，与电容器连接的几个第一电极与形成在比信号传输路径大的直径的第一通孔中形成的一个布线连接。

公开(公告)号：US20180040598A1

公开(公告)日：2018-02-08

申请号：US15730977

申请日：2017-10-12

Applicant: Renesas Electronics Corporation

Inventor： Bunji YASUMURA ,  Yoshinori DEGUCHI ,  Fumikazu TAKEI ,  Akio HASEBE ,  Naohiro MAKIHIRA ,  Mitsuyuki KUBO

IPC: H01L25/00 ,  H01L21/66 ,  H01L23/544 ,  H01L21/683 ,  H01L25/18 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L21/6835 ,  H01L22/12 ,  H01L22/14 ,  H01L23/544 ,  H01L24/05 ,  H01L24/06 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/18 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5448 ,  H01L2223/54493 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/06131 ,  H01L2224/11009 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2224/11 ,  H01L2924/00

Abstract: To improve the assemblability of a semiconductor device.When a memory chip is mounted over a logic chip, a recognition range including a recognition mark formed at a back surface of the logic chip is imaged and a shape of the recognition range is recognized, alignment of a plurality of bumps of the logic chip and a plurality of projection electrodes of the above-described memory chip is performed based on a result of the recognition, and the above-described memory chip is mounted over the logic chip. At this time, the shape of the recognition range is different from any portion of an array shape of the bumps, as a result, the recognition mark in the shape of the recognition range can be reliably recognized, and alignment of the bumps of the logic chip and the projection electrodes of the above-described memory chip is performed with high accuracy.