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    Analog/digital converter and milimeter wave radar system
    2.
    发明授权
    Analog/digital converter and milimeter wave radar system 有权

    公开(公告)号：US10707894B2

    公开(公告)日：2020-07-07

    申请号：US15900598

    申请日：2018-02-20

    申请人： Renesas Electronics Corporation

    发明人： Takashi Oshima ,  Tetsuo Matsui ,  Mitsuya Fukazawa ,  Tomohiko Yano

    IPC分类号： H03M3/00 ,  H03H21/00 ,  G01S13/02 ,  G01S7/35

    摘要： A modulator includes an analog integrator including an analog circuit and a quantizer quantizing its output signal. An external input signal is input thereto. A modulator is coupled to the latter stage of the modulator, and includes a quantizer. A probe signal generation circuit injects a probe signal to the modulator. An adaptive filter searches for a transfer function of the modulator by observing an output signal of the quantizer in accordance with a probe signal. Another adaptive filter searches for a transfer function of the modulator by observing an output signal of the quantizer in accordance with the probe signal. A noise cancel circuit cancels a quantization error generated by the quantizer using search results of the adaptive filters.

    AD converter device and millimeter wave radar system
    4.
    发明授权
    AD converter device and millimeter wave radar system 有权

    公开(公告)号：US11415666B2

    公开(公告)日：2022-08-16

    申请号：US16585924

    申请日：2019-09-27

    申请人： RENESAS ELECTRONICS CORPORATION

    发明人： Takashi Oshima ,  Tetsuo Matsui ,  Mitsuya Fukazawa ,  Katsuki Tateyama ,  Masaki Fujiwara

    IPC分类号： G01S7/35 ,  H03M3/00 ,  G01S13/34

    摘要： A MASH type sigma delta AD converter includes a modulator, an analog filter filtering an extraction signal obtained by extracting a probe signal and an quantization error generated in a quantizer within a sigma delta modulator, a low speed AD converter performing an AD conversion of an output signal of the analog filter, a first adaptive filter searching for a transfer function of the sigma delta modulator, a second adaptive filter searching for a transfer function from an output of the modulator to the low speed AD converter via the analog filter, and a noise cancellation circuit cancelling the probe signal and the quantization error included in an output signal of the quantizer using the search results by the first and second adaptive filters.

    Semiconductor integrated circuit device
    7.
    发明授权
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号：US09100034B2

    公开(公告)日：2015-08-04

    申请号：US14203052

    申请日：2014-03-10

    申请人： RENESAS ELECTRONICS CORPORATION

    发明人： Takashi Oshima ,  Tatsuji Matsuura ,  Yuichi Okuda ,  Hideo Nakane ,  Takaya Yamamoto ,  Keisuke Kimura

    IPC分类号： H03M1/10 ,  H03M1/38 ,  H03M1/46

    CPC分类号： H03M1/1245 ,  H03M1/002 ,  H03M1/0609 ,  H03M1/0639 ,  H03M1/1038 ,  H03M1/109 ,  H03M1/14 ,  H03M1/38 ,  H03M1/44 ,  H03M1/46 ,  H03M1/56

    摘要： A digital-correction-type A/D converter which is a charge sharing type and performing successive approximation is realized in a small area. The A/D converter is configured with an A/D conversion unit which is a charge sharing type and performing successive approximation, a digital correction unit which receives a digital output of the A/D conversion unit and performs digital correction to the digital output, and a holding unit which holds a test signal. A test signal of a common value from the holding unit is inputted into the A/D conversion unit in the first period and the second period. The A/D conversion correction coefficient for the digital correction unit is calculated on the basis of the digital correction result of the digital correction unit in the first period, and the digital correction result of the digital correction unit in the second period.

    摘要翻译： 在小区域中实现了作为电荷共享型并进行逐次逼近的数字校正型A / D转换器。 A / D转换器配置有作为电荷共享型的A / D转换单元并执行逐次逼近，数字校正单元接收A / D转换单元的数字输出并对数字输出执行数字校正， 以及保持测试信号的保持单元。 来自保持单元的公共值的测试信号在第一周期和第二周期中被输入到A / D转换单元。 基于第一周期中的数字校正单元的数字校正结果和第二周期中的数字校正单元的数字校正结果来计算数字校正单元的A / D转换校正系数。

    Electronic system and operating method thereof
    8.
    发明授权
    Electronic system and operating method thereof 有权
    电子系统及其操作方法

    公开(公告)号：US09054723B2

    公开(公告)日：2015-06-09

    申请号：US14274813

    申请日：2014-05-12

    申请人： RENESAS ELECTRONICS CORPORATION

    发明人： Takashi Oshima ,  Tatsuji Matsuura ,  Yuichi Okuda ,  Hideo Nakane ,  Takaya Yamamoto ,  Keisuke Kimura

    IPC分类号： H03M1/10 ,  H03M1/00 ,  H03M1/12 ,  H03M1/66

    CPC分类号： H03M1/1033 ,  H03M1/002 ,  H03M1/1052 ,  H03M1/12 ,  H03M1/201 ,  H03M1/44 ,  H03M1/46 ,  H03M1/66 ,  H03M1/745

    摘要： To compensate for non-linearity of an AD conversion unit and non-linearity of a DA conversion unit in an electronic system including the DA conversion unit and the AD conversion unit, an electronic system includes an A/D conversion unit, a D/A conversion unit, an AD conversion compensation unit, a DA conversion compensation unit, and a calibration unit. During a calibration operation period, the calibration unit sets an operating characteristic of the AD conversion compensation unit and an operating characteristic of the DA conversion compensation unit. The operating characteristic of the AD conversion compensation unit set during the calibration operation period compensates for non-linearity of AD conversion of the A/D conversion unit. The operating characteristic of the DA conversion compensation unit set during the calibration operation period compensates for non-linearity of DA conversion of the D/A conversion unit.

    摘要翻译： 为了补偿包括DA转换单元和AD转换单元的电子系统中的AD转换单元的非线性和DA转换单元的非线性，电子系统包括A / D转换单元，D / A 转换单元，AD转换补偿单元，DA转换补偿单元和校准单元。 在校准操作期间，校准单元设定AD转换补偿单元的工作特性和DA转换补偿单元的工作特性。 在校准操作期间设定的AD转换补偿单元的工作特性补偿A / D转换单元的AD转换的非线性。 在校准操作期间设置的DA转换补偿单元的工作特性补偿D / A转换单元的DA转换的非线性。

    Semiconductor device and failure detection method
    9.
    发明授权
    Semiconductor device and failure detection method 有权

    公开(公告)号：US10310049B2

    公开(公告)日：2019-06-04

    申请号：US15218006

    申请日：2016-07-23

    申请人： Renesas Electronics Corporation

    发明人： Yuichi Okuda ,  Hideo Nakane ,  Takaya Yamamoto ,  Keisuke Kimura ,  Takashi Oshima

    IPC分类号： G01R31/3163 ,  H03M1/10 ,  G01R19/25 ,  G01R35/00 ,  H03M1/46

    摘要： The present invention provides a semiconductor device and a failure detection method capable of detecting an excessive variation among elements that constitute an analog circuit as a failure. According to an embodiment, a semiconductor device 1 includes: an AD converter 11; a digital assist circuit 12 that corrects an error of a digital signal Do corresponding to an analog signal Ain processed by the AD converter 11; and a failure detection circuit 13 that detects whether the AD converter 11 has a failure based on a correction amount by the digital assist circuit. The semiconductor device 1 is therefore able to detect the excessive variation among the elements that constitute the AD converter 11 as a failure.

    Semiconductor device
    10.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09362931B2

    公开(公告)日：2016-06-07

    申请号：US14750242

    申请日：2015-06-25

    申请人： Renesas Electronics Corporation

    发明人： Takaya Yamamoto ,  Hideo Nakane ,  Keisuke Kimura ,  Yuichi Okuda ,  Takashi Oshima

    IPC分类号： H03M1/12 ,  H03M1/00 ,  H03M1/06 ,  H03M1/46 ,  H03M1/10

    CPC分类号： H03M1/002 ,  H03M1/0609 ,  H03M1/0639 ,  H03M1/1009 ,  H03M1/1038 ,  H03M1/124 ,  H03M1/145 ,  H03M1/38 ,  H03M1/462 ,  H03M1/468

    摘要： There is provided a semiconductor device using low electric power and a small area which can realize highly accurate calibration. The semiconductor device according to the embodiment includes an A/D conversion unit, and a hold signal generating circuit which is coupled to an input side of the A/D conversion unit, and has a hold period not less than two cycles of the A/D conversion unit. The hold signal generating circuit includes: an SC integrator including an input buffer coupled to the input side of the A/D conversion unit, and feedback capacitor coupled to an input and an output of the input buffer; and a logic circuit which compares an output signal of plural bits outputted from the A/D conversion unit with a first and a second threshold values, and outputs a control signal which controls polarity of the SC integrator according to a comparison result.

    摘要翻译： 提供了一种使用低功率和小面积的半导体器件，可以实现高精度的校准。 根据实施例的半导体器件包括A / D转换单元和耦合到A / D转换单元的输入侧的保持信号产生电路，并且具有不少于A / D转换单元的两个周期的保持周期， D转换单元。 保持信号生成电路包括：SC积分器，包括耦合到A / D转换单元的输入侧的输入缓冲器，以及耦合到输入缓冲器的输入和输出的反馈电容器; 以及将从A / D转换单元输出的多个比特的输出信号与第一和第二阈值进行比较的逻辑电路，并根据比较结果输出控制SC积分器的极性的控制信号。