摘要:
An isolation amplifier includes a voltage-to-duty-cycle modulator, a non-galvanic isolation barrier, and a demodulator converting a duty-cycle-modulated signal transmitted across the isolation barrier to an analog voltage replica of the analog input voltage. The modulator circuit includes a first current switching means which produces a first current that is switched between positive and negative values in response to an output from a comparator that can be referenced to a noise-synchronized signal. The first current is summed with an input current and the difference is integrated and input to the comparator, the output of which produces the duty-cycle-modulated signal. The demodulator includes a second current switching circuit for producing a second current that is switched between positive and negative levels in response to the duty-cycle-modulated signal received across the isolation barrier and includes circuitry for algebraically summing the input current with the second current and integrating the result to produce the analog output voltage. The modulator circuit and demodulator circuits are fabricated on a single semiconductor area to produce the close matching between components of the first and second current switching circuits. The area is cut in half to produce two chips, which are connected to two isolation barrier capacitors. In the demodulator, a sample and hold circuit synchronized with the duty-cycle-modulated signal transmitted across the isolation barrier samples the output of the integrator.
摘要:
A two-terminal temperature-compensated current source includes a first transistor having its emitter connected to a first terminal, its base connected to the base of a second transistor, and its collector coupled to a current mirror. The second transistor has its emitter coupled to the first terminal by a first resistor and its collector coupled to the current mirror. A second resistor is coupled between the first terminal and the base of the first transistor. The current mirror is coupled between a second terminal and the collectors of the first and second transistors so that all current supplied to the current mirror from the second terminal flows into the collectors of the first and second transistors. A third transistor has its base coupled to the collector of the first transistor, its emitter coupled to the base of the first transistor, and its collector coupled to the second terminal. The current in the first resistor has a positive temperature coefficient, and the current in the second resistor has a negative temperature coefficient. The temperature coefficient of the total current flowing between the first and second terminals is adjusted by adjusting the ratio between the first and second resistors.
摘要:
An integrated circuit driver structure, comprising an amplifier, a current mirror block and an external current set resistor, is provided that is digitally configurable to operate in a current output mode or in a voltage output mode with its output level controlled by an external voltage. The current mirror block comprises multiple current sources, all having the same gate bias supplied by the output of amplifier. At any time, at least one current source is connected to supply the reference current to resistor, while all other current sources are connected to mirror the reference current to the load current output towards the load. A current gain ratio is based on the number of current sources connected to supply resistor and the number connected to mirror the reference current.
摘要:
An integrated circuit photodetector includes a transimpedance amplifier including a differential amplifier stage with PNP emitter-coupled transistors and a PNP input transistor which are biased only by base currents of the emitter-coupled transistors, to achieve low input bias current. Low noise operation is achieved by bypass capacitors coupled between the bases and emitters of the input transistors, respectively. A constant current source supplies a current which develops a small pedestal voltage across a resistor to bias the non-inverting input of the transimpedance amplifier so as to avoid nonlinear amplification of low level light signals. A positively biased N-type guard tub surrounds the photodetector, which is formed in a junction-isolated N region on a P substrate, to collect electrons generated in the substrate by deep-penetrating IR light to prevent them from causing amplification errors. In one embodiment, a feedback network includes a resistor connected between the output of a buffer driven by the transimpedance amplifier and an inverting input thereof, and a capacitor connected between the output and inverting input of the transimpedance amplifier to provide low noise, fast settling operation.
摘要:
A high speed, high current analog switching circuit includes a switch JFET having its drain electrode connected to an analog input voltage terminal and a source electrode connected to an analog output voltage terminal. The gate electrode of the JFET switch is connected to switching control circuitry. The analog switching circuit includes circuitry that prevents the source-gate PN junction of the switch JFET from ever being forward biased more than approximately 0.2 volts. This prevents the charge storage capacitance of that PN junction from ever increasing to such high values (e.g. 100 to 1000 picofarads) that discharging of the charge storage capacitance through the channel resistance of the switch JFET takes excessively long periods of time. Rapid equalization of the analog output voltage and analog input voltage to within approximately 10 microvolts of each other is thereby achieved.
摘要:
A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a second frequency substantially greater than the first frequency to produce a second signal. The first frequency is a sub-harmonic of the second frequency. Post-chopping circuitry (30) chops the second chopped signal at the first frequency to produce a third signal that is applied to an input of a signal conditioning circuit (2). The output chopping circuitry (10) chops an output of the signal conditioning circuit at the second frequency to generate a fourth signal. The fourth signal is filtered.
摘要:
A method and apparatus for auto-calibrating an electronic device without interrupting normal operation of the device. An electronic device configured as a high voltage difference amplifier is disclosed having a calibration circuit which couples a calibration excitation signal to a common-mode signal path of the difference amplifier. The difference amplifier includes a variable transfer function circuit which may be used to adjust the common-mode rejection of the difference amplifier. The calibration excitation signal may be a random, pseudo-random, out-of-band, or other frequency shaped signal generated in reference to a clock signal. A calibration error signal is detected from an output signal. The variable transfer function circuit can be adjusted in response to the detected error signal to reduce the calibration error signal. As a result, common-mode rejection errors of the difference amplifier may be reduced while the difference amplifier is coupled to an input signal source.
摘要:
A dual successive approximation analog-to-digital converter, including circuitry for generating separate reference voltages for each analog-to-digital converter, is integrated onto a single semiconductor chip. A single successive approximation register including a 19 bit shift register and two 18 bit latches and associated gating circuitry operates to produce two sets of 18 successive approximation numbers, one supplied as successive digital inputs to a CDAC of one of the analog-to-digital converters and the other set of successive approximation numbers being applied as digital inputs to a CDAC of the other analog-to-digital converter. A CMOS comparator includes two high speed, low gain differential amplifier stages, the first including cascode MOSFETs to provide a high power supply rejection. A pair of auto-zeroing capacitors and a pair of auto-zeroing MOSFETs operate on the outputs of the second differential amplifier to reduce input offset voltage, achieving high speed, low noise operation in a small amount of semiconductor chip area. The auto-zeroed output is supplied to the input of a two stage differential amplifier, the outputs of which also are auto-zeroed and applied to a differential CMOS latch, thereby providing a high speed, low noise, low offset CMOS comparator.
摘要:
Method and apparatus for minimizing unpredictable sources of noise, or error voltages, at the microvolt level in precision analog components such as operational amplifiers is described. Sources of such error voltages are temperature gradients across the dice of the precision components enclosed in a hermetically sealed package, thermoelectric voltages caused by temperature differences between junctions of leads of the package with other metals, and light reflected from the substrate through the glass seals around the leads in the base of such packages. A skirted heat sink is positioned in thermal contact with the sides of the package which package is mounted on a substrate. The heat sink transfers heat from the heat sink to its ambient environment by radiation and convection to maintain the temperature within the package substantially constant. The skirt depending from the heat sink encloses the space between the base of the package and the surface of the substrate to form a substantially isothermal enclosure to maintain the temperature of the leads of the package substantially constant. The depending skirt also blocks, or absorbs, radiation from the ambient environment of the package which prevents such radiation from being transmitted through the seals of the package to minimize the production of photoelectric induced error voltages induced in photosensitive circuits of the component.
摘要:
A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a second frequency substantially greater than the first frequency to produce a second signal. The first frequency is a sub-harmonic of the second frequency. Post-chopping circuitry (30) chops the second chopped signal at the first frequency to produce a third signal that is applied to an input of a signal conditioning circuit (2). The output chopping circuitry (10) chops an output of the signal conditioning circuit at the second frequency to generate a fourth signal. The fourth signal is filtered.