公开(公告)号：US20120153483A1

公开(公告)日：2012-06-21

申请号：US12973281

申请日：2010-12-20

申请人： Rohan N. Akolkar ,  Florian Gstrein ,  Daniel J. Zierath

发明人： Rohan N. Akolkar ,  Florian Gstrein ,  Daniel J. Zierath

IPC分类号： H01L23/52 ,  H01L21/768

CPC分类号： H01L23/53261 ,  H01L21/3105 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/53247 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming an interconnect structure and an integrated circuit including the interconnect structure. The method includes: depositing a dielectric layer over a conductive layer; forming an opening in the dielectric layer to expose the conductive layer; forming a barrierless single-phase interconnect comprising a metal or compound having a melting point between a melting point of copper and a melting point of tungsten. Forming includes depositing a layer of metal or compound within the opening and on an upper surface of the dielectric layer Preferably, the barrierless single-phase interconnect comprises cobalt or a cobalt containing compound. Thus, an interconnect structure, including a via and associated line, is made up of a single-phase metal or compound without the use of a different material between the interconnect and the underlying dielectric, thus improving electrical performance and reliability and further simplifying the interconnect formation process.

摘要翻译： 形成互连结构的方法和包括所述互连结构的集成电路。 该方法包括：在导电层上沉积介电层; 在所述电介质层中形成开口以暴露所述导电层; 形成包含熔点在铜的熔点和钨的熔点之间的金属或化合物的无障碍单相互连。 形成包括在开口内和介电层的上表面上沉积一层金属或化合物。优选地，无障碍单相互连包括钴或含钴化合物。 因此，包括通孔和相关线路的互连结构由单相金属或化合物构成，而不需要在互连和下面的电介质之间使用不同的材料，从而改善电性能和可靠性并进一步简化互连 形成过程。

公开(公告)号：US20080113508A1

公开(公告)日：2008-05-15

申请号：US11598889

申请日：2006-11-13

申请人： Rohan N. Akolkar ,  Florian Gstrein ,  Valery M. Dubin ,  Daniel J. Zierath

发明人： Rohan N. Akolkar ,  Florian Gstrein ,  Valery M. Dubin ,  Daniel J. Zierath

IPC分类号： H01L21/44

CPC分类号： H01L21/76843 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76877

摘要： Disclosed are embodiments of a method of forming metal interconnects using a sacrificial layer to protect a seed layer prior to metal gap fill. The sacrificial layer can prevent oxidation of the seed layer and perhaps oxygen migration to an underlying barrier layer. Other embodiments are described and claimed.

摘要翻译： 公开了在金属间隙填充之前使用牺牲层形成金属互连以保护种子层的方法的实施例。 牺牲层可以防止种子层的氧化和可能的氧迁移到下面的阻挡层。 描述和要求保护其他实施例。

公开(公告)号：US20100244252A1

公开(公告)日：2010-09-30

申请号：US12416131

申请日：2009-03-31

申请人： Christopher J. Jezewski ,  Daniel J. Zierath ,  Florian Gstrein

发明人： Christopher J. Jezewski ,  Daniel J. Zierath ,  Florian Gstrein

IPC分类号： H01L23/538 ,  H01L21/768

CPC分类号： H01L23/53238 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76867 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device and method of forming fluoride metal barriers at an interface of a fluorinated low-K dielectric and Cu or Cu alloy interconnects is disclosed. The fluoride metal barriers may prevent interconnects from reacting with the fluorinated low-K dielectric. The method may include depositing a thin film of metal or metal alloy on the fluorinated low-K dielectric. The thin film may include a metal or metal alloying element that reacts with free fluorine and/or fluorine compounds from the fluorinated low-K dielectric to form fluoride metal barriers.

摘要翻译： 公开了在氟化低K电介质和Cu或Cu合金互连的界面处形成氟化物金属屏障的装置和方法。 氟化物金属屏障可以防止互连与氟化低K电介质反应。 该方法可以包括在氟化低K电介质上沉积金属或金属合金薄膜。 薄膜可以包括与来自氟化低K电介质的游离氟和/或氟化合物反应以形成氟化物金属屏障的金属或金属合金元素。

公开(公告)号：US09514983B2

公开(公告)日：2016-12-06

申请号：US13730184

申请日：2012-12-28

申请人： Christopher J. Jezewski ,  James S. Clarke ,  Tejaswi K. Indukuri ,  Florian Gstrein ,  Daniel J. Zierath

发明人： Christopher J. Jezewski ,  James S. Clarke ,  Tejaswi K. Indukuri ,  Florian Gstrein ,  Daniel J. Zierath

IPC分类号： H01L23/52 ,  H01L21/768 ,  H01L23/522 ,  H01L23/485 ,  H01L23/532

CPC分类号： H01L21/76841 ,  H01L21/288 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/76871 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53261 ,  H01L23/53266 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal interconnect comprising cobalt and method of forming a metal interconnect comprising cobalt are described. In an embodiment, a metal interconnect comprising cobalt includes a dielectric layer disposed on a substrate, an opening formed in the dielectric layer such that the substrate is exposed. The embodiment further includes a seed layer disposed over the substrate and a fill material comprising cobalt formed within the opening and on a surface of the seed layer.

摘要翻译： 描述了包括钴的金属互连和形成包含钴的金属互连的方法。 在一个实施例中，包括钴的金属互连包括设置在基板上的电介质层，形成在电介质层中的开口，使得基板被暴露。 该实施例还包括设置在基板上的种子层和在开口内和种子层的表面上形成的包含钴的填充材料。

公开(公告)号：US20120258588A1

公开(公告)日：2012-10-11

申请号：US13529067

申请日：2012-06-21

申请人： Christopher J. Jezewski ,  Daniel J. Zierath ,  Florian Gstrein

发明人： Christopher J. Jezewski ,  Daniel J. Zierath ,  Florian Gstrein

IPC分类号： H01L21/768

CPC分类号： B67D7/348 ,  G07F13/025

摘要： A device and method of forming fluoride metal barriers at an interface of a fluorinated low-K dielectric and Cu or Cu alloy interconnects is disclosed. The fluoride metal barriers may prevent interconnects from reacting with the fluorinated low-K dielectric. The method may include depositing a thin film of metal or metal alloy on the fluorinated low-K dielectric. The thin film may include a metal or metal alloying element that reacts with free fluorine and/or fluorine compounds from the fluorinated low-K dielectric to form fluoride metal barriers.

摘要翻译： 公开了在氟化低K电介质和Cu或Cu合金互连的界面处形成氟化物金属屏障的装置和方法。 氟化物金属屏障可以防止互连与氟化低K电介质反应。 该方法可以包括在氟化低K电介质上沉积金属或金属合金薄膜。 薄膜可以包括与来自氟化低K电介质的游离氟和/或氟化合物反应以形成氟化物金属屏障的金属或金属合金元素。

公开(公告)号：US09583389B2

公开(公告)日：2017-02-28

申请号：US14960104

申请日：2015-12-04

申请人： Patricio E. Romero ,  Scott B. Clendenning ,  Jeanette M. Roberts ,  Florian Gstrein

发明人： Patricio E. Romero ,  Scott B. Clendenning ,  Jeanette M. Roberts ,  Florian Gstrein

IPC分类号： H01L21/768 ,  H01L21/285 ,  C23C16/04 ,  C23C16/18 ,  C23C16/455

CPC分类号： H01L21/76897 ,  C23C16/04 ,  C23C16/18 ,  C23C16/45525 ,  H01L21/28506 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76816 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76879

摘要： Selective area deposition of metal films by atomic layer deposition (ALD) and chemical vapor deposition (CVD) is described. In an example, a method of fabricating a metallization structure for an integrated circuit involves forming an exposed surface above a substrate, the exposed surface including regions of exposed dielectric material and regions of exposed metal. The method also involves forming, using a selective metal deposition process, a metal layer on the regions of exposed metal without forming the metal layer on the regions of exposed dielectric material.

摘要翻译： 描述了通过原子层沉积（ALD）和化学气相沉积（CVD）来选择性地沉积金属膜。 在一个示例中，制造用于集成电路的金属化结构的方法包括在衬底上形成暴露表面，暴露的表面包括暴露的介电材料的区域和暴露的金属的区域。 该方法还涉及使用选择性金属沉积工艺在暴露的金属的区域上形成金属层，而不在暴露的电介质材料的区域上形成金属层。

公开(公告)号：US20160086850A1

公开(公告)日：2016-03-24

申请号：US14960104

申请日：2015-12-04

申请人： Patricio E. Romero ,  Scott B. Clendenning ,  Jeanette M. Roberts ,  Florian Gstrein

发明人： Patricio E. Romero ,  Scott B. Clendenning ,  Jeanette M. Roberts ,  Florian Gstrein

IPC分类号： H01L21/768 ,  H01L21/285

CPC分类号： H01L21/76897 ,  C23C16/04 ,  C23C16/18 ,  C23C16/45525 ,  H01L21/28506 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76816 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76879

摘要： Selective area deposition of metal films by atomic layer deposition (ALD) and chemical vapor deposition (CVD) is described. In an example, a method of fabricating a metallization structure for an integrated circuit involves forming an exposed surface above a substrate, the exposed surface including regions of exposed dielectric material and regions of exposed metal. The method also involves forming, using a selective metal deposition process, a metal layer on the regions of exposed metal without forming the metal layer on the regions of exposed dielectric material.

公开(公告)号：US20140027909A1

公开(公告)日：2014-01-30

申请号：US13560936

申请日：2012-07-27

申请人： Florian Gstrein ,  David J. Michalak

发明人： Florian Gstrein ,  David J. Michalak

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L21/0212 ,  G06F1/16 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/3212 ,  H01L21/52 ,  H01L21/76802 ,  H01L21/76829 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53257 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： Embodiments of the present disclosure are directed towards metallization of a fluorocarbon-based dielectric material for interconnect applications. In one embodiment, an apparatus includes a semiconductor substrate, a device layer disposed on the semiconductor substrate, the device layer including one or more transistor devices, and an interconnect layer disposed on the device layer, the interconnect layer comprising a fluorocarbon-based dielectric material, where x represents a stoichiometric quantity of fluorine relative to carbon in the dielectric material, and one or more interconnect structures configured to route electrical signals to or from the one or more transistor devices, the one or more interconnect structures comprising cobalt (Co), or ruthenium (Ru), or combinations thereof. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及用于互连应用的基于碳氟化合物的介电材料的金属化。 在一个实施例中，一种设备包括半导体衬底，设置在半导体衬底上的器件层，器件层包括一个或多个晶体管器件，以及布置在器件层上的互连层，该互连层包括氟碳基电介质材料 ，其中x表示相对于介电材料中的碳的化学计量的氟，以及一个或多个互连结构，其配置成将电信号传递到一个或多个晶体管器件或从一个或多个晶体管器件引出，所述一个或多个互连结构包括钴（Co） 或钌（Ru）或其组合。 可以描述和/或要求保护其他实施例。

公开(公告)号：US07208327B2

公开(公告)日：2007-04-24

申请号：US11136585

申请日：2005-05-25

申请人： Florian Gstrein ,  Valery M. Dubin

发明人： Florian Gstrein ,  Valery M. Dubin

IPC分类号： H01L29/06 ,  H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/0336

CPC分类号： G01N27/129

摘要： A metal oxide sensor is provided on a semiconductor substrate to provide on-chip sensing of gases. The sensor may include a metal layer that may have pores formed by lithography to be of a certain width. The top metal layer may be oxidized resulting in a narrowing of the pores. Another metal layer may be formed over the oxidized layer and electrical contacts may be formed on the metal layer. The contacts may be coupled to a monitoring system that receives electrical signals indicative of gases sensed by the metal oxide sensor.

摘要翻译： 金属氧化物传感器设置在半导体衬底上以提供对气体的片上感测。 传感器可以包括可以具有通过光刻形成的孔以具有一定宽度的金属层。 顶部金属层可能被氧化，导致孔变窄。 可以在氧化层之上形成另一金属层，并且可以在金属层上形成电接触。 触点可以耦合到监测系统，监测系统接收指示由金属氧化物传感器感测的气体的电信号。

公开(公告)号：US20150001724A1

公开(公告)日：2015-01-01

申请号：US13931219

申请日：2013-06-28

申请人： Manish CHANDHOK ,  Hui Jae Yoo ,  Yan A. Borodovsky ,  Florian Gstrein ,  David N. Shykind ,  Kevin L. Lin

发明人： Manish CHANDHOK ,  Hui Jae Yoo ,  Yan A. Borodovsky ,  Florian Gstrein ,  David N. Shykind ,  Kevin L. Lin

IPC分类号： H01L23/535 ,  H01L21/768

CPC分类号： H01L23/5226 ,  H01L21/32133 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76886 ,  H01L21/76897 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53271 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/535 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including patterning a thickness dimension of an interconnect material into a thickness dimension for a wiring line with one or more vias extending from the wiring line and introducing a dielectric material on the interconnect material. A method including depositing and patterning an interconnect material into a wiring line and one or more vias; and introducing a dielectric material on the interconnect material such that the one or more vias are exposed through the dielectric material. An apparatus including a first interconnect layer in a first plane and a second interconnect in a second plane on a substrate; and a dielectric layer separating the first and second interconnect layers, wherein the first interconnect layer comprises a monolith including a wiring line and at least one via, the at least one via extending from the wiring line to a wiring line of the second interconnect layer.

摘要翻译： 一种方法，包括将互连材料的厚度尺寸图案化为具有从布线延伸的一个或多个通孔的布线的厚度尺寸，并将介电材料引入到互连材料上。 一种包括将互连材料沉积和图案化成布线和一个或多个通孔的方法; 以及在所述互连材料上引入介电材料，使得所述一个或多个通孔通过所述介电材料暴露。 一种装置，包括在第一平面中的第一互连层和在衬底上的第二平面中的第二互连; 以及分离所述第一和第二互连层的电介质层，其中所述第一互连层包括包括布线和至少一个通孔的整体，所述至少一个通孔从所述布线延伸到所述第二互连层的布线。