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    Method of manufacturing a semiconductor device comprising semiconductor elements formed in a toplayer of a silicon wafer situated on a buried insulating layer
    2.
    发明授权
    Method of manufacturing a semiconductor device comprising semiconductor elements formed in a toplayer of a silicon wafer situated on a buried insulating layer 失效
    制造半导体器件的方法，其包括形成在位于掩埋绝缘层上的硅晶片的搭配者中的半导体元件

    公开(公告)号：US06562694B2

    公开(公告)日：2003-05-13

    申请号：US09746027

    申请日：2000-12-21

    申请人： Ronald Dekker ,  Henricus Godefridus Rafael Maas ,  Cornelis Eustatius Timmering ,  Pascal Henri Leon Bancken

    发明人： Ronald Dekker ,  Henricus Godefridus Rafael Maas ,  Cornelis Eustatius Timmering ,  Pascal Henri Leon Bancken

    IPC分类号： H01L2176

    CPC分类号： H01L21/76264 ,  H01L21/76283

    摘要： A method of manufacturing a semiconductor device including semiconductor elements having semiconductor zones (17, 18, 24, 44, 45) formed in a top layer (4) of a silicon wafer (1) situated on a buried insulating layer (2). In this method, a first series of process steps are carried out, commonly referred to as front-end processing, wherein, inter alia, the silicon wafer is heated to temperatures above 700° C. Subsequently, trenches (25) are formed in the top layer, which extend as far as the buried insulating layer and do not intersect pn-junctions. After said trenches have been filled with insulating material (26, 29), the semiconductor device is completed in a second series of process steps, commonly referred to as back-end processing, wherein the temperature of the wafer does not exceed 400° C. The trenches are filled in a deposition process wherein the wafer is heated to a temperature which does not exceed 500° C. In this manner, a semiconductor device can be made comprising semiconductor elements having very small and shallow semiconductor zones.

    摘要翻译： 一种制造半导体器件的方法，该半导体器件包括形成在位于掩埋绝缘层（2）上的硅晶片（1）的顶层（4）中的半导体区域（17,18,24,44,45）的半导体元件。 在该方法中，执行第一系列工艺步骤，通常称为前端处理，其中特别地，将硅晶片加热至高于700℃的温度。随后，形成沟槽（25） 顶层，其延伸至掩埋绝缘层并且不与pn结相交。 在所述沟槽已经填充有绝缘材料（26,29）之后，半导体器件在第二系列工艺步骤中完成，通常称为后端处理，其中晶片的温度不超过400℃。 在沉积工艺中填充沟槽，其中将晶片加热到不超过500℃的温度。以这种方式，可以制造半导体器件，其包括具有非常小且浅的半导体区域的半导体元件。

    Method of manufacturing a magnetic head having a planar coil
    3.
    发明授权
    Method of manufacturing a magnetic head having a planar coil 失效
    制造具有平面线圈的磁头的方法

    公开(公告)号：US07027269B2

    公开(公告)日：2006-04-11

    申请号：US09923611

    申请日：2001-08-07

    申请人： Frank Cornelis Penning ,  Ronald Dekker ,  Henricus Godefridus Rafael Maas

    发明人： Frank Cornelis Penning ,  Ronald Dekker ,  Henricus Godefridus Rafael Maas

    IPC分类号： G11B5/127

    CPC分类号： G11B5/17 ,  G11B5/60 ,  G11B11/10534 ,  G11B11/10554 ,  G11B11/1058

    摘要： A simple method of manufacturing a magnetic head having a head face and including a planar magnetic coil (7) which extends parallel to the head face. According to the method, the magnetic coil is formed at a first side of a first substrate (1). Thereafter, the first substrate provided with the magnetic coil is adhered with its first side to a side of a second substrate, whereafter material of the first substrate is removed from a second side of the first substrate (9), the second side being turned away from the first side, in order to form the head face, in such a manner that the magnetic coil is situated near to the head face.

    摘要翻译： 一种制造具有头部表面并包括平行于头部表面延伸的平面磁性线圈（7）的磁头的简单方法。 根据该方法，在第一基板（1）的第一侧形成有电磁线圈。 此后，设置有磁性线圈的第一基板的第一侧粘附到第二基板的一侧，之后从第一基板（9）的第二侧去除第一基板的材料，将第二侧面转回 从第一侧开始，以使磁性线圈靠近头部表面的方式形成头部面。

    Method of manufacturing a piezoelectric filter with an acoustic resonator situated on an acoustic reflector layer formed by a carrier substrate
    4.
    发明授权
    Method of manufacturing a piezoelectric filter with an acoustic resonator situated on an acoustic reflector layer formed by a carrier substrate 有权
    制造具有位于由载体基板形成的声反射层上的声谐振器的压电滤波器的方法

    公开(公告)号：US06698073B2

    公开(公告)日：2004-03-02

    申请号：US09790298

    申请日：2001-02-21

    申请人： Ronald Dekker ,  Henricus Godefridus Rafael Maas

    发明人： Ronald Dekker ,  Henricus Godefridus Rafael Maas

    IPC分类号： H04R1710

    CPC分类号： H03H9/564 ,  H03H3/02 ,  H03H2003/025 ,  Y10T29/42 ,  Y10T29/49128 ,  Y10T29/49155

    摘要： A method of manufacturing a piezoelectric filter with a resonator comprising a layer of a piezoelectric material (1) which is provided with an electrode (2,3) on either side, which resonator is situated on an acoustic reflector layer (4) formed on a surface (6) of a carrier substrate (7). In the method, the layer of piezoelectric material (1) is provided on a surface (8) of an auxiliary substrate (9), after which a first electrode (2) is formed on the layer of piezoelectric material (1). The acoustic reflector layer (4) is provided on and next to the first electrode (2), and the structure thus formed is secured with the side facing away from the auxiliary substrate (9) on the carrier substrate (7). The auxiliary substrate (9) is removed and a second electrode (3) situated opposite the first electrode (2) is provided.

    摘要翻译： 一种制造具有谐振器的压电滤波器的方法，该谐振器包括在任一侧上设置有电极（2,3）的压电材料（1）的层，该谐振器位于形成在 载体基板（7）的表面（6）。 在该方法中，压电材料层（1）设置在辅助基板（9）的表面（8）上，之后在压电材料层（1）上形成第一电极（2）。 声反射器层（4）设置在第一电极（2）上并且紧邻第一电极（2），并且如此形成的结构被固定在载体基板（7）上的背离辅助基板（9）的一侧。 移除辅助基板（9），并且设置与第一电极（2）相对的第二电极（3）。

    Semiconductor device and method of manufacturing same
    5.
    发明授权
    Semiconductor device and method of manufacturing same 有权
    半导体装置及其制造方法

    公开(公告)号：US06593628B2

    公开(公告)日：2003-07-15

    申请号：US09819280

    申请日：2001-03-28

    申请人： Ronald Dekker ,  Henricus Godefridus Rafael Maas ,  Jan Willem Slotboom ,  Freerk Van Rijs

    发明人： Ronald Dekker ,  Henricus Godefridus Rafael Maas ,  Jan Willem Slotboom ,  Freerk Van Rijs

    IPC分类号： H01L2701

    CPC分类号： H01L27/0825 ,  H01L21/8222 ,  H01L21/84 ,  H01L27/088 ,  H01L27/1203

    摘要： The invention relates to an essentially discrete semiconductor device comprising a semiconductor body (10) having a first, preferably bipolar, transistor (T1) with a first region (1) forming a collector (1) of T1, and a second, preferably also bipolar, transistor (T2) with a second region (2) forming a collector (2) of T2, which transistors (T1, T2) are in a cascode configuration wherein the collector (1) of T1is connected to the emitter (4) of T2. Such a device cannot suitably be used in a base station for mobile communication. According to the invention, the first region (1) and the second region (2) are positioned next to each other within a semiconductor region (5), a part of which situated below the first region (1) is provided with a higher doping concentration at the location of T1. In this way, T1 has a low collector-emitter breakdown voltage and a high cutoff frequency, whereas for T2 said voltage and frequency are, respectively, high(er) and low(er). The resultant device is very suitable, on the one hand, for a high voltage application, for example 28 V, and a high power application, for example 100 W and, on the other hand, the device can still operate at a very high speed and hence is very suitable for the above application. Moreover, the device can be manufactured very easily using a method according to the invention. Preferably, the device is rendered suitable for surface mounting, and the semiconductor body is attached to an isolating substrate (20), while the parts thereof that are situated outside T1 and T2 are removed.

    摘要翻译： 本发明涉及一种基本上分立的半导体器件，其包括具有第一优选为双极晶体管（T1）的半导体本体（10），其中第一区域（1）形成为T1的集电极（1），第二区域（1）优选为双极晶体管 ，具有形成T2的集电极（2）的第二区域（2）的晶体管（T2），所述晶体管（T1，T2）处于共源共栅结构，其中T1的集电极（1）连接到T2的发射极（4） 。 这样的设备不能适用于用于移动通信的基站。 根据本发明，第一区域（1）和第二区域（2）在半导体区域（5）内彼此相邻定位，其一部分位于第一区域（1）的下方，具有较高的掺杂 集中在T1的位置。 以这种方式，T1具有低集电极 - 发射极击穿电压和高截止频率，而对于T2，所述电压和频率分别为高（呃）和低（呃）。 一方面，所得到的装置非常适合于高压应用，例如28V，以及高功率应用，例如100W，另一方面，该装置仍然可以以非常高的速度运行 因此非常适合于上述应用。 此外，可以使用根据本发明的方法非常容易地制造该装置。 优选地，该装置适于表面安装，并且半导体主体附接到隔离衬底（20），而位于T1和T2外部的部分被去除。

    Method of producing a schottky varicap
    7.
    发明授权
    Method of producing a schottky varicap 有权
    产生肖特基变种的方法

    公开(公告)号：US06387769B2

    公开(公告)日：2002-05-14

    申请号：US09797086

    申请日：2001-03-01

    申请人： Ronald Dekker ,  Henricus Godefridus Rafael Maas ,  Anco Heringa ,  Holger Schligtenhorst

    发明人： Ronald Dekker ,  Henricus Godefridus Rafael Maas ,  Anco Heringa ,  Holger Schligtenhorst

    IPC分类号： H01L2120

    CPC分类号： H01L29/66174 ,  H01L21/8222 ,  H01L27/0664 ,  H01L29/93

    摘要： A method of producing a Schottky varicap (25) including: (a) providing an epitaxial layer (12) on a semiconductor substrate (1); (b) providing an insulating layer including an oxide layer and a nitride layer on a predetermined area of the surface of the epitaxial layer (12); (c) depositing a polysilicon layer (6); (d) applying a first high temperature step to diffuse a guard ring (10) around the first predetermined area; (e) removing a predetermined portion of the polysilicon layer (6) to expose the first silicon nitride film (5); (f) implanting atoms through at least the first oxide film (4) to provide a predetermined varicap doping profile; (g) applying a second high temperature step to anneal and activate the varicap doping profile; (h) removing the first oxide film (4) to provide an exposed area; (i) providing a Schottky electrode (17) on the exposed area.

    摘要翻译： 一种制造肖特基变容二极管（25）的方法，包括：（a）在半导体衬底（1）上提供外延层（12）;（b）在预定区域上提供包括氧化物层和氮化物层的绝缘层 外延层（12）的表面;（c）沉积多晶硅层（6）;（d）施加第一高温步骤以使保护环（10）围绕第一预定区域扩散;（e） 多晶硅层（6）的一部分以暴露第一氮化硅膜（5）;（f）通过至少第一氧化物膜（4）注入原子以提供预定的变种胶料掺杂分布;（g）施加第二高温 步骤，退火并激活变种胶掺杂分布;（h）去除第一氧化膜（4）以提供暴露区域;（i）在暴露区域上提供肖特基电极（17）。

    Method of manufacturing a hybrid integrated circuit comprising a semiconductor element and a piezoelectric filter
    8.
    发明授权
    Method of manufacturing a hybrid integrated circuit comprising a semiconductor element and a piezoelectric filter 有权
    包括半导体元件和压电滤波器的混合集成电路的制造方法

    公开(公告)号：US06379987B1

    公开(公告)日：2002-04-30

    申请号：US09790346

    申请日：2001-02-21

    申请人： Ronald Dekker ,  Wilhelmus Mathias Clemens Dolmans ,  Lukas Leyten ,  Henricus Godefridus Rafael Maas

    发明人： Ronald Dekker ,  Wilhelmus Mathias Clemens Dolmans ,  Lukas Leyten ,  Henricus Godefridus Rafael Maas

    IPC分类号： H01L2100

    CPC分类号： H03H3/02 ,  H03H9/0542

    摘要： A method of manufacturing a hybrid integrated circuit comprising a semiconductor element (1) and a piezoelectric filter (2), which are situated next to each other and connected to a carrier substrate (3). The semiconductor element comprises semiconductor regions (5, 6) which are formed in a silicon layer (13, 28); the piezoelectric filter comprises an acoustic resonator (8, 9, 10) which is situated on an acoustic reflector layer (7), which acoustic resonator comprises a layer of piezoelectric material (8), a first electrode (9) situated between the layer of piezoelectric material and the acoustic reflector layer, and a second electrode (10) which is situated on the opposite side of the piezoelectric layer and faces the first electrode. In the method, the semiconductor element is formed on the first side (11) of a silicon wafer (12, 25). On the same side of this wafer, also the layer of piezoelectric material and the first electrode are formed, after which the surface is covered with the acoustic reflector layer. Subsequently, an adhesive layer (22) is used to attach the structure thus formed with the acoustic reflector layer to the carrier substrate. Finally, at the location of the filter, silicon is removed from the second side of the wafer, and the comparatively thick acoustic reflector need not be patterned so that underlying features cannot be damaged during etching said reflector layer.

    摘要翻译： 一种制造混合集成电路的方法，该混合集成电路包括彼此相邻并连接到载体衬底（3）的半导体元件（1）和压电滤波器（2）。 半导体元件包括形成在硅层（13,28）中的半导体区域（5,6）。 压电滤波器包括位于声反射器层（7）上的声共振器（8,9,10），该谐振器包括一层压电材料（8），第一电极（9）位于第 压电材料和声反射器层，以及位于压电层的相对侧并面向第一电极的第二电极（10）。 在该方法中，半导体元件形成在硅晶片（12,25）的第一侧（11）上。 在该晶片的同一侧，形成压电材料层和第一电极，此后，表面被声反射层覆盖。 随后，使用粘合剂层（22）将由此形成的结构与声反射器层附接到载体基板。 最后，在滤光器的位置处，从晶片的第二侧去除硅，并且不需要对比较厚的声反射器进行图案化，使得在蚀刻所述反射器层期间底层特征不会被损坏。

    SYSTEM-IN-PACKAGE PLATFORM FOR ELECTRONIC-MICROFLUIDIC DEVICES
    9.
    发明申请
    SYSTEM-IN-PACKAGE PLATFORM FOR ELECTRONIC-MICROFLUIDIC DEVICES 有权
    用于电子微流体装置的系统级封装平台

    公开(公告)号：US20130149215A1

    公开(公告)日：2013-06-13

    申请号：US13755293

    申请日：2013-01-31

    申请人： Ronald Dekker ,  Remco Henricus Wilhelmus Pijnenburg ,  Nicolaas Johannes Anthonius Van Veen

    发明人： Ronald Dekker ,  Remco Henricus Wilhelmus Pijnenburg ,  Nicolaas Johannes Anthonius Van Veen

    IPC分类号： H01L37/00 ,  B01L3/00

    CPC分类号： H01L37/00 ,  B01J2219/00783 ,  B01J2219/0095 ,  B01L3/502707 ,  B01L3/502715 ,  B01L2200/12 ,  B01L2200/14 ,  B01L2300/0645 ,  B01L2300/1827 ,  B01L2300/1883 ,  B01L2400/0415 ,  B81B2201/058 ,  B81C1/0023 ,  H01L2224/11 ,  Y10T436/11

    摘要： The present invention relates to an integrated electronic-microfluidic device an integrated electronic-microfluidic device, comprising a semiconductor substrate (106) on a first (122) support, an electronic circuit (102, 104) on a first semiconductor-substrate side of the semiconductor substrate, and a signal interface structure to an external device. The signal interface structure is arranged on the first semiconductor-substrate side and configured to receive electrical signals from the electronic circuit. A microfluidic structure (126) is formed in the semiconductor substrate, and is configured to confine a fluid and to allow a flow of the fluid to and from the microfluidic structure only on a second semiconductor-substrate side that is opposite to the first semiconductor-substrate side and faces away form the first support. The electronic-microfluidic device forms a flexible platform for the formation of various System-in-Package applications. It achieves a clear separation between electrical and wet-chemical interfaces. The claimed method for fabricating the device of the invention also allows a simple formation of thermally isolated microfluidic structures.

    摘要翻译： 本发明涉及一种集成电子微流体装置，集成的电子微流体装置，其包括在第一（122）支撑件上的半导体衬底（106），电子电路（102,104）的第一半导体衬底 半导体衬底和与外部设备的信号接口结构。 信号接口结构布置在第一半导体衬底侧并被配置为从电子电路接收电信号。 微流体结构（126）形成在半导体衬底中，并且被配置为限制流体并允许仅在与第一半导体衬底相反的第二半导体衬底侧上流体流过微流体结构， 衬底侧面和背面形成第一支撑件。 电子微流体装置形成用于形成各种系统级封装应用的灵活平台。 它实现了电气和湿化学界面之间的清晰分离。 所要求的制造本发明装置的方法还允许简单地形成热分离的微流体结构。