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公开(公告)号：US20190043790A1
公开(公告)日：2019-02-07
申请号：US16154538
申请日：2018-10-08
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L23/31
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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公开(公告)号：US20150351234A1
公开(公告)日：2015-12-03
申请号：US14294875
申请日：2014-06-03
Applicant: STMicroelectronics, Inc.
Inventor： Rammil Seguido , Frederick Ray Gomez , Emmanuel Angeles
CPC classification number: H05K1/0296 , H01L23/66 , H01L25/0652 , H01L2224/48091 , H01L2224/73265 , H05K1/0271 , H05K1/111 , H05K1/181 , H05K3/305 , H05K2201/09236 , H05K2201/09781 , H05K2201/10378 , H05K2201/10515 , H05K2201/1053 , H05K2201/10719 , H05K2201/10977 , H05K2203/049 , Y10T29/49146 , H01L2924/00014
Abstract: Delamination of stacked integrated circuit die configurations on printed circuit boards is avoided by providing a metal trace support structure underneath the die stack. The metal trace support structure features substantially equally spaced thin metal traces in place of a contiguous metal plate which has been used in the past. Spaced apart thin metal traces are less vulnerable to thermal expansion than a metal plate which has a large thermal mass. The metal traces still provide structural stability, while preventing delamination of the die stack configuration during thermal processing. A method of attaching a bridge die stack configuration to a printed circuit board by adhering a die attach film to a field of metal traces is demonstrated. In addition, the electrical and structural integrity of the bridge die stack formed with a metal trace support structure is confirmed with test results.
Abstract translation: 通过在管芯堆叠下方提供金属迹线支撑结构，可以避免印刷电路板上的堆叠集成电路管芯结构的分层。 金属迹线支撑结构具有基本相等间隔的细金属迹线，代替过去使用的连续金属板。 分隔开的薄金属迹线比具有大热质量的金属板不易受热膨胀。 金属迹线仍然提供结构稳定性，同时防止热处理期间芯片堆叠配置的分层。 证明了通过将管芯附着膜粘附到金属痕迹的领域将桥模组叠构造附着到印刷电路板的方法。 此外，用测试结果证实了由金属迹线支撑结构形成的桥模组的电气和结构完整性。
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公开(公告)号：US10109563B2
公开(公告)日：2018-10-23
申请号：US15399234
申请日：2017-01-05
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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公开(公告)号：US09947612B2
公开(公告)日：2018-04-17
申请号：US14957785
申请日：2015-12-03
Applicant: STMICROELECTRONICS, INC.
Inventor： Jefferson Talledo , Rammil Seguido
IPC: H01L23/495 , H01L23/48 , H01L23/52 , H01L21/56 , H01L23/498 , H01L23/00 , H01L23/31
CPC classification number: H01L23/49531 , H01L21/561 , H01L21/563 , H01L23/3107 , H01L23/49503 , H01L23/49541 , H01L23/49548 , H01L23/49568 , H01L23/49575 , H01L23/49861 , H01L24/48 , H01L24/49 , H01L24/85 , H01L24/97 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/4918 , H01L2224/73265 , H01L2224/92247 , H01L2224/97 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
Abstract: A semiconductor device may include a circuit board having an opening, and a frame. The frame may have an IC die pad in the opening, and arms extending outwardly from the IC die pad and coupled to the circuit board. The semiconductor device may include an IC mounted on the IC die pad, bond wires coupling the circuit board with the IC, and encapsulation material surrounding the IC, the bond wires, and the arms.
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公开(公告)号：US11715677B2
公开(公告)日：2023-08-01
申请号：US17234525
申请日：2021-04-19
Applicant: STMicroelectronics, Inc.
Inventor： Jefferson Sismundo Talledo , Rammil Seguido
IPC: H01L23/495 , H01L23/00 , H01L21/56 , H01L23/498 , H01L23/31
CPC classification number: H01L23/49531 , H01L21/563 , H01L23/49503 , H01L23/49541 , H01L23/49548 , H01L23/49568 , H01L23/49575 , H01L23/49861 , H01L24/49 , H01L24/73 , H01L24/85 , H01L24/97 , H01L21/561 , H01L23/3107 , H01L24/05 , H01L24/32 , H01L24/45 , H01L24/48 , H01L2224/05624 , H01L2224/05647 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4918 , H01L2224/73265 , H01L2224/83424 , H01L2224/83447 , H01L2224/92247 , H01L2224/97 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/3511 , H01L2224/48091 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2224/45144 , H01L2924/00014 , H01L2224/45147 , H01L2924/00014 , H01L2224/45124 , H01L2924/00014 , H01L2224/45139 , H01L2924/00014 , H01L2924/3511 , H01L2924/00 , H01L2224/05624 , H01L2924/00014 , H01L2224/05647 , H01L2924/00014
Abstract: A semiconductor device includes a substrate that includes an opening extending through a thickness of the substrate, a frame that includes an integrated circuit (IC) die pad in the opening and a plurality of arms extending outwardly from the IC die pad, an IC mounted on the IC die pad, a plurality of bonding elements electrically coupling the substrate with the IC without the frame being an intermediary coupling element, and an encapsulant surrounding the IC, the plurality of bonding elements, and the plurality of arms. The substrate has a first major surface and a second major surface. Each arm is devoid of a contact pad. Each arm has a distal end coupled to the first major surface of the substrate, and each arm has a proximal end disposed over the first major surface of the substrate.
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Patent Agency Ranking
6.发明授权公开(公告)号：US11688715B2
公开(公告)日：2023-06-27
申请号：US17479988
申请日：2021-09-20
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Rammil Seguido , Raymond Albert Narvadez , Michael Tabiera
IPC: H01L23/00 , H01L23/495
CPC classification number: H01L24/45 , H01L23/4952 , H01L23/49513 , H01L24/43
Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.
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公开(公告)号：US20210242112A1
公开(公告)日：2021-08-05
申请号：US17234525
申请日：2021-04-19
Applicant: STMicroelectronics, Inc.
Inventor： Jefferson Sismundo Talledo , Rammil Seguido
IPC: H01L23/495 , H01L23/00 , H01L21/56 , H01L23/498
Abstract: A semiconductor device includes a substrate that includes an opening extending through a thickness of the substrate, a frame that includes an integrated circuit (IC) die pad in the opening and a plurality of arms extending outwardly from the IC die pad, an IC mounted on the IC die pad, a plurality of bonding elements electrically coupling the substrate with the IC without the frame being an intermediary coupling element, and an encapsulant surrounding the IC, the plurality of bonding elements, and the plurality of arms. The substrate has a first major surface and a second major surface. Each arm is devoid of a contact pad. Each arm has a distal end coupled to the first major surface of the substrate, and each arm has a proximal end disposed over the first major surface of the substrate.
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公开(公告)号：US10957634B2
公开(公告)日：2021-03-23
申请号：US16800923
申请日：2020-02-25
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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公开(公告)号：US09258890B2
公开(公告)日：2016-02-09
申请号：US14294875
申请日：2014-06-03
Applicant: STMicroelectronics, Inc.
Inventor： Rammil Seguido , Frederick Ray Gomez , Emmanuel Angeles
CPC classification number: H05K1/0296 , H01L23/66 , H01L25/0652 , H01L2224/48091 , H01L2224/73265 , H05K1/0271 , H05K1/111 , H05K1/181 , H05K3/305 , H05K2201/09236 , H05K2201/09781 , H05K2201/10378 , H05K2201/10515 , H05K2201/1053 , H05K2201/10719 , H05K2201/10977 , H05K2203/049 , Y10T29/49146 , H01L2924/00014
Abstract: Delamination of stacked integrated circuit die configurations on printed circuit boards is avoided by providing a metal trace support structure underneath the die stack. The metal trace support structure features substantially equally spaced thin metal traces in place of a contiguous metal plate which has been used in the past. Spaced apart thin metal traces are less vulnerable to thermal expansion than a metal plate which has a large thermal mass. The metal traces still provide structural stability, while preventing delamination of the die stack configuration during thermal processing. A method of attaching a bridge die stack configuration to a printed circuit board by adhering a die attach film to a field of metal traces is demonstrated. In addition, the electrical and structural integrity of the bridge die stack formed with a metal trace support structure is confirmed with test results.
Abstract translation: 通过在管芯堆叠下方提供金属迹线支撑结构，可以避免印刷电路板上的堆叠集成电路管芯结构的分层。 金属迹线支撑结构具有基本相等间隔的细金属迹线，代替过去使用的连续金属板。 分隔开的薄金属迹线比具有大热质量的金属板不易受热膨胀。 金属迹线仍然提供结构稳定性，同时防止热处理期间芯片堆叠配置的分层。 证明了通过将管芯附着膜粘附到金属痕迹的领域将桥模组叠构造附着到印刷电路板的方法。 此外，用测试结果证实了由金属迹线支撑结构形成的桥模组的电气和结构完整性。
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公开(公告)号：US11552007B2
公开(公告)日：2023-01-10
申请号：US17185742
申请日：2021-02-25
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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