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    PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME 审中-公开
    印刷电路板及其制造方法

    公开(公告)号：US20130153266A1

    公开(公告)日：2013-06-20

    申请号：US13719036

    申请日：2012-12-18

    Applicant: Samsung Electro-Mechanics Co., Ltd.

    Inventor： Jin Gul Hyun ,  Jin Gu Kim ,  Young Do Kweon ,  Hyung Jin Jeon

    IPC: H05K1/02 ,  H05K3/02

    CPC classification number: H05K1/0296 ,  H05K1/0216 ,  H05K3/02 ,  H05K3/4673 ,  H05K2201/0391 ,  H05K2201/09781

    Abstract: Disclosed herein is a printed circuit board, including: a base substrate; at least one circuit pattern formed on the base substrate; at least one dummy pattern formed on the base substrate; and an insulating layer formed on the circuit pattern and the dummy pattern, wherein a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns meets the following Equation 1. D ≤ T   2 T   1 × 200 1.2 [ Equation   1 ] (Where D represents a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns, T1 represents a thickness of the circuit pattern or the dummy pattern, and T2 represents a maximum thickness of the insulating layer formed on the circuit pattern or the dummy pattern.)

    Abstract translation: 本文公开了一种印刷电路板，包括：基底; 形成在所述基底基板上的至少一个电路图案; 形成在所述基底基板上的至少一个虚设图案; 以及形成在电路图案和虚设图案上的绝缘层，其中电路图案和虚设图案中的彼此之间的相邻图案之间的距离满足以下等式1. D <= T 2 2 T1×200 1.2 [等式1]（其中D表示电路图案和虚设图案中彼此相邻图案之间的距离，T1表示电路图案或虚设图案的厚度，T2表示绝缘体的最大厚度 层形成在电路图案或虚拟图案上。）

    Fan-out semiconductor package
    3.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10312195B2

    公开(公告)日：2019-06-04

    申请号：US15819541

    申请日：2017-11-21

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Ji Hyun Lee ,  Jin Gu Kim ,  Chang Bae Lee ,  Jin Su Kim

    IPC: H01L23/495 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a semiconductor chip; an encapsulant encapsulating at least portions of the semiconductor chip; and a first connection member disposed on the semiconductor chip and including a first redistribution layer electrically connected to the connection pads and a second redistribution layer electrically connected to the connection pads and disposed on the first redistribution layer. The first redistribution layer includes a first pattern having a plurality of degassing holes, the second redistribution layer includes a second pattern having a first line portion having a first line width and a second line portion connected to the first line portion and having a second line width greater than the first line width, and the second line portion overlaps at least one of the plurality of degassing holes when being projected in a direction perpendicular to the active surface.

    Via structure having open stub and printed circuit board having the same
    5.
    发明授权
    Via structure having open stub and printed circuit board having the same 有权
    具有开放短截线的通孔结构和具有其的印刷电路板

    公开(公告)号：US09264010B2

    公开(公告)日：2016-02-16

    申请号：US14027835

    申请日：2013-09-16

    Applicant: Samsung Electro-Mechanics Co., Ltd.

    Inventor： Dong Hwan Lee ,  Seung Wook Park ,  Christian Romero ,  Young Do Kweon ,  Jin Gu Kim

    IPC: H03H7/01 ,  H05K1/02 ,  H05K1/11

    CPC classification number: H03H7/17 ,  H05K1/0251 ,  H05K1/116 ,  H05K2201/09381

    Abstract: The present invention relates to a via structure having an open stub and a printed circuit board having the same. In accordance with an embodiment of the present invention, a via structure having an open stub including: a signal transmission via passing through an insulating layer; upper and lower via pads for connecting first and second transmission lines, which are respectively formed on and under the insulating layer, and the signal transmission via; and at least one open stub connected to an outer periphery of each via pad to have a shunt capacitance with each ground pattern formed on and under the insulating layer is provided. Further, a printed circuit board with a via having an open stub is provided.

    Abstract translation: 本发明涉及具有开口短截线的通孔结构和具有该开口短路的印刷电路板。 根据本发明的实施例，具有开口短截线的通孔结构包括：通过绝缘层的信号传输; 用于连接分别形成在绝缘层上和下面的第一和第二传输线的上和下通孔焊盘和信号传输通孔; 并且提供连接到每个通孔焊盘的外周的至少一个开放短截线以具有形成在绝缘层上和下面的每个接地图案的分流电容。 此外，提供了具有开口短路的通孔的印刷电路板。

    Printed circuit board and method of manufacturing the same
    6.
    发明授权
    Printed circuit board and method of manufacturing the same 有权
    印刷电路板及其制造方法

    公开(公告)号：US09253873B2

    公开(公告)日：2016-02-02

    申请号：US13827248

    申请日：2013-03-14

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Seung Wook Park ,  Dong Hwan Lee ,  Jin Gu Kim ,  Chang Bae Lee ,  Christian Romero

    IPC: H05K1/02 ,  H05K3/46

    CPC classification number: H05K1/0216 ,  H05K3/4602 ,  H05K3/4673 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/0723 ,  H05K2201/09581 ,  Y10T29/49165

    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: a core layer having a first circuit wiring layer formed on one surface or both surfaces thereof; an insulating layer laminated, as at least one layer, on one surface or both surfaces of the core layer; and a second circuit wiring layer formed on one surface of the insulating layer, wherein a conductive core is included in upper and lower insulating layers contacting the second circuit wiring layer requiring an electromagnetic wave shielding, or the conductive core is included in the insulating layer or the core layer contacting the first circuit wiring layer requiring the electromagnetic wave shielding.

    Abstract translation: 这里公开了一种印刷电路板及其制造方法。 印刷电路板包括：具有形成在其一个表面或两个表面上的第一电路布线层的芯层; 在芯层的一个表面或两个表面上层压作为至少一个层的绝缘层; 以及形成在所述绝缘层的一个表面上的第二电路布线层，其中在与需要电磁波屏蔽的第二电路布线层接触的上绝缘层和下绝缘层中包括导电芯，或者导电芯包括在绝缘层中或 芯层与需要电磁波屏蔽的第一电路布线层接触。

    METHOD OF FORMING AMORPHOUS ALLOY FILM AND PRINTED WIRING BOARD MANUFACTURED BY THE SAME
    7.
    发明申请
    METHOD OF FORMING AMORPHOUS ALLOY FILM AND PRINTED WIRING BOARD MANUFACTURED BY THE SAME 审中-公开
    形成非晶合金薄膜的方法及其制造的印刷线路板

    公开(公告)号：US20150156887A1

    公开(公告)日：2015-06-04

    申请号：US14209143

    申请日：2014-03-13

    Applicant: Samsung Electro-Mechanics Co., Ltd.

    Inventor： Ji Sung Cho ,  Toshiko Yokota ,  Makoto Dobashi ,  Jin Gu Kim ,  Ichiro Ogura ,  Je Hong Kyoung

    IPC: H05K3/02 ,  H05K1/09

    CPC classification number: H05K3/022 ,  H05K1/09 ,  H05K3/16 ,  H05K2201/0137 ,  H05K2201/032 ,  H05K2201/0338 ,  Y10T428/12569

    Abstract: Disclosed herein are a method of forming an amorphous alloy film and a printed wiring board manufactured by the same. The amorphous alloy film may be formed on a copper foil as one of rust-proofing treatment methods of the copper foil to thereby simultaneously show and improve corrosion-resistance and conductivity, and the amorphous alloy film may be formed by the sputtering deposition method, such that high melting point materials may be manufactured as a thin film at a relatively low temperature and the amorphous alloy film having strong adhesion strength with a substrate may be obtained.

    Abstract translation: 本文公开了形成非晶合金膜的方法和由其制造的印刷线路板。 非晶合金膜可以形成在铜箔上作为铜箔的防锈处理方法之一，从而同时显示并提高耐腐蚀性和导电性，并且非晶合金膜可以通过溅射沉积法形成，例如 可以在相对低的温度下制造高熔点材料作为薄膜，并且可以获得与基板具有强粘合强度的非晶态合金膜。

    PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME 有权
    印刷电路板及其制造方法

    公开(公告)号：US20140124258A1

    公开(公告)日：2014-05-08

    申请号：US13827248

    申请日：2013-03-14

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Seung Wook PARK ,  Dong Hwan Lee ,  Jin Gu Kim ,  Chang Bae Lee ,  Christian Romero

    IPC: H05K1/02 ,  H05K3/40

    CPC classification number: H05K1/0216 ,  H05K3/4602 ,  H05K3/4673 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/0723 ,  H05K2201/09581 ,  Y10T29/49165

    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: a core layer having a first circuit wiring layer formed on one surface or both surfaces thereof; an insulating layer laminated, as at least one layer, on one surface or both surfaces of the core layer; and a second circuit wiring layer formed on one surface of the insulating layer, wherein a conductive core is included in upper and lower insulating layers contacting the second circuit wiring layer requiring an electromagnetic wave shielding, or the conductive core is included in the insulating layer or the core layer contacting the first circuit wiring layer requiring the electromagnetic wave shielding.

    Abstract translation: 这里公开了一种印刷电路板及其制造方法。 印刷电路板包括：具有形成在其一个表面或两个表面上的第一电路布线层的芯层; 在芯层的一个表面或两个表面上层压作为至少一个层的绝缘层; 以及形成在所述绝缘层的一个表面上的第二电路布线层，其中在与需要电磁波屏蔽的第二电路布线层接触的上绝缘层和下绝缘层中包括导电芯，或者导电芯包括在绝缘层中或 芯层与需要电磁波屏蔽的第一电路布线层接触。

    Fan-out semiconductor package
    10.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10043772B2

    公开(公告)日：2018-08-07

    申请号：US15489117

    申请日：2017-04-17

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Sang Kyu Lee ,  Jin Gu Kim

    IPC: H01L23/00 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole of the first interconnection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip; a second interconnection member disposed on the first interconnection member and the semiconductor chip; and connection terminals disposed on the second interconnection member. The first interconnection member and the second interconnection member respectively include redistribution layers electrically connected to the connection pads of the semiconductor chip, and a connection pad and a connection terminal are electrically connected to each other by a pathway passing through the redistribution layer of the first interconnection member.

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