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    Electronic component embedded substrate and manufacturing method thereof
    1.
    发明授权
    Electronic component embedded substrate and manufacturing method thereof 有权
    电子元件嵌入式基板及其制造方法

    公开(公告)号：US09462697B2

    公开(公告)日：2016-10-04

    申请号：US14092331

    申请日：2013-11-27

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Yul Kyo Chung ,  Doo Hwan Lee ,  Seung Eun Lee ,  Yee Na Shin

    IPC: H05K1/16 ,  H05K1/18 ,  H05K3/46

    CPC classification number: H05K1/186 ,  H01L2924/15311 ,  H05K3/4644 ,  H05K3/4697 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913

    Abstract: The present invention relates to an electronic component embedded substrate including: a first insulating layer including a cavity; an electronic component inserted in the cavity; a first metal pattern formed on a lower surface of the first insulating layer to mount the electronic component thereon and including at least one guide hole for exposing a portion of the external electrode; a second insulating layer formed on the lower surface of the first insulating layer to cover the first metal pattern; a first circuit pattern formed on a lower surface of the second insulating layer; and a first via for electrically connecting the first external electrode exposed through the guide hole and the first circuit pattern, and can improve electrical connectivity between the external electrode and the via even when the size of the external electrode of the electronic component is reduced than before.

    Abstract translation: 电子部件嵌入式基板技术领域本发明涉及电子部件嵌入式基板，具备：包括空腔的第一绝缘层; 插入腔内的电子部件; 形成在所述第一绝缘层的下表面上以将所述电子部件安装在其上并且包括用于暴露所述外部电极的一部分的至少一个引导孔的第一金属图案; 形成在所述第一绝缘层的下表面上以覆盖所述第一金属图案的第二绝缘层; 形成在所述第二绝缘层的下表面上的第一电路图案; 以及用于电连接通过引导孔暴露的第一外部电极和第一电路图案的第一通孔，并且即使当电子部件的外部电极的尺寸比以前更小时，也可以改善外部电极和通孔之间的电连接性 。

    Multilayered substrate
    3.
    发明授权
    Multilayered substrate 有权
    多层基材

    公开(公告)号：US09474167B2

    公开(公告)日：2016-10-18

    申请号：US14061160

    申请日：2013-10-23

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Yee Na Shin ,  Seung Eun Lee ,  Yul Kyo Chung ,  Doo Hwan Lee

    IPC: H05K1/02 ,  H05K1/11 ,  H05K3/46 ,  H01L23/00 ,  H05K1/18

    CPC classification number: H05K3/4673 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/0154 ,  H05K2201/029 ,  H05K2201/09136

    Abstract: Disclosed herein is a multilayered substrate including: a second insulating layer having a fine pattern layer formed on an upper surface thereof; and a third insulating layer having a circuit pattern layer formed on an upper surface thereof and formed of a material different from the second insulating layer, the circuit pattern layer having a pattern pitch larger than that of the fine pattern layer, thereby making it possible to solve a warpage problem and perform refinement and improvement in a degree of integration of an inner wiring.

    Abstract translation: 本文公开了一种多层基板，包括：在其上表面上形成有精细图案层的第二绝缘层; 以及第三绝缘层，其具有形成在其上表面上并且由与第二绝缘层不同的材料形成的电路图案层，该电路图案层具有比精细图案层的间距大的图案间距，从而使得可以 解决翘曲问题，并且在内部布线的集成度方面进行细化和改进。

    Passive device embedded in substrate and substrate with passive device embedded therein
    7.
    发明授权
    Passive device embedded in substrate and substrate with passive device embedded therein 有权
    被动设备嵌入基板和基板中，其中嵌有无源器件

    公开(公告)号：US09155199B2

    公开(公告)日：2015-10-06

    申请号：US14041235

    申请日：2013-09-30

    Applicant: Samsung Electro-Mechanics Co., Ltd.

    Inventor： Yee Na Shin ,  Yul Kyo Chung ,  Seung Eun Lee

    IPC: H05K1/18 ,  H01G4/228 ,  H05K3/46

    CPC classification number: H05K1/185 ,  H05K3/4682 ,  H05K2203/308

    Abstract: The present invention relates to a passive device embedded in a substrate, which includes a laminate formed by alternately laminating a plurality of internal electrodes and dielectric layers; a first external electrode covering one side surface of the laminate and having a first upper cover region, which covers a part of an upper portion of the laminate, and a first lower cover region, which covers a part of a lower portion of the laminate and is smaller than the first upper cover region; and a second external electrode covering the other side surface of the laminate and having a second lower cover region, which covers a part of the lower portion of the laminate, and a second upper cover region, which covers a part of the upper portion of the laminate and is smaller than the second lower cover region, and the substrate.

    Abstract translation: 本发明涉及嵌入基板中的无源器件，其包括通过交替层叠多个内部电极和电介质层而形成的层压体; 覆盖所述层压体的一个侧面的第一外部电极，具有覆盖所述层叠体的上部的一部分的第一上盖区域和覆盖所述层压体的下部的一部分的第一下盖区域，以及 小于第一上盖区域; 以及覆盖所述层叠体的另一侧面的第二外部电极，具有覆盖所述层叠体的下部的一部分的第二下部覆​​盖区域和覆盖所述层叠体的上部的一部分的第二上部覆盖区域 并且小于第二下盖区域和基板。

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