Method for Forming Patterns of Semiconductor Device
    2.
    发明申请
    Method for Forming Patterns of Semiconductor Device 审中-公开
    半导体器件形成方法

    公开(公告)号:US20160155743A1

    公开(公告)日:2016-06-02

    申请号:US14956049

    申请日:2015-12-01

    Abstract: A method for forming patterns of a semiconductor device includes forming a block copolymer layer on an underlying layer, the underlying layer including a first block copolymer having first and second polymer blocks; phase-separating the block copolymer layer to form first block portions including the first polymer block and a second block portion surrounding the first block portions and including the second polymer block; removing the first block portions to form first openings; forming block copolymer pillars to fill the first openings, the block copolymer pillars including a second block copolymer having third and fourth polymer blocks; phase-separating the block copolymer pillars to form third block portions including the third polymer block and fourth block portions including the fourth polymer block within the first openings; and removing the third block portions to form second openings.

    Abstract translation: 用于形成半导体器件的图案的方法包括在下层上形成嵌段共聚物层,下层包括具有第一和第二聚合物嵌段的第一嵌段共聚物; 相分离所述嵌段共聚物层以形成包含所述第一聚合物嵌段的第一嵌段部分和围绕所述第一嵌段部分并包括所述第二聚合物嵌段的第二嵌段部分; 去除第一块部分以形成第一开口; 形成嵌段共聚物柱以填充第一开口,所述嵌段共聚物柱包括具有第三和第四聚合物嵌段的第二嵌段共聚物; 相分离嵌段共聚物柱以形成包含第三聚合物嵌段的第三嵌段部分和在第一开口内包含第四聚合物嵌段的第四嵌段部分; 并移除第三块部分以形成第二开口。

    METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
    4.
    发明申请
    METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20130252393A1

    公开(公告)日:2013-09-26

    申请号:US13687104

    申请日:2012-11-28

    Abstract: In a method of forming MOS transistor, a gate structure is formed on a substrate and a first spacer layer is formed on the substrate conformal to the gate structure. A second spacer layer is formed on the first spacer layer. A second spacer is formed on the first spacer layer corresponding to a sidewall of the gate structure by partially removing the second spacer layer from the first spacer layer. Impurities are implanted in the substrate by an ion implantation process using the gate structure including the first spacer layer and the second spacer as an ion implantation mask to form source/drain extension regions at surface portions of the substrate around the gate structure.

    Abstract translation: 在形成MOS晶体管的方法中,在衬底上形成栅极结构,并且在与栅极结构一致的衬底上形成第一间隔层。 在第一间隔层上形成第二间隔层。 通过从第一间隔层部分去除第二间隔层,在对应于栅极结构的侧壁的第一间隔层上形成第二间隔物。 通过使用包括第一间隔层和第二间隔物的栅极结构作为离子注入掩模的离子注入工艺将杂质注入到衬底中,以在栅极结构周围的衬底的表面部分处形成源极/漏极延伸区域。

    SEMICONDUCTOR DEVICES WITH BENT PORTIONS

    公开(公告)号:US20210119036A1

    公开(公告)日:2021-04-22

    申请号:US17119507

    申请日:2020-12-11

    Abstract: A semiconductor device may include a first active fin, a second active fin and a gate structure. The first active fin may extend in a first direction on a substrate and may include a first straight line extension portion, a second straight line extension portion, and a bent portion between the first and second straight line extension portions. The second active fin may extend in the first direction on the substrate. The gate structure may extend in a second direction perpendicular to the first direction on the substrate. The gate structure may cross one of the first and second straight line extension portions of the first active fin and may cross the second active fin.

    SEMICONDUCTOR DEVICES WITH BENT PORTIONS
    8.
    发明申请

    公开(公告)号:US20190081168A1

    公开(公告)日:2019-03-14

    申请号:US16045305

    申请日:2018-07-25

    Abstract: A semiconductor device may include a first active fin, a second active fin and a gate structure. The first active fin may extend in a first direction on a substrate and may include a first straight line extension portion, a second straight line extension portion, and a bent portion between the first and second straight line extension portions. The second active fin may extend in the first direction on the substrate. The gate structure may extend in a second direction perpendicular to the first direction on the substrate. The gate structure may cross one of the first and second straight line extension portions of the first active fin and may cross the second active fin.

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