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公开(公告)号:US20240234096A1
公开(公告)日:2024-07-11
申请号:US18239155
申请日:2023-08-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Nam Jin CHO , Yi Hwan KIM , Sang Chul HAN , Sang Ki NAM , Jun Ho LEE , Hyun Jae LEE
CPC classification number: H01J37/3244 , C23C16/26 , C23C16/48 , H01J37/3211 , H01J37/32623 , H01J2237/3321 , H01L21/033
Abstract: A method for fabricating a semiconductor device includes loading a substrate into a lower region in a chamber separated by a shower head into the lower region and an upper region, supplying a source gas to the upper region, generating plasma including ions and radicals in the upper region, using a magnetic field and an electric field generated from an antenna on the upper region, and the source gas, supplying the ions and the radicals generated in the upper region into the lower region through a plurality of plasma inlet holes formed to penetrate the shower head in a vertical direction, supplying a process gas into the lower region through a plurality of process gas supply holes formed in the shower head, and forming a deposition film on the substrate inside the lower region, using the ions, the radicals and the process gas.
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公开(公告)号:US20130126094A1
公开(公告)日:2013-05-23
申请号:US13684272
申请日:2012-11-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Tae Ki HONG , Jin Hyuk CHOI , Sang Chul HAN
IPC: B05C9/00
CPC classification number: B05C9/00 , H01J37/32238 , H01J37/32651
Abstract: Disclosed is a substrate processing apparatus with an improved structure to reduce impurities in a chamber being attached to a substrate during processing of the substrate. The substrate processing apparatus generates plasma to process a substrate and includes a sidewall configured to receive the substrate on a receiving portion surrounded by the sidewall and a dielectric coupled to an upper part of the sidewall configured to hermetically seal the receiving portion, wherein the dielectric includes a shielding portion protruding from a bottom of the dielectric opposite the substrate to an inside of the receiving portion and a curved portion in a region at which the bottom and the shielding portion are connected to each other.
Abstract translation: 公开了一种基板处理装置,其具有改进的结构,以减少在处理基板期间附着到基板的室中的杂质。 衬底处理装置产生等离子体以处理衬底并且包括被配置为在由侧壁包围的接收部分上接收衬底的侧壁和耦合到被配置为密封接收部分的侧壁的上部的电介质,其中电介质包括 从与所述基板相对的所述电介质的底部突出到所述接收部的内侧的屏蔽部和在所述底部和所述屏蔽部彼此连接的区域中的弯曲部。
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公开(公告)号:US20240231219A1
公开(公告)日:2024-07-11
申请号:US18469743
申请日:2023-09-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Nam Jin CHO , Yi Hwan KIM , Seok Jun HONG , Seong Keun CHO , Sang Chul HAN
IPC: G03F1/48 , G03F1/60 , H01L21/02 , H01L21/033
CPC classification number: G03F1/48 , G03F1/60 , H01L21/02592 , H01L21/0332
Abstract: A hard mask may include a first layer and a second layer on the first layer. Each of the first layer and the second layer may include an amorphous carbon layer. The first layer may have a first extinction coefficient. The second layer may have a second extinction coefficient and the second extinction coefficient may be different from the first extinction coefficient. The first extinction coefficient and the second extinction coefficient each may be in a range of 0.4 to 0.7.
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公开(公告)号:US20170338232A1
公开(公告)日:2017-11-23
申请号:US15432697
申请日:2017-02-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Chul HAN , Do Hyung KIM , Tae ki HONG , Jin Hyuk CHOI , Moon Hyeong HAN
IPC: H01L27/108 , H01L21/67 , H01L21/3215 , H01L21/02 , H01L21/311 , H01L21/285 , H01L49/02 , H01L21/324
CPC classification number: H01L27/10852 , C23C16/24 , H01L21/02274 , H01L21/02532 , H01L21/0257 , H01L21/28556 , H01L21/76877 , H01L27/10814 , H01L28/90 , H01L28/91
Abstract: A method of fabricating semiconductor device is provided. The method includes providing a substrate having a trench, plasma-ionizing a gas which comprises a deposition material precursor and a doping material precursor to respectively obtain a plasma-ionized deposition material and a plasma-ionized doping material, and depositing the plasma-ionized deposition material and the plasma-ionized doping material in the trench by applying a bias voltage to a bottom surface of the trench, wherein the bottom surface of the trench comprises a first material, and sidewalls of the trench comprise a second material different from the first material.
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